ROHM BD8139AEFV Technical data
Power Supply IC Series for TFT-LCD Panels
High-precision
Gamma Correction ICs with built-in DAC
BD8132FV, BD8139AEFV
●Description
These gamma correction voltage generation ICs feature built-in DACs and provide a single-chip solution with setting control
via serial communications, a high-precision 10-bit DAC, an output amp (18-channel or 10-channel), and Vcom.
●Features
1) Single-chip design means fewer components
2) Built-in 10 bit DAC (18ch: BD8132FV, 10ch: BD8139AEFV)
3) Built-in DAC output amp
4) Built-in Vcom amp
5) Built-in auto-read function
6) 3-line serial interface (BD8132FV) or 2-wire serial (BD8139AEFV)
7) Thermal shutdown circuit
8) SSOP-B40 package (BD8132FV) / HTSSOP-B40 package (BD8139AEFV)
●Applications
These ICs can be used with TFT LCD panels used by large-screen and high-definition LCD TVs.
●Absolute maximum ratings (Ta = 25°C)
Parameter Symbol Limit Unit
Power supply voltage 1 DVcc 7 V
Power supply voltage 2 Vcc 20 V
REFIN voltage REF 20 V
Amp output current capacity Io 50*1 mA
Junction temperature Tjmax 150 ℃
Power dissipation
Operating temperature range Topr -30 to +85 ℃
Storage temperature range Tstg -55 to +150 ℃
*1 Must not exceed Pd.
*2 Reduced by 9.0 mW/°C over 25°C, when mounted on a glass epoxy board (70 mm 70 mm 1.6 mm).
*3 Reduced by 12.8 mW/°C over 25°C, when mounted on a glass epoxy board (70 mm 70 mm 1.6 mm).
●Recommended Operating Ranges
Parameter Symbol
Power supply voltage 1 DVcc 2.3 4.0 V
Power supply voltage 2 Vcc 6 18 V
REFIN voltage REF 6 18 V
Amp output current capacity Io — 40 mA
Serial clock frequency (BD8132FV) fCLK — 5 MHZ
2 wire serial frequency (BD8139AEFV) fCLK — 400 kHz
OSC frequency (BD8132FV) fosc 10 200 kHz
OSC frequency (BD8139AEFV) fosc — 400 kHz
BD8132FV
BD8139AEFV 1600*3
Pd
Min. Max.
112 5*2
Limit
No.09035EBT02
mW
Unit
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© 2009 ROHM Co., Ltd. All rights reserved.
1/20
2009.07 - Rev.B
BD8132FV, BD8139AEFV
●Electrical Characteristics
BD8132FV(Unless otherwise specified, Vcc = 15 V, DVcc = 3.3 V, Ta = 25℃)
Parameter Symbol
[REFIN]
Sinking current Iref 25 50 75 µA REF = 10 V
[Gamma correction amp block]
Output current capacity Io 150 300 — mA DAC = 3V, OUTx = 0 V
Load stability ∆V — 5 20 mV Io = +10 mA to -10 mA, OUTx = 6 V
Slew rate SR — 3.5 — V/µS Ro = 100 k, Co = 100 pF *
OUT max. output voltage VOH VCC-0.16 VCC-0.1 — V Io = -5 mA
OUT min. output voltage VOL — 0.15 0.24 V Io = 5 mA
[Common amp block]
Input bias current Ib — 0 1 µA VFB = 6 V
Output current capacity Io 150 300 — mA DAC = 3V, OUTx = 0 V
Load stability ∆V — 5 20 mV Io = +10 mA to -10 mA, OUTx = 3 V
Slew rate SR — 3.5 — V/µS Ro = 100 k, Co = 100 pF *
Input voltage range VFB 0 — VDAC V Ro = 100 k, Co = 100 pF *
OUT max. output voltage VOH VCC-0.16 VCC-0.1 — V Io = -5 mA
OUT min. output voltage VOL — 0.15 0.24 V Io = 5 mA
[DAC]
Resolution Res — 10 — Bit
Nonlinearity error LE -2 — 2 LSB Ideal line error: 00A to 3F5
Differential linearity error DLE -2 — 2 LSB 1 LSB ideal increase error: 00A to 3F5
[OSC]
Oscillating frequency fosc — 80 — kHz Internal frequency mode
[Control signals]
Sinking current Ictl — 16 25 µA
Threshold voltage VTH 0.7 — 2.6 V DVCC = 3.3 V
Reset time trst — 45 — µs CCT = 1000 pF
[Overall]
Total supply current Icc — 20 — mA When all output voltages are set to 5 V.
Min. Typ. Max.
Limit
Unit Condition
Technical Note
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© 2009 ROHM Co., Ltd. All rights reserved.
2/20
2009.07 - Rev.B
BD8132FV, BD8139AEFV
●Electrical Characteristics
BD8139AEFV (Unless otherwise specified, Vcc = 15 V, DVcc = 3.3 V, Ta = 25℃)
Parameter Symbol
[REFIN]
Sinking current Iref 25 50 75 µA REF = 10V
[Gamma correction amp block]
Output current capacity Io 150 300 — mA DAC = 3 V, OUTx = 0 V
Load stability ∆V — 5 20 mV Io = +10 mA to -10 mA, OUTx = 6 V
Slew rate SR — 3.5 — V/µs Ro = 100 k, Co = 100 pF *
OUT max. output voltage VOH Vcc-0.16 Vcc-0.1 — V Io = -5 mA
OUT min. output voltage VOL — 0.1 0.16 V Io = 5 mA
[Common amp block]
Input bias current Ib — 0 1 µA VFB = 6 V
Output current capacity Io 150 300 — mA DAC = 3 V, OUTx = 0 V
Load stability ∆V — 5 20 mV Io = +10 mA to -10 mA, OUTx = 3 V
Slew rate SR — 3.5 — V/µS Ro = 100 k, Co = 100 pF *
Input voltage range VFB 0 — VDAC V Ro = 100 k, Co = 100 pF *
OUT max. output voltage VOH Vcc-0.16 Vcc-0.1 — V Io = -5 mA
OUT min. output voltage VOL — 0.1 0.16 V Io = 5 mA
[DAC]
Resolution Res — 10 — Bit
Nonlinearity error LE -2 — 2 LSB Ideal line error: 00A to 3F5
Differential linearity error DLE -2 — 2 LSB 1 LSB ideal increase error: 00A to 3F5
[OSC]
Oscillating frequency fosc — 210 — kHz Internal frequency mode
[Control signals]
Sinking current Ictl — 16 25 µA Except for osc_mode
Sinking current Ioscm 26 33 40 µA Only osc_mode
Min. output voltage VSDA — — 0.4 V ISDA = 3.0 mA *
Sinking current ILi -10 — 10 µA 0.4 V to 0.9 V DVCC
Threshold voltage VTH 0.7 — 2.6 V DVCC = 3.3 V
Reset time trst — 45 — µs CCT = 1000 pF
[Overall]
Total supply current Icc — 18 — mA When all output voltages are set to 5 V.
Min. Typ. Max.
Limit
Unit Condition
Technical Note
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© 2009 ROHM Co., Ltd. All rights reserved.
3/20
2009.07 - Rev.B
BD8132FV, BD8139AEFV
●Reference Data
(Unless otherwise specified, Ta = 25℃, BD8132FV and BD8139AEFV)
40
25
BD8132F V
℃
-30
℃
V]
CC[
35
30
25
SUPPLY CURRENT : ICC[mA] ,
85
20
15
10
℃
5
0
0 5 10 15 20
SUPPLY VOLTAGE : V
Fig. 1 VCC Total Supply Current Fig. 2 Total Supply Current vs Temperature
40
35
30
18V
25
20
15
10
5
SUPPLY CURRENT : ICC[mA] ,
0
-30 - 10 10 30 50 70
AMBIENT TEMPER ATU RE : Ta[℃]
15V
30
25
BD8139AEFV
20
15
10
85℃
25℃ -30℃
5
SUPPLY CURRENT : ICC[mA] .
0
0 5 10 15 20
SUPPLY VOLTAGE : VCC[V]
20
15
18V
15V
10
5
SUPPLY CURRENT : ICC[mA] .
0
-30 - 10 10 30 50 70
AMBIENT TEMPER ATU RE : Ta [℃]
Fig. 4 VCC Total Supply Current
Fig. 5 Total Supply Current vs Temperature
15.5
15
-3 0 ℃
25℃
85℃
1.5
1
14.5
OUTPUT VOLTAGE : VO[V]
14
0 5 10 15 20
SOURCE C UR REN T : IF[mA]
Fig. 7 High Output Voltage
0.5
OUTPUT VOLTAGE : VO[V]
0
0 5 10 15 20
SINK CURRENT : IF[mA]
Fig. 8 Low Output Voltage
BD8132F V
6V
BD8139AEFV
6V
-3 0 ℃25℃85℃
Technical Note
2
BD8132F V
1.5
.
1
85℃ 25℃
0.5
SUPPLY CUR REN T : IDD [m A]
0
01 2345 67
SUPPLY VOLTAGE : VDD[ V]
Fig. 3 VDD Total Supply Current
2
1.5
85℃ 25℃
1
0.5
SUPPLY CURRENT : IDD[mA]..
0
0123 4567
SUPPLY VOLTAGE : D VCC[V]
Fig. 6 VDD Total Supply Current
14
12
10
85℃
8
6
4
2
OUTPUT VOLTAGE : VO[V]
0
-400 -300 - 200 - 100 0 100 200
25℃
-3 0 ℃
OUTPUT CURRENT : IAMP[mA]
Fig. 9 Output Current Capacity
-
BD8139AEF V
-3 0 ℃
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© 2009 ROHM Co., Ltd. All rights reserved.
4/20
2009.07 - Rev.B
BD8132FV, BD8139AEFV
]
Ou
pu
o
age
[
]
A
●Reference Data
(Unless otherwise specified, Ta = 25℃, BD8132FV and BD8139AEFV)
Gain [dB]
80
60
Phase
40
Gain
20
0
100 1
10K
100K 1M
FREQUENCY : f [Hz]
Fig. 10 Open Loop Waveform Fig. 11 Power-on Reset Time
10M
100
80
60
40
20
0
-20
-40
-60
-80
-100
1000
100
10
Phase [deg]
1
Reset Time [ms] .
0.1
0.01
0.0001 0.001 0.01 0.1 1 10
CT C APACITOR : CT[μF]
VCC=15V
VI=4V
RL=100kΩ
CL=100pF
TA=2 5℃
10
V
8
6
lt
t V
4
t
2
0
0 5 10 15 20 25 30 35 40 45 50
Fig. 13 Slew Rate Waveform
TIME [usec]
(High-Amplitude)
6
4
2
0
Input Voltage [V]
VCC=15V
VI=40mV
RL=100kΩ
CL=100pF
TA=2 5℃
5.10
5.05
5.00
4.95
Output Voltage [V]
4.90
0 5 10 15 20 25 30 35 40 45 50
TIME [usec
Fig. 14 Slew Rate Waveform
(Small Signal)
10.2
VCC=15V
VI=5V
CS=100pF
RS=100Ω
CL=100pF
RL=1kΩ
T=0.1us
t
TA=2 5℃
10.1
9.9
Output Voltage [V]
9.8
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Fig. 16 Load Response Waveform
TIME [usec]
(RL = 1 k Pull-down)
-20 0 20
2
1.5
1
0.5
Input Current [mA]
0
INL [LSB]
-0.5
-1
-1.5
-2
0 200 400 600 800 1000
step
Fig. 17 Integral Linearity Error
2.55
2.50
2.45
Technical Note
100
80
60
40
Reset Time [uS]
20
0
-40 -20 0 20 40 60 80 100
AMBIENT TEMPERATUR E : Ta[℃]
Fig. 12 Power-on Reset Time
vs Temperature
VCC=15V
VI=5V
CS=100pF
RS=100Ω
CL=100pF
RL=1kΩ
T=0.1us
t
TA=2 5℃
Input Voltage [V]
10.2
10.1
9.9
Output Voltage [V]
9.8
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Fig. 15 Load Response Waveform
2
1.5
1
0.5
0
-0.5
DNL [LSB]
-1
-1.5
-2
0 200 400 600 800 1000
Fig. 18 Differential Linearity Error
+20mA -20m
TIME [usec]
(RL = 1 k Pull-up)
step
-20 0 20
Input Current [mA]
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© 2009 ROHM Co., Ltd. All rights reserved.
5/20
2009.07 - Rev.B
BD8132FV, BD8139AEFV
A
K
Technical Note
●Pin Assignment Diagram ●Block Diagram
[BD8132FV]
LATCH
SDIN
CLK
SDOUT
GND
R/W
CS
MEMDO
MEMDI
OSC
CC
DV
NC
CC
V
CC
V
REFIN
VDAC
CT
DGND
GND
GND
V0
V1
V2
V3
V4
V5
V6
V7
V8
V9
V
VB
VC
VD
VE
VF
VG
VH
Vcom
FB
MENDO
SDOUT
DVCC
CS
R/W
MENDI
LATCH
CL
SDIN
CT
DGND
11
7
6
9
8
1
3
2
4
17
18
DVCC
DGND
GND
GND
DVCC
VREF
TSD
AUTO
Read
Serial
I/F
Power
On
Reset
5
REFIN
15 16
100k
Ω
100k
Ω
Register 0
Register 1
Register 2
Register 3
Register 4
Register 5
Register 6
Register 7
Register 8
Register 9
Register A
Register B
Register C
Register D
Register E
Register F
Register G
Register H
Register I
VDAC
VDAC
VDAC
DAC
LOGIC
DAC
LOGIC
OSC
10 21
VDAC
OSC FB
VCC
13
VCC
VCC
2
×
2
×
2
×
×2
2
×
2
×
2
×
2
×
2
×
2
×
2
×
×2
2
×
2
×
2
×
2
×
2
×
2
×
2
×
2
×
Fig. 19 Pin Assignment Diagram & Block Diagram
●Pin Name and Function
Pin
No.
Pin
name
Function
Pin
No.
Pin
name
Function
1 LATCH Serial latch input 21 FB Vcom amp negative feedback input
2 SDIN Serial data input 22 Vcom Vcom output pin
3 CLK Serial clock input 23 VH Gamma correction output pin
4 SDOUT Serial data output 24 VG Gamma correction output pin
5 GND GND input 25 VF Gamma correction output pin
6 R/W Auto-read on/off input (On = Low, Off = High) 26 VE Gamma correction output pin
7 CS External memory selection output 27 VD Gamma correction output pin
8 MEMDO External memory output data signal 28 VC Gamma correction output pin
9 MEMDI External memory input data signal 29 VB Gamma correction output pin
10 OSC Tuning clock I/O 30 VA Gamma correction output pin
11 DVCC Logic power supply input 31 V9 Gamma correction output pin
12 NC — 32 V8 Gamma correction output pin
13 VCC Buffer amp power supply input 33 V7 Gamma correction output pin
14 VCC Buffer amp power supply input 34 V6 Gamma correction output pin
15 REFIN DAC reference input 35 V5 Gamma correction output pin
16 VDAC DAC voltage output 36 V4 Gamma correction output pin
17 CT Power-on reset capacitance connection pin 37 V3 Gamma correction output pin
18 DGND DAC GND input 38 V2 Gamma correction output pin
19 GND GND input 39 V1 Gamma correction output pin
20 GND GND input 40 V0 Gamma correction output pin
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
V0
V1
V2
V3
V4
V5
V6
V7
V8
V9
VA
VB
VC
VD
VE
VF
VG
VH
Vcom
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© 2009 ROHM Co., Ltd. All rights reserved.
6/20
2009.07 - Rev.B
BD8132FV, BD8139AEFV
A
A
A
A
Technical Note
●Pin Assignment Diagram ●Block Diagram
[BD8139AEFV]
1
2
NC
OSC
SLAVE/AR
OSC_MODE
SDA
SCL
DGND
DACGND
NC
NC
CT
DVcc
NC
REFIN
NC
NC
VDAC
NC
GND
NC
NC
NC
V0
V1
V2
V3
V4
V5
V6
V7
V8
V9
VCOM
FB
NC
Vcc
NC
NC
DVcc
SCL
SDA
SLAVE/AR
DGND
DACGND
REFIN VDAC
16 19 23
100k
DVcc
VREF
TSD
DVcc
14
1
1
2
2
2wire
8
serial
7
CT
I/F
5
Power
On
13
Reset
DGND
9
DACGND
10
Ω
100k
Ω
Register 0
Register 1
Register 2
Register 3
Register 4
Register 5
Register 6
Register 7
Register 8
Register 9
Register A
GND
40
GND
VDAC
DAC
LOGIC
OSC
6
OSC_MODE
VDAC
4
OSC
Vcc
Fig. 20 Pin Assignment Diagram & Block Diagram
●Pin Name and Function
Pin
No.
1 A1
2 A2
Pin
name
Function
Slave/address setting pin
Auto-read/word address setting pin (1)
Slave/address setting pin
Auto-read/word address setting pin (2)
Pin
No.
Pin
name
Function
21 NC —
22 NC —
3 NC — 23 VCC Buffer amp power supply input
4 OSC Tuning clock I/O 24 NC —
5 SLAVE/AR Slave/auto-read selection pin 25 FB Vcom amp negative feedback input
6 OSC_MODE OSC switching pin 26 Vcom Vcom output pin
7 SDA Serial data input (2 wire serial) 27 V9 Gamma correction output pin 9
8 SCL Serial clock input (2 wire serial) 28 V8 Gamma correction output pin 8
9 DGND GND input 29 V7 Gamma correction output pin 7
10 DACGND DAC GND input 30 V6 Gamma correction output pin 6
11 NC — 31 V5 Gamma correction output pin 5
12 NC — 32 V4 Gamma correction output pin 4
13 CT Power-on reset capacitance connection pin 33 V3 Gamma correction output pin 3
14 DVCC Logic power supply input 34 V2 Gamma correction output pin 2
15 NC — 35 V1 Gamma correction output pin 1
16 REFIN DAC reference input 36 V0 Gamma correction output pin 0
17 NC — 37 NC —
18 NC — 38 NC —
19 VDAC DAC voltage output 39 NC —
20 NC — 40 GND GND input
VCC
×
×
×
×2
×
×
×
×
×
×
×
×2
2
2
2
2
2
2
2
Vcc
2
2
2
V0
36
35
V1
34
V2
33
V3
32
V4
31
V5
30
V6
29
V7
28
V8
27
V9
26
Vcom
25
FB
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© 2009 ROHM Co., Ltd. All rights reserved.
7/20
2009.07 - Rev.B
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