ROHM BD8112EFV-M Technical data

Power Management ICs for Automotive Body Control

White Backlight LED Drivers
for Medium to Large LCD Panels
(Switching Regulator Type)

BD8112EFV-M

●Description

BD8112EFV-M is a white LED driver with the capability of withstanding high input voltage (36V MAX). This driver has
2ch constant-current drivers integrated in 1-chip, which each channel can draw up to 150mA max, so that high brightness
LED driving can be realized. Furthermore, a current-mode buck-boost DC/DC controller is also integrated to achieve stable
operation against voltage input and also to remove the constraint of the number of LEDs in series connection.
The brightness can be controlled by either PWM or VDAC techniques.

●Features

1) Input voltage range 5.0 -30 V

2) Integrated buck-boost current-mode DC/DC controller

3) Two integrated LED current driver channels (150 mA max. each channel)

4) PWM Light Modulation (Minimum Pulse Width 25µs)

5) Oscillation frequency accuracy ±5%

6) Built-in protection functions (UVLO, OVP, TSD, OCP, SCP)

7) LED abnormal status detection function (OPEN/ SHORT)

8) HTSSOP-B24 package

●Applications

Backlight for display audio, small type panels, etc.

●Absolute maximum ratings (Ta=25℃)

Parameter Symbol Ratings Unit

Power supply voltage VCC 36 V

No.11039ECT11

BOOT , OUTH Voltage V

SW, CS Voltage V

BOOT-SW Voltage V

LED output voltage V

VREG, OVP, OUTL, FAIL1, FAIL2,
LEDEN, ISET, VDAC, PWM, SS, COMP,
RT, SYNC, EN voltage

Power Consumption Pd 1.10 *1 W

Operating temperature range Topr -40～+105 ℃

Storage temperature range Tstg -55～+150 ℃

LED maximum output current I

Junction temperature Tjmax 150 ℃

*1 IC mounted on glass epoxy board measuring 70mm × 70mm × 1.6mm, power dissipated at a rate of 8.8mw/℃ at temperatures above 25℃.
*2 Dispersion figures for LED maximum output current and VF are correlated. Please refer to data on separate sheet.
*3 Amount of current per channel.

V

VREG, VOVP, VOUTL, VFAIL1, VFAI L2 ,

V

LEDEN, VISET, VVDAC, VPWM, VSS, VCOMP,

BOOT, VOUTH

SW, VCS

BOOT-SW

LED1,2

V

RT, VSYNC, VEN

41 V

36 V

7 V

36 V

-0.3～7 < V

150

LED

V

CC

*2 *3

mA

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2011.08 - Rev.C

BD8112EFV-M

●Operating conditions (Ta=25℃)

Parameter Symbol Limits Unit

Power supply voltage VCC 5.0～30 V

Technical Note

Oscillating frequency range F

External synchronization
frequency range

*4 *5

External synchronization
pulse duty range

*4 Connect SYNC to GND or OPEN when not using external frequency synchronization.
*5 Do not switch between internal and external synchronization when an external synchronization signal is input to the device.

250～600 kHz

OSC

F

fosc～600 kHz

SYNC

40～60 %

F

SDUTY

●Electrical characteristics (Unless otherwise specified, VCC=12V Ta=25℃)

Parameter Symbol

Min Typ Max.

Circuit current ICC - 7 14 mA

Limits

Unit Conditions

EN=Hi, SYNC=Hi, RT=OPEN
PWM=Low, ISET=OPEN, C

Standby current IST - 4 8 µA EN=Low

[VREG Block (VREG)]

Reference voltage V

4.5 5 5.5 V I

REG

REG

[OUTH Block]

OUTH high-side ON resistance R

1.5 3.5 7.0 Ω ION=-10mA

ONHH

=-5mA, C

REG

=2.2µF

=10µF

IN

OUTH low-side ON resistance R

Over-current protection
operating voltage

V

[OUTL Block]

OUTL high-side ON resistance R

OUTL low –side ON resistance R

[SW Block]

SW low -side ON resistance R

[Error Amplifie Block]

LED voltage V

COMP sink current I

COMP source current I

COMPSINK

COMPSOURCE

[Oscillator Block]

Oscillating frequency F

1.0 2.5 5.0 Ω ION=10mA

ONHL

V

V

OLIMIT

ONLH

ONLL

ON_SW

LED

-0.66

2.0 4.0 8.0 Ω ION=-10mA

1.0 2.5 5.0 Ω ION=10mA

2.0 4.5 9.0 Ω I

0.9 1.0 1.1 V

CC

CC

-0.6

VCC

-0.54

V

ON_SW

15 25 35 µA V

-35 -25 -15 µA V

285 300 315 KHz RT=100kΩ

OSC

=10mA

=2V, Vcomp=1V

LED

=0V, Vcomp=1V

LED

◎This product is not designed for use in radioactive environments.

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2011.08 - Rev.C

BD8112EFV-M

Parameter Symbol

[OVP Block]

Over-voltage detection
reference voltage

Limits

Min Typ Max.

V

1.9 2.0 2.1 V V

OVP

Technical Note

Unit Conditions

=Sweep up

OVP

OVP hysteresis width V

SCP Latch OFF Delay Time T

0.45 0.55 0.65 V V

OHYS

70 100 130 ms RT=100kΩ

SCP

[UVLO Block ]

UVLO voltage V

UVLO hysteresis width V

4.0 4.3 4.6 V VCC : Sweep down

UVLO

50 150 250 mV VCC : Sweep up

UHYS

[LED Output Block]

LED current
relative dispersion width

LED current
absolute dispersion width

ISET voltage V

-3 - +3 %

△I

LED1

△I

-5 - +5 %

LED2

1.96 2.0 2.04 V R

ISET

PWM minimum pulse width Tmin 25 - - µs F

PWM maximum duty Dmax - - 100 % F

PWM frequency F

- - 20 KHz Duty=50%, I

PWM

=Sweep down

OVP

=50mA,

I

LED

=(I

ΔI

LED1

I

=50mA,

LED

ΔI

=(I

LED2

=120kΩ

ISET

=150Hz, I

PWM

=150Hz, I

PWM

LED/ILED_AVG

/50mA-1)×100

LED

=50mA

LED

=50mA

LED

=50mA

LED

-1)×100

=0～2V, R

V

VDAC gain G

Open detection voltage V

LED Short detection Voltage V

LED Short Latch OFF Delay Time T

PWM Latch OFF Delay Time T

- 25 - mA/V

VDAC

0.2 0.3 0.4 V V

OPEN

4.2 4.5 4.8 V V

SHORT

70 100 130 ms RT=100kΩ

SHORT

70 100 130 ms RT=100kΩ

PWM

DAC

=VDAC÷R

I

LED

= Sweep down

LED

= Sweep up

OVP

[Logic Inputs (EN, SYNC, PWM, LEDEN)]

Input HIGH voltage V

Input LOW voltage V

Input current 1 IIN 20 35 50 µA

2.1 - 5.5 V

INH

GND - 0.8 V

INL

V

=5V

IN

(SYNC, PWM, LEDEN)

Input current 2 IEN 15 25 35 µA VEN=5V (EN)

[FAIL Output (open drain) ]

=120kΩ

ISET

×Gain

ISET

FAIL LOW voltage VOL - 0.1 0.2 V IOL=0.1mA

◎This product is not designed for use in radioactive environments.

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3/22

2011.08 - Rev.C

BD8112EFV-M

●Electrical characteristic curves (Reference data) (Unless otherwise specified, Ta=25℃)

5.5

5.3

5.1

Vcc= 12V

400

Vcc= 12V

360

320

4.9

280

4.7

OUT PUT VOLTAGE:VREG [V]

4.5

-40 - 15 10 35 60 85
TEM PERATU RE:Ta [℃]

Fig.1 VREG temperature

characteristic

240

Fig.3 OSC 温度特性

SWITCHING FREQUENCY:FOSC [kHz]

200

-40 - 15 10 35 60 85
TEMPERATURE:Ta [℃]

Fig.2 OSC temperature

characteristic

55

50

53

51

49

47

OUTPUTCURRENT :ILED [mA]

45

Vcc= 12V

-40 - 15 10 35 60 85

TEMPER ATUR E:Ta [℃]

Fig.4 ILED temperature

characteristic

40

30

20

10

OUTPUTCURRENT :ILED [mA]

0

0 0.5 1 1.5 2

VDAC VOLTAGE:VD AC[V]

Fig.5 VDAC Gain① Fig.6 VDAC Gain②

100

85

70

55

EFFIC IENCY [%]

40

VCC=30V

100

85

VCC=12V

70

55

EFFICIENCY [%]

40

25

50 100 150 200 250

Total_Io [mA]

Fig.7 Efficiency

(LED2 Parallel 5 step)

0.66

0.64

0.62

0.60

0.58

0.56

OUT PUT VOLTAGE:Vcc-Vcs [V]

0.54

-40 - 15 10 35 60 85

TEMPER ATUR E:Ta [℃]

Fig.10 Overcurrent detecting voltage

temperature characteristic

VCC=12V

25

50 100 150 200 250

OUTPUT CURRENT [mA]

Fig.8 Efficiency

(LED2 Parallel 7 step)

10

8

6

4

2

OUT PUT VOLTAGE:VREG [V]

0

012345

EN VOLTAGE:VEN [V]

Fig.11 EN threshold voltage

Technical Note

400

360

Vcc= 12V

320

280

240

SWITCHING FREQUENCY:FOSC [kHz]

200

-40 - 15 10 35 60 85
TEM PERATU RE:Ta [℃]

Fig.3 ILED depend on VLED

5

4

3

2

1

OUTPU TCURR ENT :ILED [mA]

0

0 0.02 0.04 0.06 0.08 0.1

VDAC VOLTAGE:VDAC [V]

6.0

4.0

2.0

OUTPUT CARRENT:Icc [mA]

0.0
0 6 12 18 24 30 36

10

8

6

4

2

OUTPUTCURRENT :ILED [mA]

0

01 23 45

Fig.12 PWM threshold voltage

Vcc=12V

SUPPLY VOLTAGE:Vcc [V]

Fig.9 Circuit Current

(Switching OFF)

PWM VOLT AGE:VEN [V]

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2011.08 - Rev.C

BD8112EFV-M

●Block diagram and pin configuration

Vin

Ccomp

CRT

C

RISET

IN

RT

C

C

VREG

VCC

EN

SYNC

RT

COMP

R

PC

PC

SS

SS

PWM

VDAC

ISET

VREG

OCP OVP

PWM

OSC

SS

UVLO TSD

SLOPE

ISET

Timer

Latch

Control Logic

Open Short Detect

OVP

－

PWM

＋

ERR AMP

Current driver

Timer
Latch

LEDEN

Fig.13

－

－

＋

Open Det

Short Det

OCP

DRV

CTL

Technical Note

C

OUT

OVP

＋
－

VREG

CS

FAIL1

BOOT

OUTH

SW

DGND

OUTL

GND

LED1

LED2

PGND

FAIL2

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2011.08 - Rev.C

BD8112EFV-M

●Pin layout

BD8112EFV-M(HTSSOP-B24)

●Pin function table

Pin Symbol Function

COMP

SS

VCC

EN

RT

SYNC

GND

PWM

FAIL1

FAIL2

LEDEN

LED1

10

11

12

Technical Note

1

2

3

4

5

6

7

8

9

Fig.14

24

23

22

21

20

19

18

17

16

15

14

13

VREG

BOOT

CS

OUTH

SW

DGND

OUTL

PGND

ISET

VDAC

OVP

LED2

1 COMP Error amplifier output

2 SS Soft start time-setting capacitance input

3 VCC Input power supply

4 EN Enable input

5 RT Oscillation frequency-setting resistance input

6 SYNC External synchronization signal input

7 GND Small-signal GND

8 PWM PWM light modulation input

9 FAIL1 Failure signal output

10 FAIL2 LED open/short detection signal output

11 LEDEN LED output enable pin

12 LED1 LED output 1

13 LED2 LED output 2

14 OVP Over-voltage detection input

15 VDAC DC variable light modulation input

16 ISET LED output current-setting resistance input

17 PGND LED output GND

18 OUTL Low-side external MOSFET Gate Drive out put

19 DGND Low-side internal MOSFET Source out put

20 SW High-side external MOSFET Source pin

21 OUTH High-side external MOSFET Gate Drive out pin

22 CS DC/DC Current Sense Pin

23 BOOT High-side MOSFET Power Supply pin

24 VREG Internal reference voltage output

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2011.08 - Rev.C

BD8112EFV-M

Technical Note

●5V voltage reference (VREG)

5V (Typ.) is generated from the VCC input voltage when the enable pin is set high. This voltage is used to power internal
circuitry, as well as the voltage source for device pins that need to be fixed to a logical HIGH. UVLO protection is integrated
into the VREG pin. The voltage regulation circuitry operates uninterrupted for output voltages higher than 4.45 V (Typ.),
but if output voltage drops to 4.3 V (Typ.) or lower, UVLO engages and turns the IC off. Connect a capacitor (Creg = 2.2µF
Typ.) to the VREG terminal for phase compensation. Operation may become unstable if Creg is not connected.

●Constant-current LED drivers

If less than four constant-current drivers are used, unused channels should be switched off via the LEDEN pin configuration.
The truth table for these pins is shown below. If a driver output is enabled but not used (i.e. left open), the IC’s open
circuit-detection circuitry will operate. Please keep the unused pins open. The LEDEN terminals are pulled down internally
in the IC, so if left open, the IC will recognize them as logic LO. However, they should be connected directly to VREG or
fixed to a logic HI when in use.

LED

LED EN

1 2

L ON ON

H ON OFF

・Output current setting

LED current is computed via the following equation:

= min[VDAC , VISET(=2.0V)] / RSET x GAIN [A]

I

LED

(min[VDAC , 2.0V] = the smaller value of either VDAC or VISET; GAIN = set by internal circuitry.)
In applications where an external signal is used for output current control, a control voltage in the range of 0.0 to 2.0 V
can be connected on the VDAC pin to control according to the above equation. If an external control signal is not used,
connect the VDAC pin to VREG (do not leave the pin open as this may cause the IC to malfunction). Also, do not switch
individual channels on or off via the LEDEN pin while operating in PWM mode.

The following diagram illustrates the relation between ILED and GAIN.

3150

ILED vs GAIN

GAIN

3100

3050

3000

2950

2900

2850

0 20 40 60 80 100 120 140 160

ILED[mA]

In PWM intensity control mode, the ON/OFF state of each current driver is controlled directly by the input signal on the
PWM pin; thus, the duty ratio of the input signal on the PWM pin equals the duty ratio of the LED current. When not
controlling intensity via PWM, fix the PWM terminal to a high voltage (100%). Output light intensity is greatest at 100%
input.

PWM

PWM

ILED(50mA/div)

ILED

PWM=150Hz Duty=0.

PWM=150Hz Duty=50%

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2011.08 - Rev.C