Power Management ICs for Automotive Body Control
LED
Indicator Driver
BD8105FV
●Description
The BD8105FV is a serial parallel control LED driver with 35V input voltage rating.
Responding to the 3-line serial data, it turns the 12ch open drain output on/off.
Due to its compact size, it is optimal for small spaces.
●Features
1) Open Drain Output
2) 3-line Serial Control + Enable Signal
3) Internal Temperature Protection Circuit (TSD)
4) Cascade Connection Compatible
5) SSOP-B20W
6) Internal 12 ch Power Transistor
Applications
These ICs can be used with car and consumer electronic.
●Absolute Maximum Ratings (Ta=25℃)
Parameter Symbol Ratings Unit
No.11039ECT01
Power Supply Voltage VCC 7 V
Output Voltage(Pin No : 4～9, 11～16) VDmax 35 V
Input Voltage(Pin No : 1, 2, 3, 17, 18) VIN -0.3～VCC V
Power Dissipation Pd 1187* mW
Operating Temperature Range Topr -40～+105 ℃
Storage Temperature Range Tstg -55～+150 ℃
Drive Current (DC) IomaxD 50 mA
Drive Current(Pulse) IomaxP 150** mA
Junction Temperature Tjmax 150 ℃
* Pd decreased at 9.50mW/℃ for temperatures above Ta=25℃,mounted on 70×70×1.6mm Glass-epoxy PCB.
** Do not however exceed Pd. Time to impress≦200msec
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2011.05 - Rev.C
BD8105FV
●Operational Conditions (Ta=-40~105℃)
Parameter Symbol
Min. Typ. Max.
Ratings
Power Supply Volta g e Vcc 4.5 5 5.5 V
Drive Current Io - 20 40 mA
* This product is not designed for protection against radioactive rays.
●Electrical Characteristics (Unless specified, Ta=-40~105℃ Vcc=4.5～5.5V)
Parameter Symbol
Min. Typ. Max.
Limits
【Output D0～D11】(Pin No : 4～9, 11～16)
Technical Note
Unit
Unit Conditions
ON Resistor RON - 6 12 Ω ID=20mA
Output leakage current IDL - 0 5 µA VD=34V
【Logic input】(Pin No : 1, 2, 3, 17, 18)
Upper limit threshold voltage VTH
Bottom limit threshold voltage VTL - -
Vcc
×0.8
- - V
Vcc
×0.2
V
Serial clock frequency FCLK - - 1 MHz
Input Current IIN 20 50 100 µA VIN=5V
Input leakage Current IINL - 0 5 µA VIN=0V
【WHOLE】
Serial Data Input,
Circuit Current ICC - 0.3 5 mA
VCC=5V,CLK=500KHz,
SEROUT=OPEN
Static Current ISTN - 0 50 µA
RST_B=OPEN,
SEROUT=OPEN
【SER OUT】(Pin No. : 20)
Output Voltage high VOH 4.6 4.8 - V VCC=5V, ISO=-5mA
Output voltage Low VOL - 0.2 0.4 V VCC=5V, ISO=5mA
* This product is not designed for protection against radioactive rays.
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2011.05 - Rev.C
BD8105FV
V
V
●Electrical Characteristic Diagrams (Unless otherwise specified Ta=25℃)
250
230
25℃
200
150
SUPPLY C URRENT：Icc[ μA]
100
105℃
-40℃
50
225
220
215
210
SUPPLY CURRENT：Icc[μA]
0
012345
SUPPLY VOLTAGE：Vcc[V]
Fig.1 Circuit current 1
205
-40 -15 10 35 60 85
AMBIENT TEMPERATURE ： Ta[℃]
Fig.2 Circuit current 2
8
7
6
5
4
3
2
1
OU TP UT ON RESIS TANC E ： RON[Ω ]
0
-40 -15 10 35 60 85
AMBIENT TEMPERATURE ： Ta[℃]
Fig.4 Dxx on resistance 2
6.0
5V
(at IDD=20mA)
5.5
5.0
4.5
4.0
3.5
OUTPU T VOLTAGE ： VOH[V]
3.0
-40 -15 10 35 60 85
AMBIENT TEMPERATURE ： Ta[℃]
Fig.7 SEROUT high side voltage 2
(at ISO=-5mA)
4.5V
5.5V
5.5V
5V
4.5V
6.0
5.8
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
OUTPUT ON RE SISTANCE ： RON[Ω]
4.0
4.5V
5
5.5
10 20 30 40 50
INPUT CURRENT： I
D
[mA]
Fig.5 Dxx on resistance
0.35
0.30
0.25
0.20
0.15
0.10
OUTPUT VOLTAGE ： VOL[V]
0.05
0.00
4.5 4.7 4.9 5.1 5.3 5.5
105℃
25℃
-40℃
SUPPLY VOLTAGE ： Vcc[V]
Fig.8 SEROUT low side voltage 1
(at ISO=5mA)
5.5V
4.5V
5.0V
Technical Note
10
9
8
7
6
5
4
3
2
OUTPU T RESISTANCE ：RON[Ω]
1
0
4.5 4.7 4.9 5.1 5.3 5.5
Fig.3 Dxx on resistance 1
5.4
5.2
5.0
4.8
4.6
4.4
OUTPU T VOLTAGE ： VOH[V]
4.2
4.0
4.5 4.7 4.9 5.1 5.3 5.5
Fig.6 SEROUT high side voltage 1
0.35
0.30
0.25
0.20
0.15
0.10
OUTPUT VOLTAGE ： VOL[V]
0.05
0.00
-40 -15 10 35 60 85
Fig.9 SEROUT low side voltage 2
105℃
25℃
-40℃
SUPPLYVOLTAGE：Vcc[V]
(at IDD=20mA)
-40℃
25℃
105℃
SUPPLY VOLTAGE： Vcc[V]
(at ISO=-5mA)
4.5V
5V
AMBIENT TEMPERATURE ： Ta[℃]
5.5V
(at ISO=5mA)
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3/12
2011.05 - Rev.C
BD8105FV
SEROUT
CLK
SERIN
D0
D1
D2
D3D4LATCH
RST_B
SDWN
D11D10D9D8D7D6
D
Technical Note
●Block Diagram
SDWN
3
SERIN
17
LATCH
1
CLK
18
RST_B
2
<11:0>
Serial
I/F
19
10
VCC
SEROUT
GND
TSD
<11:0>
<11:0>
<11:0>
Driver
SEROUT
12
13
14
15
16
20
4
D11
5
D10
D9
6
D8
7
8
D7
D6
9
D5
11
D4
D3
D2
D1
D0
Fig.10
●Pin Setup Diagram
BD8105FV(SSOP-B20W)
1
2
3
4
5
6
7
8
GND
9
10
●Terminal Number・Terminal Name
Pin
Number
1 LATCH
20
2 RST_B
19
VCC
18
17
16
3 SDWN
4 D11 Drain Output Terminal 11
5 D10 Drain Output Terminal 10
Terminal
Name
Latch Signal Input Terminal
(H: Latches Data)
Reset Reversal Input Terminal
(L: FF Data 0)
Shutdown Input Terminal
(H: Output Off)
6 D9 Drain Output Terminal 9
15
14
13
12
11
5
7 D8 Drain Output Terminal 8
8 D7 Drain Output Terminal 7
9 D6 Drain Output Terminal 6
10 GND Ground Terminal
11 D5 Drain Output Terminal 5
12 D4 Drain Output Terminal 4
13 D3 Drain Output Terminal 3
14 D2 Drain Output Terminal 2
Fig.11
15 D1 Drain Output Terminal 1
16 D0 Drain Output Terminal 0
17 SERIN Serial Data Input Terminal
18 CLK Clock Input Terminal
19 VCC Supply Voltage Input Terminal
20 SEROUT Serial Data Output Terminal
Function
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4/12
2011.05 - Rev.C
BD8105FV
●Block Operation
1)Serial I/F
The I/F is a 3-line serial (LATCH, CLK, SERIN) style.
12-bit output ON/OFF can be set-up. This is composed of shift register. + 12-bit register.
2)Driver
It is a 12-bit open drain output.
3)TSD (Thermal Shut Down)
To prevent heat damage and overheating, when the chip temperature goes over approximately 175℃, the output turns
off. When the temperature goes back down, normal operation resumes. However, the intended use of the temperature
protection circuit is to protect the IC, so please construct thermal design with the junction temperature Tjmax under
150℃.
●Application Circuit
VCC
Microcomputer
10uF 10uF
VCC
SDWN
LATCH
RST_B
CLK
SERIN
SEROUT
GND
VBAT
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
VCC
10uF
VCC
SDWN
LATCH
RST_B
CLK
SERIN
SEROUT
GND
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
Fig.12
IF=
Technical Note
↓IF
Rres
VF
VBAT - VF
Rres + RON
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5/12
2011.05 - Rev.C
BD8105FV
●Serial Communication
The serial I/F is composed of a shift register which changes the CLK and SERIN serial signals to parallel signals, and a
register to remember those signals with a LATCH signal. The registers are reset by applying a voltage under VCC×0.2 to
the RST_B terminal or opening it, and D11~D0 become open. To prevent erroneous LED lighting, please apply voltage
under VCC×0.2 to RST_B or make it open during start-up.
CLK
SERIN
Shift
Register
12bit 12bit
LATCH
Fig.13
Register
Technical Note
Driver
1)Serial Communication Timing
The 12-bit serial data input from SERIN is taken into the shift register by the rise edge of the CLK signal, and is recorded
in the register by the rise edge of the LATCH signal. The recorded data is valid until the next rise edge of the LATCH
signal.
2)Serial Communication Data
The serial data input configuration of SERIN terminal is shown below:
First → →Last
d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0
Data
Terminal
Name
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Output
Status
d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0
ON 1* * *********
OFF 0* * *********
ON *1 * *********
OFF *0 * *********
ON ** 1 *********
OFF ** 0 *********
ON ** * 1********
OFF ** * 0********
ON ** * *1*******
OFF ** * *0*******
ON ** * **1******
OFF ** * **0******
ON ** * ***1*****
OFF ** * ***0*****
ON ** * ****1****
OFF ** * ****0****
ON ** * *****1***
OFF ** * *****0***
ON ** * ******1**
OFF ** * ******0**
ON ** * *******1*
OFF ** * *******0*
ON ** * ********1
OFF ** * ********0
Data
* represents “Don’t care”.
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2011.05 - Rev.C
BD8105FV
Technical Note
3)Enable Signal
By applying voltage at least VCC×0.8 or more to the SDWN terminal, D0 (16 pin)~D11 (4 pin) become open forcibly.
At this time, the temperature protection circuit (TSD) stops. D11～D0 become PWM operation by inputting PWM to
SDWN(3 pin).
4)SEROUT
A cascade connection can be made (connecting at least 2 or more IC’s in serial).
Serial signal input from SERIN is transferred into receiver IC by the fall edge of the CLK signal.
Since this functionality gives enough margins for the setup time prior to the rise edge of the CLK signal on the receiver
IC (using the exact same CLK signal of sender IC), the application reliability can be improved as cascade connection
functionality.
LATCH
d10
SERIN
d11
d9 d8 d7 d6
d5
d4
d3
d2 d1 d0
CLK
1 2 3 4 5 6 7 8 9 10 11 12
13
SEROUT
D11
Fig.14
●Cascade Connection
By using (at least) 2 ICs, each IC’s D11~D0, at (at least) 24ch, can be controlled by the 24-bit SERIN signal. The serial data
input to the sender IC can be transferred to the receiver IC by inputting 12CLK to the CLK terminal.
Send side IC Receive side IC
ATCH
SERIN
d23
d22
d21 d20 d19 d18
d17
d16
d15
d14 d13 d12
d11
d10
d9 d8 d7 d6
d5
d4
d3
d2 d1
d0
CLK
1 2 3 4 5 6 7 8 9 10 11 12
14 15 16 17 18 19 20 21 22 23 24
13
Fig.15
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2011.05 - Rev.C
BD8105FV
●INPUT SIGNAL’S TIMING CHART
Technical Note
TCK
CLK
CKH
T
TSEST
TSEHD
SERIN
50%
TSEW
LATCH
Fig.16
●INPUT SIGNAL’S TIMING RULE(Ta=-40～105℃ Vcc=4.5～5.5V)
Parameter Symbol Min Unit
50%
TCKL
TLADZ
TLAH
50%
CLK period TCK 1000 ns
CLK high pulse width TCKH 480 ns
CLK low pulse width TCKL 480 ns
SERIN high and low pulse width TSEW 980 ns
SERIN setup time prior to CLK rise TSEST 150 ns
SERIN hold time after CLK fall TSEHD 150 ns
LATCH high pulse time TLAH 480 ns
Last CLK rise to LATCH rise TLADZ 250 ns
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2011.05 - Rev.C
BD8105FV
Technical Note
●OUTPUT SIGNAL’S DELAY CHART
●OUTPUT SIGNAL’S DELAY TIME(Ta=-40～105℃ Vcc=4.5～5.5V)
SDWN
OUTPUT
(D11～D0)
LATCH
OUTPUT
(D11～D0)
CLK
SEROUT
50%
50%
50%
T
DSNH
TDLAH
T
DSOH
50%
50%
50%
Fig.17
T
T
DSNL
DSOL
Parameter Symbol Max Unit
SDWN Switching Time(L→H) TDSNH 300 ns
SDWN Switching Time(H→L) TDSNL 300 ns
LATCH Switching Delay Time TDLAH 300 ns
SEROUT Propagation Delay Time(L→H) TDSOH 350 ns
SEROUT Propagation Delay Time (H→L) TDSOL 350 ns
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2011.05 - Rev.C
BD8105FV
●INPUT/OUTPUT EQUIVALENT CIRCUIT(PIN NAME)
1PIN(LATCH)
2PIN(RST_B)
3PIN(SDWN)
17PIN(SERIN)
18PIN(CLK)
VCC
4PIN(D11),5PIN(D10)
6PIN(D9),7PIN(D8)
8PIN(D7),9PIN(D6)
11PIN(D5),12PIN(D4)
13PIN(D3),14PIN(D2)
15PIN(D1),16PIN(D0)
100k
(TYP)
Fig.18
20PIN(SEROUT)
VCC
Technical Note
VCC
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10/12
2011.05 - Rev.C
BD8105FV
(
)
(
)
(
)
Technical Note
●Notes for use
(1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may
result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such
damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special
mode where the absolute maximum ratings may be exceeded is anticipated.
(2) Reverse connection of a power supply connector
If the connector of power is wrong connected, it may result in IC breakage. In order to prevent the breakage from the
wrong connection, the diode should be connected between external power and the power terminal of IC as protection
solution.
(3) GND potential
Ensure a minimum GND pin potential in all operating conditions.
(4) Setting of heat
Use a setting of heat that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
(5) Pin short and mistake fitting
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating
temperature range may result in IC damage.
(6) Actions in strong magnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
(7) Thermal shutdown circuit(TSD)
This IC built-in a Thermal shutdown circuit (TSD circuit). If Chip temperature becomes 175℃(TYP.), make the output an
Open state. Eventually, warmly clearing the circuit is decided by the condition of whether the heat excesses over the
assigned limit, resulting the cutoff of the circuit of IC, and not by the purpose of preventing and ensuring the IC. Therefore,
the warm switch-off should not be applied in the premise of continuous employing and operation after the circuit is
switched on.
(8) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure,
and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process
(9) IC terminal input
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of
parasitic elements. For example, when a resistor and transistor are connected to pins. (See the chart below.)
the P/N junction functions as a parasitic diode when
GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN).
Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer
of other adjacent elements to operate as a parasitic NPN transistor.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result
of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC
malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will
trigger the operation of parasitic elements, such as by the application of voltages lower than the GND (PCB) voltage to
input pins.
(Pin A)
N
P
(10) Ground wiring patterns
Resistor
N
GND
P
～
～
P+ P+
N
Parasitic el ements
Transistor (NPN)
Pin B
C
P+
N N
Parasitic elements
B
N
N
P substrate
～
～
E
P
GND
GND
P+
Pin B
Pin A
C
B
～
～
E
GND
Parasitic
elements
GND
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the application's reference po
int so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring patterns of any external components.
Parasitic
elements
～
～
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11/1 2
2011.05 - Rev.C
BD8105FV
●Ordering part number
B D 8 1 0 5 F V - E 2
Part No. Part No.
SSOP-B20W
6.5 ± 0.2
20 11
8.1 ± 0.3
6.1 ± 0.2
1
0.3Min.
10
0.15 ± 0.1
Package
FV: SSOP-B20W
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
2000pcs
E2
The direction is the 1pin of product is at the upper left when you hold
()
reel on the left hand and you pull out the tape on the right hand
Packaging and forming specification
E2: Embossed tape and reel
Technical Note
1.7 ± 0.2
0.11
0.65
0.22 ± 0.1
0.1
Direction of feed
(Unit : mm)
Reel
1pin
Order quantity needs to be multiple of the minimum quantity.
∗
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12/12
2011.05 - Rev.C
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specied herein is subject to change for improvement without notice.
The content specied herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specied in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specied herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specied in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, ofce-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specied in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, re or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, re control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transpor tation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any
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obtain a license or permit under the Law.
Notice
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A
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