●Description
High voltage operable CMOS Op- A m p BD7561/BD7541 family and BD7562/BD7542 family Integrate one or two independent
input-output fullswing Op-amps and phase compesation capacitorson a single chip.
Especially, characteristics are wide operati ng vol t age range o f +5[V]~+14.5[V](single power supply),low supply current and little
input bias current.
Supply Voltage VDD-VSS+15.5 V
Differential Input Voltage
(*1)
Vid VDD-VSS V
Input Common-mode Voltage Range Vicm (VSS-0.3)~(VDD+0.3) V
Operating Temperature Topr -40~+85 -40~+105 ℃
Storage Temperature Tstg -55~+125 ℃
Maximum Junction Temperature Tjmax +125 ℃
Note: Absolute maximum rating item indicates the condition which must not be exceeded.
Application of voltage in excess of absolute maximum rating or use out absoluted maximum rated temperature environment may cause deterioration of characteristics.
(*1) The voltage difference between inverting input and non-inverting input is the differential input voltage.
Then input terminal voltage is set to more then VSS.
●Electric Characteristics
○BD7561
Input Offset Voltage
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage VOH 25℃ VDD-0.1- - VRL=10[kΩ]
Low Level Output Voltage
family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[℃])
Parameter Symbol
(*2)(*4)
Vio
(*2)
Iio 25℃ - 1 - pA-
(*2)
Ib 25℃ - 1 - pA-
T emperature
range
25℃ - 1 9
Full range- - 10
25℃ - 370 550
(*4)
IDD
Full range- - 600
25℃ - 440 650
Full range- - 700
VOL 25℃ - - VSS+0.1VRL=10[kΩ]
Guaranteed limit
BD7561G,BD7561SG
Min. Typ. Max.
UnitCondition
mV VDD=5~14.5[V],VOUT=VDD/2
RL=∞ All Op-Amps
AV=0[dB],VDD=5[V],VIN=2.5[V]
μA
RL=∞ All Op-Amps
AV=0[dB],VDD=12[V],VIN=6.0[V]
Large Single Voltage Gain AV 25℃ 70 95 - dB RL=10[kΩ]
Input Common-mode Voltage Range Vicm 25℃ 0 - 12 VVDD-VSS=12[V]
Common-mode Rejection Ratio CMRR 25℃ 45 60 - dBPower Supply Rejection Ratio PSRR 25℃ 60 80 - dBOutput Source Current
Output Sink Current
(*3)
IOH 25℃ 3 8 - mA VDD-0.4[V]
(*3)
IOL 25℃ 4 14 - mA VSS+0.4[V]
Slew Rate SR 25℃ - 0.9 - V/μs CL=25[pF]
Gain Bandwidth Product FT 25℃ - 1.0 - MHz CL=25[pF], AV=40[dB]
Phase Margin θ 25℃ - 50° - - CL=25[pF], AV=40[dB]
Total Harmonic Distortion THD 25℃ - 0.05 - %VOUT=1[Vp-p],f=1[kHz]
(*2) Absolute value
(*3) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
(*4) Full range:BD7561:Ta=-40[℃]~+85[℃] BD7561S:Ta=-40[℃]~+105[℃]
○BD7562 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[℃])
Guaranteed limit
Parameter Symbol
T emperature
range
BD7562F/FVM
BD7562SF/FVM
UnitCondition
Min. Typ. Max.
Input Offset Voltage
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage VOH 25℃ VDD-0.1- - VRL=10[kΩ]
Low Level Output Voltage
(*2)(*4)
Vio
(*2)
Iio 25℃ - 1 - pA-
(*2)
Ib 25℃ - 1 - pA-
(*4)
IDD
VOL 25℃ - - VSS+0.1VRL=10[kΩ]
25℃ - 1 9
Full range- - 10
25℃ - 750 1300
Full range- - 1500
25℃ - 900 1400
Full range- - 1600
mV VDD=5~14.5[V],VOUT=VDD/2
RL=∞ All Op-Amps
AV=0[dB],VDD=5[V],VIN=2.5[V]
μA
RL=∞ All Op-Amps
AV=0[dB],VDD=12[V],VIN=6.0[V]
Large Single Voltage Gain AV 25℃ 70 95 - dB RL=10[kΩ]
Input Common-mode Voltage Range Vicm 25℃ 0 - 12 VVDD-VSS=12[V]
Common-mode Rejection Ratio CMRR 25℃ 45 60 - dBPower Supply Rejection Ratio PSRR 25℃ 60 80 - dBOutput Source Current
Output Sink Current
(*3)
IOH 25℃ 3 8 - mA VDD-0.4[V]
(*3)
IOL 25℃ 4 14 - mA VSS+0.4[V]
Slew Rate SR 25℃ - 0.9 - V/μs CL=25[pF]
Gain Bandwidth Product FT 25℃ - 1.0 - MHz CL=25[pF], AV=40[dB]
Phase Margin θ 25℃ - 50° - - CL=25[pF], AV=40[dB]
Total Harmonic Distortion THD 25℃ - 0.05 - %VOUT=1[Vp-p],f=1[kHz]
(*2) Absolute value
(*3) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
(*4) Full range: BD7562:Ta=-40[℃]~+85[℃] BD7562S:Ta=-40[℃]~+105[℃]
○BD7541 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[℃])
Parameter Symbol
Input Offset Voltage
Input Offset Current
Input Bias Current
(*5)(*7)
Vio
(*5)
Iio 25℃ - 1 - pA-
T emperature
range
25℃ - 1 9
Full range- - 10
Ib 25℃ - 1 - pA-
25℃ - 170 300
Supply Current
(*7)
IDD
Full range- - 400
25℃ - 180 320
Full range- - 420
High Level Output Voltage VOH 25℃ VDD-0.1- - VRL=10[kΩ]
Low Level Output Voltage
VOL 25℃ - - VSS+0.1VRL=10[kΩ]
Guaranteed limit
BD7541G,BD7541SG
Min. Typ. Max.
UnitCondition
mV VDD=5~14.5[V],VOUT=VDD/2
RL=∞ All Op-Amps
AV=0[dB],VDD=5[V],VIN=2.5[V]
μA
RL=∞ All Op-Amps
AV=0[dB],VDD=12[V],VIN=6.0[V]
Large Single Voltage Gain AV 25℃ 70 95 - dB RL=10[kΩ]
Input Common-mode Volt age Range Vicm 25℃ 0 - 12 VVDD-VSS=12[V]
Common-mode Rejection Ratio CMRR 25℃ 45 60 - dBPower Supply Rejection Ratio PSRR 25℃ 60 80 - dBOutput Source Current
Output Sink Current
(*6)
IOH 25℃ 2 4 - mA VDD-0.4[V]
(*6)
IOL 25℃ 3 7 - mA VSS+0.4[V]
Slew Rate SR 25℃ - 0.3 - V/μs CL=25[pF]
Gain Bandwidth Product FT 25℃ - 0.6 - MHz CL=25[pF], AV=40[dB]
Phase Margin θ 25℃ - 50° - - CL=25[pF], AV=40[dB]
Total Harmonic Distortion THD 25℃ - 1 9 %VOUT=1[Vp-p],f=1[kHz]
(*5) Absolute value
(*6) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
(*7) Full range:BD7541:Ta=-40[℃]~+85[℃] BD7541S:Ta=-40[℃]~+105[℃]
○BD7542 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[℃])
Guaranteed limit
Parameter Symbol
T emperature
range
BD7542 F/FVM
BD7542S F/FVM
UnitCondition
Min. Typ. Max.
Input Offset Voltage
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage VOH 25℃ VDD-0.1- - VRL=10[kΩ]
Low Level Output Voltage
(*5)(*7)
Vio
(*5)
Iio 25℃ - 1 - pA-
(*7)
IDD
Ib 25℃ - 1 - pA-
VOL 25℃ - - VSS+0.1VRL=10[kΩ]
25℃ - 1 9
Full range- - 10
25℃ - 340 650
Full range- - 850
25℃ - 400 780
Full range- - 900
mV VDD=5~14.5[V],VOUT=VDD/2
RL=∞ All Op-Amps
AV=0[dB],VDD=5[V],VIN=2.5[V]
μA
RL=∞ All Op-Amps
AV=0[dB],VDD=12[V],VIN=6.0[V]
Large Single Voltage Gain AV 25℃ 70 95 - dB RL=10[kΩ]
Input Common-mode Volt age Range Vicm 25℃ 0 - 12 VVDD-VSS=12[V]
Common-mode Rejection Ratio CMRR 25℃ 45 60 - dBPower Supply Rejection Ratio PSRR 25℃ 60 80 - dBOutput Source Current
Output Sink Current
(*6)
IOH 25℃ 2 4 - mA VDD-0.4[V]
(*6)
IOL 25℃ 3 7 - mA VSS+0.4[V]
Slew Rate SR 25℃ - 0.3 - V/μs CL=25[pF]
Gain Bandwidth Product FT 25℃ - 0.6 - MHz CL=25[pF], AV=40[dB]
Phase Margin θ 25℃ - 50° - - CL=25[pF], AV=40[dB]
Total Harmonic Distortion THD 25℃ - 0.05 - %VOUT=1[Vp-p],f=1[kHz]
(*5) Absolute value
(*6) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
(*7) Full range:BD7542:Ta=-40[℃]~+85[℃] BD7542S:Ta=-40[℃]~+105[℃]