●Descriptions
The BD7003NUX, BD7004NUX are dual channels, 300mA low-dropout voltage regulator output at each channel. The output
voltage range is from 1.2V to 3.3V by operating range from 2.5V to 5.5V. The output voltages, VOUT1 and VOUT2, are
determined at power up by the state of P1 and P2(see the table of “Output-Voltage Programming”). The BD7003NUX,
BD7004NUX offer 1.8% accuracy and low-dropout. The shutdown current is near the zero current which is suitable for
battery powered device. The BD7003NUX, BD7004NUX are mounted on VSON008X2020(2.0mmX2.0mmX0.6mm), which
contributes to the space-saving design of set.
●Features
1) 2-channel 300mA, CMOS-type LDOs.
2) Pin-Programmable Output Voltage.
(9 steps adjustable VO;See the Table of “Output-Voltage Programming”.)
3) LDOs Power ON/OFF Enable Control.
4) 2.0mm×2.0mm Package.
5) Small Ceramic Output Capacitors(1μF).
6) Equipped with Over Current Limiter and Thermal Shutdown Circuit(TSD) .
●Applications
Battery-powered portable equipment, etc.
No.12020ECT09
●Absolute Maximum Ratings (T a = 25℃)
Parameter Symbol Ratings Unit
Maximum Supply Voltage (VIN) VIN -0.3 ~ 7 V
Maximum Input Voltage 1 (P1,P2,EN1,EN2) VINMAX1-0.3 ~ 7 V
Maximum Input Voltage 2 (Vout1,Vout2) VINMAX2-0.3~Vin+0.3 V
Power Dissipation Pd 1360*1 mW
Operating Temperature Range Topr -40 ~ +85 ℃
Storage Temperature Range Tstg -55 ~ +150 ℃
*1 This is the allowable loss of when it is mounted on a ROHM specification board 40mm×40mm×1.5mmt To use at temperature higher than 25C , derate 10.9mW per 1℃
* This product is not especially designed to be protected from radioactivity.
As for power dissipation, an approximate estimate of the heat reduction characteristics and internal power consumption of IC
are shown, so please use these for reference. Since power dissipation changes substantially depending on the
implementation conditions (board size, board thickness, metal wiring rate, number of layers and t hrough holes, etc.), it is
recommended to measure Pd on a set board. Exceeding the power dissipation of IC may lead to deterioration of the original
IC performance, such as causing operation of the thermal shutdown circuit or reduction in current capability. Therefore, be
sure to prepare sufficient margin within power dissipation for usage.
Calculation of the maximum internal power consumption of IC (PMAX) PMAX=(VIN-VOUT)×IOUT(MAX.)
(VIN: Input voltage VOUT: Output voltage IOUT(MAX): Maximum output current)
Measurement conditions
Layout of Board for
Measurement
(Unit: mm)
IC
Implementation
Position
Power Dissipation 1.36W
Thermal Resistance θja=91.9℃/W
1.6
Evaluation Bor d1
1.4
1.36W
1.2
1.0
0.8
0.6
Power Dissipation : Pd (W)
0.4
0.2
0.0
025507510012515017520 0
Fig.1. VSON008X2020 Power dissipation heat reduction characteristics (Reference)
* Please design the margin so that PMAX becomes is than Pd (PMAXPd)
*This product is not especially designed to be protected from radioactivity.
PIN Name
Set up
Output Voltage Programming Input (P1、P2)
Output voltages, VOUT1 and VOUT2, are determined at power up by the state of P1 and P2 (see the table of
“Output-Voltage Programming”). Subsequent charges to P1 and P2 do not change the output voltages unless the supply
power is cycled, or all EN inputs are simultaneously driven low to shutdown the device.
Shutdown (EN1, EN2)
The BD7003NUX, BD7004NUX have independ ent shutdown control inputs, EN1 and EN2. Driving both EN1 and EN2
low will shut down the entire device, reducing supply current to 1μA max. Connecting EN1 and EN2 to a logic-high or
VIN will enable the corresponding output(s). It is prohibited to open EN1, EN2 switches.
ViH 1.2 - ViL - - 0.5 Regulator shutdown
Output-Voltage Programming
BD7003NUX BD7004NUX
P1 P2 VOUT1 VOUT2 VOUT1 VOUT2
OPEN OPEN 1.50 2.80 1.20 1.50
OPEN GND 1.80 2.60 1.20 1.80
OPEN VIN 1.80 2.70 1.80 1.50
Note : Recommend connecting the Thermal Pad to the GND for excellent power dissipation.
PIN No. Name I/O
1 VIN I - O Voltage Supply
2 EN1 I - O Enable Input1
3 P2 I O O Control Output-Voltage PIN2
4 P1 I O O Control Output-Voltage PIN1
5 EN2 I - O Enable Input2
6 GND - O - GND PIN
7 VOUT2 O - O LDO1 Output1
8 VOUT1 O - O LDO2 Output2
●Example of EN1&EN2 used (P1=GND,P2=OPEN, VOUT1=1.8V, VOUT2=2.8V)
Output overshoot conditions
Whenever the LDO is turned ON, LDO1 output overshoot occurs in certain boot conditions.
In CASE2, the overshoot value is minimum, which boot order is EN1→EN2.
The maximum over shoot occurs in CASE3, which boot order is EN2→EN1.
The overshoot value differs between input voltages(VIN), output voltage setting and EN1, EN2 input timing interval.
If applied voltage (VIN), operating temperature range (Topr), or other absolute maximum ratings are exceeded, there is
a risk of damage. Since it is not possible to identify short, open, or ot her damage modes, if special modes in which
absolute maximum ratings are exceeded are assumed, consider applying fuses or other physical safety measures.
(2) Recommended operating range
This is the range within which it is possible to obtain roughly the expected characteristics. For electrical characteristics,
it is those that are guaranteed under the conditions for each parameter. Even when these are within the recommended
operating range, voltage and temperature characteristics are indicated.
(3) Reverse connection of power supply connector
There is a risk of damaging the IC by reverse connection of the power supply connector. For protection from reverse
connection, take measures such as externally placing a diode between the power suppl y and the power supply pin of
the IC.
(4) Power supply lines
In the design of the board pattern, make power supply and GND line wiring low impedance.
When doing so, although the digital power supply and anal og power supply are the same potential, separate the digital
power supply pattern and analog power supply pattern to deter digital noise from entering the analog power supply due
to the common impedance of the wiring patterns. Similarly take pattern design into account for GND lines as well.
Furthermore, for all power supply pins of the IC, in conjunction with inserting capacitors between power supply and GND
pins, when using electrolytic capacitors, determine constants upon adequately confirming that capacitance loss
occurring at low temperatures is not a problem for various characteristics of the capacitors used.
(5) GND voltage
Make the potential of a GND pin such that it will be the lowest potential even if operating below that. In additi on,
confirm that there are no pins for which the potential becomes less than a GND by actually including transition
phenomena.
(6) Shorts between pins and misinstallation
When installing in the set board, pay adequate attention to orientation and placement discrepancies of the IC. If it is
installed erroneously, there is a risk of IC damage. There also is a risk of damage if it is shorted by a foreign substance
getting between pins , between a pin and a power supply or GND.
(7) Operation in strong magnetic fields
Be careful when using the IC in a strong magnetic field, since it may malfunction.
(8) Inspection in set board
When inspecting the IC in the set board, since there is a risk of stress to the IC when capacitors are connected to lo w
impedance IC pins, be sure to discharge for each process. Moreover, when getting it on and off of a jig in the
inspection process, always connect it after turning off the power supply, perform the inspection, and remove it after
turning off the power supply. Furthermore, as countermeasures against static electricity, use grounding in the
assembly process and take appropriate care in transport and storage.
(9) Input pins
Parasitic elements inevitably are formed on an IC structure due to potential relations hips. Because parasitic elements
operate, they give rise to interference with circuit operation and may be the cause of malfunctions as well as damage.
Accordingly, take care not to apply a lower voltage than GND to an input pin or use the IC in other ways such that
parasitic elements operate. Moreover, do not apply a voltage to an input pin when the power supply voltage is not
being applied to the IC. Furthermore, when the power supply voltage is being applied, make each input pin a voltage
less than the power supply voltage as well as within the guaranteed values of electrical characteristics.
(10) Ground wiring pattern
When there is a small signal GND and a large current GND, it is recommended that you separate the large current GND
pattern and small signal GND pattern and provide single point grounding at the reference point of the set so that voltage
variation due to resistance components of the pattern wiring and large currents do not cause the small signal GND
voltage to change. Take care that the GND wiring pattern of externally attached components also does not change.
(11) Externally attached capacitors
When using ceramic capacitors for externally attached capacitors, determine constants upon taking into account a
lowering of the rated capacitance due to DC bias and capacitance change due to factors such as temperature.
(12) Thermal shutdown circuit (TSD)
When the junction temperature becomes 180℃ (typ) or higher, the thermal shutdown circuit operates and turns the
switch OFF. The thermal shutdown circuit, which is aimed at isolating the IC from thermal runaway as much as possible,
is not aimed at the protection or guara
operating or use the IC assuming its operation.
(13) Thermal design
Perform thermal design in which there are adequate margins b y taking into account the permissible dissipation (Pd) in
actual states of use.
Technical Note
ntee of the IC. Therefore, do not continuously use the IC with this circuit
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