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STRUCTURE Silicon Monolithic Integrated Circuit
PRODUCT SERIES Single-Phase Full-Wave Motor Driver for Fan Motor
TYPE
ＢＤ６７２２ＦＳ
FEATURES Speed controllable by DC / PWM input
Current limit circuit
PWM soft switching drive
〇ABSOLUTE MAXIMUM RA TINGS
Parameter Symbol Limit Unit
Supply voltage Vcc
Power dissipation Pd
Operating temperature Topr
Storage temperature Tstg
High side output voltage VOH
Low side output voltage VOL
Low side output current Iomax
Signal output current IFG/IAL
Signal output voltage VFG/VAL
VREF current ability IVREF
VTH input voltage VVTH
Junction temperature Tjmax
20 V
812.5＊
-40～+100 ℃
-55～+150 ℃
34 V
34 V
1.5＊＊
10 mA
20 V
8 mA
15 V
150
＊ Reduce by 6.5mW/℃ over Ta=25℃.
(On 70.0mm×70.0mm×1.6mm glass epoxy board)
＊＊ This value is not to exceed Pd.
〇OPERATING CONDITIONS
Parameter Symbol Limit Unit
Operating supply voltage range Vcc
Hall input voltage range VH
VMIN input voltage range VVMIN
＊This product is not designed for production against radioactive rays.
＊This document may be strategic data subject to COCOM regulations.
4.5～17.0
0～Vcc-2.0
0～Vcc-2.0
mW
A
℃
V
V
V
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〇ELECTRICAL CHARACTERISTICS (Unless otherwise specified Ta=25℃,Vcc=12V)
Parameter Symbol
Min. Typ. Max.
Limit
Unit Conditions
Circuit current Icc 5.0 8.0 11.0 mA
Hall input hysteresis VHYS ±5 ±10 ±15 mV
High side output current
IH 5 10
15
mA
High side output leak current IHL - - 10 μA VOH=34V
Low side output voltage
VL - 0.3 0.45 V
Io=600mA
Lock detection ON time TON 0.18 0.3 0.42 s
Lock detection OFF time TOFF 3.6 6.0 8.4 s
FG output low voltage VFGL - 0.15 0.3 V IFG=5mA
FG output leak current IFGL - - 10 μA VFG=17V
AL output low voltage VALL - 0.15 0.3 V IAL=5mA
AL output leak current IALL - - 10 μA VAL=17V
OSC low voltage VOSCL 0.8 1.0 1.2 V
OSC high voltage VOSCH 2.24 2.44 2.64 V
OSC charge current ICOSC -50 -32 -26 μA
OSC discharge current IDOSC 26 32 50 μA
VTH=VREF*0.429
Output ON duty 1 DUTY1 75 80 85 %
H side pull up R=1kΩ
COSC=470pF
VTH=VREF*0.573
Output ON duty 2 DUTY2 45 50 55 %
H side pull up R=1kΩ
COSC=470pF
VTH=VREF*0.717
Output ON duty 3 DUTY3 15 20 25 %
H side pull up R=1kΩ
COSC=470pF
VREF voltage VREF 2.8 3.0 3.2 V IVREF=-2mA
Current limit voltage VCL 320 350 380 mV
VTH bias current IVTH - - 0.2 μA
VMIN bias current IVMIN - - 0.2 μA
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A
A2HA
〇P ACKAGE OUTLINES
4.4±0.2
6.6±0.2
16
BD6722
1
9
8
Lot No.
0.3Min.
0.15±0.1
6.2±0.3
1.5±0.1
0.8
0.11
0.36±0.1
0.1
SSOP-A16 (UNIT:mm)
〇BLOCK DIAGRAM 〇TERMINAL NAME
COSC
VMIN
GND
1
2
3
VTH
4
Vcc
5
A1H
6
A1L
7
RNF
8
COSC VREF
+
-
+
-
PRE
DRIVER
POW
POW
SOFT
START
SOFT
SWITCH
VMIN
PWMCOMP
VTH
PWMCOMP
CONTROL
LOGIC
SIGNAL
OUTPUT
TSD
LOCK
PROTECTION
HALL COMP
CURRENT
LIMIT COMP
+
-
+
-
L
16
FG
15
VREF
14
H-
13
H+
12
CS
11
10
2L
9
PIN No.
1 GND
2 COSC
3 VMIN
4 VTH
5 Vcc
6 A1H
7 A1L
8 RNF
9 A2L
10 A2H
11 CS
12 H+
13 H14 VREF
15 FG
16 AL
Terminal
name
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〇CAUTIONS ON USE
1) Absolute maximum ratings
An excess in the absolute maximum rations, such as supply voltage, temperature range of ope rating conditions, etc., can break
down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated
values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
2) Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An
external direction diode can be added.
3) Power supply line
Back electromotive force causes regenerated current to power supply line, therefore take a measure such as placing a capacitor
between power supply and GND for routing regenerated current. And fully ensure that the capacitor characteristics have no problem
before determine a capacitor value. (when applying electrolytic capacitors, capacitance characteristic values are reduced at low
temperatures)
4) GND potential
The potential of GND pin must be minimum potential in all operating conditions. Also ensure that all terminals except GND terminal
do not fall below GND voltage including transient characteristics. However, it is possible that the motor output terminal may deflect
below GND because of influence by back electromotive force of motor. Malfunction may possibly occur depending on use condition,
environment, and property of individual motor. Please make fully confirmation that no problem is found on operation of IC.
5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation(Pd) in actual operating conditions.
6) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error
or if pins are shorted together.
7) Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
8) ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum rations or ASO.
9) Thermal shut down circuit
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). Operation temperature is 175℃(typ.) and has a hysteresis width
of 25℃(typ.). When IC chip temperature rises and TSD circuit works, the output terminal become s an open state. TSD circuit is
designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not
continue to use the IC after operation this circuit or use the IC in an environment where the operation of this circuit is assumed.
10) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always
discharge capacitors after each process or step. Always turn the IC’s power supply off before connecting it to or removing it from a
jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution
when transporting or storing the IC.
11) GND wiring pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single
ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large
currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external
components, either.
12) Capacitor between output and GND
When a large capacitor is connected between output and GND, if Vcc is shorted with 0V or GND for some cause, it is possible that
the current charged in the capacitor may flow into the output resulting in destruction. Keep the capacitor between output and GND
below 100uF.
13) IC terminal input
When Vcc voltage is not applied to IC, do not apply voltage to each input terminal. When voltage above Vcc or below GND is
applied to the input terminal, parasitic element is actuated due to the structure of IC. Operation of parasitic element causes mutual
interference between circuits, resulting in malfunction as well as destruction in the last. Do not use in a manner where parasitic
element is actuated.
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Appendix
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The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account
when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
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sponsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples
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Appendix-Rev4.0
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