Multifunction Single-phase Full-wave
Fan Motor Driver
BD6721FS
●General description
BD6721FS is a 1chip driver that composes H-bridge of
power DMOS FET.
Moreover, because the level amplifier is installed, the
temperature control by the thermistor is also easy.
●Features
Driver including power DMOS FET
Speed controllable by DC / direct PWM input
PWM soft switching
Quick start
Current limit
Lock protection and automatic restart
Rotation speed pulse signal (FG) output
Lock alarm signal (AL) output
●Application
Fan motors for general consumer equipment of desktop PC, and Projector, etc.
●Absolute maximum ratings
Parameter Symbol Limit Unit
Supply voltage Vcc 20 V
Power dissipation Pd 812.5
Operating temperature range Topr –40 to +100 °C
Storage temperature range Tstg –55 to +150 °C
Output voltage Vo 20 V
Output current Io 1.0
Rotation speed pulse signal (FG) output voltage Vfg 20 V
Rotation speed pulse signal (FG) output current Ifg 10 mA
Lock alarm signal (AL) output voltage Val 20 V
Lock alarm signal (AL) output current Ial 10 mA
Reference voltage (REF) output current Iref 8 mA
Junction temperature Tj 150 °C
*1 Reduce by 6.5mW/°C over Ta=25°C. (On 70.0mm×70.0mm×1.6mm glass epoxy board)
*2 This value is not to exceed Pd.
●Recommended operating conditions
Parameter Symbol Limit Unit
Operating supply voltage range Vcc 4.5 to 17.0 V
Operating input voltage range
(H+, H–, TH, MIN, LAIN) (more than Vcc=9V)
Operating input voltage range
(H+, H–, TH, MIN, LAIN) (less than Vcc=9V)
●Package W (Typ.) x D (Typ.) x H (Max.)
SSOP-A16 6.60mm x 6.20mm x 1.71mm
*1
mW
*2
A
0 to 7 V
Vin
0 to Vcc–2 V
SSOP-A16
○Product structure:Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays
www.rohm.com
●Application circuit example(Constant values are for reference)
Output PWM frequency setting Hall bias is set according to the
Circuit that converts PWM duty
into DC voltage
to 1000pF
PWM
Minimum output duty setting
Maximum output voltage and
current are 20V and 1.0A.
To limit motor current, the
current is detected.
Note the power consumption of
detection resistance.
0.33Ω to
-
Gain setting according to
thermistor characteristic
Fig.25 PWM controllable 4 wires type (FG) motor application circuit
to 1000pF
Temperature control setting by
thermistor and linearized
resistance
330pF
330pF
1
2
3
4
5
6
7
8
1
2
3
4
5
GND
OSC
LA
OUT
LA
IN
TH
MIN
OUT1
RNF
GND
OSC
LA
OUT
LA
IN
TH
LEVEL
AMP
LEVEL
AMP
TSD
OSC
QUICK
START
PWM
COMP
PWM
COMP
PWM SOFT
SWITCHING
CONTROL
LOGIC
PRE-
DRIVER
SIGNAL
OUTPUT
SIGNAL
OUTPUT
HALL
AMP
HALL
COMP
PROTECT
M
So bypass capacitor, arrangement near
to Vcc terminal as much as possible
TSD
OSC
PWM
COMP
PWM
COMP
PWM SOFT
SWITCHING
CONTROL
LOGIC
SIGNAL
OUTPUT
SIGNAL
OUTPUT
HALL
AMP
HALL
COMP
PROTECT
REF
LOCK
REF
LOCK
Vcl
CURRENT
LIMIT COMP
OUT2
AL
FG
REF
H–
H+
Vcc
CS
AL
FG
REF
H–
H+
16
15
14
13
12
11
10
9
16
15
14
13
12
0.1µF to
1µF to
0.1µF to
Protection of FG open-drain
0Ω to
H
SIG
Stabilization of REF voltage
amplitude of hall element
output and hall input voltage
range.
Noise measures of su bstrate
Reverse-connected prevention
of the FAN connector
+
100pF
to 0.1µF
200Ω
to 20kΩ
Low-pass filter for RNF voltage
smoothing
Measure against back EMF
0Ω to
Protection of AL open-drain
SIG
H
6
7
8
MIN
OUT1
RNF
QUICK
START
PRE-
DRIVER
Vcl
CURRENT
LIMIT COMP
OUT2
Vcc
CS
11
10
9
1µF to
100pF
to 0.1µF
+
200Ω
to 20kΩ
0.33Ω to
M
-
Fig.26 Thermistor controllable 3 wires type (AL) motor application circuit
Substrate design note
a) IC power, motor outputs, and motor ground lines are made as fat as possible.
b) IC ground (signal ground) line is common with the application ground except motor ground (i.e. hall ground etc.),
and arranged near to (–) land.
c) The bypass capacitor and/or Zenner diode are arrangement near to Vcc terminal.
d) H+ and H– lines are arranged side by side and made from the hall element to IC as shorter as possible,
because it is easy for the noise to influence the hall lines.
Power dissipation (total loss) indicates the power that can be consumed by IC at Ta=25°C (normal temperature). IC is
heated when it consumes power, and the temperature of IC chip becomes higher than ambient temperature. The
temperature that can be accepted by IC chip depends on circuit configuration, manufacturing process, etc, and consumable
power is limited. Power dissipation is determined by the temperature allowed in IC chip (maximum junction temperature)
and thermal resistance of package (heat dissipation capability). The maximum junction temperature is in general equal to
the maximum value in the storage temperature range.
Heat generated by consumed power of IC is radiated from the mold resin or lead frame of package. The parameter which
indicates this heat dissipation capability (hardness of heat release) is called heat resistance, represented b y the symbol
θja[°C/W]. This heat resistance can estimate the temperature of IC inside the package. Fig.27 shows the model of heat
resistance of the package. Heat resistance θja, ambient temperature Ta, junction temperature Tj, and power consumption P
can be calculated by the equation below:
θja = (Tj – Ta) / P [°C/W]
Thermal de-rating curve indicates power that can be consumed by IC with reference to ambient temperature. Power that
can be consumed by IC begins to attenuate at certain ambient temperature. This gradient is determined by thermal
resistance θja. Thermal resistance θja depends on chip size, power consumption, package ambient temperature, packaging
condition, wind velocity, etc., even when the same package is used. Thermal de-rating curve indicates a reference value
measured at a specified condition. Fig.28 shows a thermal de-rating curve (Value when mounting FR4 glass epoxy board
70[mm] x 70[mm] x 1.6[mm] (copper foil area below 3[%])). Thermal resistance θjc from IC chip joint part to the package
surface part of mounting the above-mentioned same substrate is shown in the following as a reference value.
1) Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc.,
can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open
circuit. If any over rated values will expect to exceed the absolute maximu m ratings, consider adding circuit protecti on
devices, such as fuses.
2) Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power
supply lines. An external direction diode can be added.
3) Power supply line
Back electromotive force causes regenerated current to power supply lin e , therefore take a measure s u ch as plac ing a
capacitor between power supply and GND for routing regenerated current. And fully ensure that the capacitor
characteristics have no problem before determine a capacitor value. (When applying electrolytic capacitors,
capacitance characteristic values are reduced at low temperatures)
4) GND potential
It is possible that the motor output terminal may deflect below GND terminal because of influence by back
electromotive force of motor. The potential of GND terminal must be minimum potential in all operating conditions,
except that the levels of the motor outputs terminals are under GND level by the back electromotive force of the motor
coil. Also ensure that all terminals except GND and motor output terminals do not fal l below GND voltage including
transient characteristics. Malfunction may possibly occur depending on use con dition, environment, and property of
individual motor. Please make fully confirmation that no problem is found on operation of IC.
5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating
conditions.
6) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
7) Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
8) ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum rations or ASO.
9) Thermal shut down circuit
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). Operation temperat ure is 175°C (typ.) and has a
hysteresis width of 25°C (typ.). When IC chip temperature rises and TSD circuit works, the output terminal becomes an
open state. TSD circuit is designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the
IC or guarantee its operation. Do not continue to use the IC after operation this circuit or use the IC in an environment
where the operation of this circuit is assumed.
10) Testing on application boards
When testing the IC on an application board, connecting a ca pacitor to a pin with low impedance subjects the IC to
stress. Always discharge capacitors after each process or step. Always turn the IC’s power supply off before
connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps
as an antistatic measure. Use similar precaution when transporting or storing the IC.
11) GND wiring pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to
change the GND wiring pattern of any external components, either.
12) Capacitor between output and GND
When a large capacitor is connected between output and GND, if Vcc is shorted with 0V or GND for some cause, it is
possible that the current charged in the capacitor may flow into the output resulting in destruction. Keep the capacitor
between output and GND below 100µF.
13) IC terminal input
When Vcc voltage is not applied to IC, do not apply voltage to each input terminal. When voltage above Vcc or belo w
GND is applied to the input terminal, parasitic element is actuated due to the structure of IC. Operation of parasitic
element causes mutual interference between circuits, resulting in malfunct ion as well as destruction in the last. Do not
use in a manner where parasitic element is actuated.
14) In use
e are sure that the example of application circuit is preferable, but please check the character further more in
W
application to a part that requires high precision. In using the unit with external circuit constant changed, consider the
variation of externally equipped parts and our IC including not only static character but also transient character and
allow sufficient margin in determining.
●Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a
reference to help reading the formal version.
If there are any differences in translation version of this document, formal version takes priority.
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H
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7) De-rate Power Dissipation (Pd) depending on Ambient temperature (T a). When us ed in sealed area, confirm the actual
ambient temperature.
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1) When a highly active halog enous (chlor ine, bromin e, etc.) flux is used, the residue of flux ma y negatively affect product
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For details, please refer to ROHM Mounting specification
●Precautions Regarding Application Examples and External Circuits
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