Power Management Switch ICs for PCs and Digital Consumer Products
1ch Small Package
High Side Switch IC
for USB Devices and Memory Cards
BD6538G
●Description
BD6538G is single channel high side powers switch with low ON resistance Nch power MOSFET.
Rich safety functions such as Over current detection, Thermal shutdown (TSD), Under Voltage Lock Out(UVLO) and
Soft start function which are required for the power supply port protection are integrated into 1chip.
●Feature
1) Single channel of low ON resistance (Typ = 150mΩ) Nch power MOSFET built in
2) 500mA Continuous current load
3) Active”High”Control Logic
4) Soft start function
5) Over current detection（Output Off-latch Operating）
6) Thermal shutdown
7) Open drain error flag output
8) Under voltage lockout
9) Power supply voltage range 2.7V~5.5V
10) Operating temperature range-40°C~85°C
11) SSOP5 Package
●Absolute maximum ratings
Parameter Symbol Ratings Unit
Supply voltage VIN -0.3 to 6.0 V
No.11029EBT14
Enable voltage VEN -0.3 to 6.0 V
/OC voltage V
/OC current I
OUT voltage V
Storage temperature T
Power dissipation PD 675 *1 mW
*1 1 Mounted on 70mm * 70mm * 1.6mm grass-epoxy PCB. Derating : 5.4mW / °C for operating above Ta=25°C.
* This product is not designed for protection against radioactive rays.
●Operating conditions
Parameter Symbol
Operating voltage VIN 2.7 - 5.5 V
Operating temperature T
Continuous output current I
-0.3 to 6.0 V
/OC
5 mA
/OC
-0.3 to VIN + 0.3 V
OUT
-55 to 150 °C
STG
Ratings
Min Typ Max
-40 - 85 °C
OPR
0 - 0.5 A
OUT
Unit
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1/11
2011.05 - Rev.B
BD6538G
●Electric characteristics
Unless otherwise specified VIN = 5.0V, Ta = 25°C
DC characteristics
Parameter Symbol
Limits
Min. Typ. Max.
Technical Note
unit Condition
Operating Current IDD - 110 160 μA VEN = 5.0V, V
Standby Current I
EN input voltage
- 0.01 5 μA VEN = 0V, V
STB
V
2.0 - - V High input
EN
VEN - - 0.8 V Low input
EN input current IEN -1.0 0.01 1.0 μA VEN =0Vor5V
ON resistance RON - 150 200 mΩ I
= 50mA
OUT
Over current threshold ITH 0.5 - 1.0 A -
Output current at short ISC 0.35 - - A V
/OC output lOW voltage V
UVLO Threshold
- - 0.4 V I
/OC
V
2.1 2.3 2.5 V Increasing VIN
TUVH
V
2.0 2.2 2.4 V Decreasing VIN
TUVL
= 0V (RMS)
OUT
= 0.5mA
/OC
AC characteristics
Parameter Symbol
Output rise time T
Min. Typ. Max.
- 1 6 ms RL = 20Ω, Fig. 2 Ref.
ON1
Limits
unit Condition
OUT
= Open
OUT
= Open
Output rise delay time T
Output fall time T
Output fall delay time T
Blanking time T
- 1.5 10 ms RL = 20Ω, Fig. 2 Ref.
ON2
- 1 20 μs RL = 20Ω, Fig. 2 Ref.
OFF1
- 3 40 μs RL = 20Ω, Fig. 2 Ref.
OFF2
10 15 20 ms -
BLANK
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2/11
2011.05 - Rev.B
BD6538G
/
/
●Measurement circuit
Technical Note
1µF
EN
V
A
1µF
EN
V
ON resistance, Over current /OC output LOW voltage
●Timing diagram
A
VIN
VIN
VIN
GND
EN
VIN
GND
EN
VOUT
OC
VOUT
OC
V
EN
V
OUT
IN
V
A
VIN
1µF RL
GND
EN
V
EN
EN input voltage, Output rise, fall time Operating current
IN
V
I
OUT
10k
A
VIN
1µF
GND
EN
V
EN
Fig.1 Measurement circuit
50% 50%
T
ON2
90%
10%
T
ON1
Fig.2 Timing chart at output rise / fall time
90%
T
OFF2
10%
T
OFF1
VOUT
/OC
VOUT
/OC
OC
I
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3/11
2011.05 - Rev.B
BD6538G
w
●Reference data
Technical Note
140
Ta= 2 5° C
120
100
80
[μA]
DD
I
60
40
OPERATING CURRENT :
20
0
23456
SUPPLY VOLTAGE : V
Fig.3 Operating current
EN Enable
1.0
VIN=5.0V
0.8
0.6
STB[μA]
I
0.4
0.2
OPERATING CURRENT :
0.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
Fig.6 Operating current
EN Disable
200
Ta= 2 5° C
150
mΩ]
100
ON[
R
ON RESISTANCE :
50
0
23456
SUPPLY VOLTAGE : V
Fig.9 ON resistance
1.0
VIN=5.0V
0.9
0.8
0.7
0.6
Overcurrent threshold : ITH[A]
0.5
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
Fig.12 Over current detection
140
VIN=5.0V
120
100
80
[μA]
DD
60
I
40
OPERATING CURRENT :
20
0
-50 0 50 100
[V]
IN
AMBI ENT TEM PERATU RE : Ta[℃]
Fig.4 Operating current
EN Enable
2.0
Ta= 2 5° C
1.5
Low to High
High to Low
1.0
EN[V] 0
V
0.5
ENABLE INPUT VOLTAGE :
0.0
23456
SUPPLY VOLTAGE : V
IN[V]
Fig.7 EN input voltage
200
VIN=5.0V
150
[mΩ]
100
ON
R
ON RESISTANCE :
50
0
-50 0 50 100
IN
[V]
AMBIENT TEMPERATURE : Ta[℃]
Fig.10 ON resistance
100
Ta= 2 5° C
80
60
40
V/OC[mV]
20
/OC OUTPUT LOW V OLTAGE :
0
23456
SUPPLY VOLTAGE : V
[V]
IN
Fig.13 /OC output LOW voltage
1.0
Ta= 2 5° C
0.8
0.6
[µA]
STB
I
0.4
OPERATING CURRENT :
0.2
0.0
23456
SUPPLY VOLTAGE : VIN[V]
Fig.5 Operating current
EN Disable
2.0
VIN=5.0V
1.5
EN[V]
1.0
V
0.5
ENABLE INPUT VOLTAGE :
0.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
Low to High
High to Lo
Fig.8 EN input voltage
1.0
Ta= 2 5° C
0.9
[A]
TH
0.8
0.7
0.6
Overcurrent threshold : I
0.5
23456
SUPPLY VOLTAGE : V
Fig.11 Over current detection
100
VIN=5.0V
80
60
[mV]
/O C
V
40
20
/OC OUTPUT LOW VOLTAGE :
0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
Fig.14 /OC output LOW voltage
[V]
IN
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4/11
2011.05 - Rev.B
BD6538G
2.5
[V]
2.4
TUVL
, V
TUVH
2.3
VTUVH
2.2
V
2.1
UVLO THRESHOLD : V
2.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
Fig.15 UVLO Threshold
5.0
VIN=5.0V
4.0
[ms]
3.0
ON1
2.0
RISE TIME : T
1.0
0.0
-50 0 50 100
AMBI ENT TEMPE RA TURE : Ta[℃]
Fig.18 Output rise time
5.0
[μs]
OFF1
Ta= 2 5° C
4.0
3.0
2.0
FALL TIME : T
1.0
0.0
23456
Fig.21 Output fall time
6.0
[μs]
OFF2
VIN=5.0V
5.0
4.0
3.0
2.0
TURN OFF TIME : T
1.0
0.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
Fig.24 Output turn off time
TUVL
SUPPLY VOLTAGE : V
Technical Note
1.0
0.8
0.6
0.4
0.2
0.0
UVLO HYSTERESIS VOLTAGE : VHYS[V]
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
Fig.16 UVLO hysteresis voltage
5.0
Ta= 2 5° C
4.0
3.0
2.0
TURN ON TIME : TON2[ms]
1.0
0.0
23456
SUPPLY VOLTAGE : V
IN[V]
Fig.19 Output turn on time
5.0
VIN=5.0V
4.0
[μs]
3.0
OFF1
2.0
FALL TIME : T
1.0
0.0
[V]
IN
-50 0 50 100
AMBIENT TEMPERATURE : Ta [℃]
Fig.22 Output fall time
20
Ta= 2 5° C
18
[ms]
BLANK
16
14
12
BLANKING TIME : T
10
23456
SUPPLY VOLTAGE : V
IN[V]
Fig.25 Blanking time
5.0
Ta= 2 5° C
4.0
3.0
2.0
RISE TIME : TON1[ms]
1.0
0.0
23456
SUPPLY VOLTAGE : VIN[V]
Fig.17 Output rise time
5.0
VIN=5.0V
4.0
3.0
2.0
TURN ON TIME : TON2[ms]
1.0
0.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
Fig.20 Output turn on time
6.0
Ta= 2 5° C
5.0
[μs]
4.0
OFF2
3.0
2.0
TURN OFF TIME : T
1.0
0.0
23456
SUPPLY VOLTAGE : V
IN
Fig.23 Output turn off time
20
VIN=5.0V
18
[ms]
16
BLANK
14
BLANK TIME : T
12
10
-50 0 50 100
AMBIENT TEMPERATURE : Ta [℃]
Fig.26 Blanking time
[V]
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5/11
2011.05 - Rev.B
BD6538G
●Waveform data
EN
V
(5V/div.)
V/OC
(5V/div.)
V
OUT
(5V/div.)
OUT
I
(0.5A/div.)
Fig.27 Output rise characteristic
V/OC
(5V/div.)
V
OUT
(5V/div.)
OUT
I
(0.5A/div.)
Fig.30 Over current response
V/OC
(5V/div.)
V
OUT
(5V/div.)
OUT
I
(0.5A/div.)
Fig.33 Over current response
Output shortcircuit at Enable
V
RL=20Ω
TIME(1ms/div.)
TIME (20ms/div.)
Ramped load
TIME (5ms/div.)
IN=5V
VIN=5V
V
IN=5V
VEN
(5V/div.)
V/OC
(5V/div.)
V
OUT
(5V/div.)
I
OUT
(0.5A/div.)
TIME(1us/div.)
Fig.28 Output fall characteristic
V/OC
(5V/div.)
V
OUT
(5V/div.)
OUT
I
(0.5A/div.)
TIME (5ms/div.)
Fig.31 Over current response
Ramped load
VIN
(5V/div.)
V
OUT
(5V/div.)
I
OUT
(0.2A/div.)
TIME (10ms/div.)
Fig.34 UVLO response
V
Increasing
IN
V
IN=5V
RL=20Ω
VIN=5V
L=20Ω
R
Technical Note
EN
V
(5V/div.)
V/OC
(5V/div.)
CL=147uF
OUT
I
(0.2A/div.)
Fig29. Inrush current respone
VEN
(5V/div.)
V
/OC
(5V/div.)
V
OUT
(5V/div.)
I
OUT
(0.5A/div.)
VIN
(5V/div.)
V
OUT
(5V/div.)
I
OUT
(0.2A/div.)
CL=47uF
TIME (2ms/div.)
TIME (5ms/div.)
Fig.32 Over current response
Enable to short circuit
RL=20Ω
TIME (10ms/div.)
Fig.35 UVLO response
Decreasing
V
IN
CL=100uF
VIN=5V
RL=20Ω
VIN=5V
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6/11
2011.05 - Rev.B
BD6538G
●Block diagram
Technical Note
OCD GND
Delay
Counter
S R Q
/OC
EN
VIN
UVLO
Charge
pump
TSD
OUT
VIN
1
GND
2
EN
34
Top View
5
Fig.36 Block diagram Fig.37 Pin Configuration
●Pin description
Pin No. symbol I/O Pin function
1 VIN -
Power supply input.
Input terminal to switch and power supply input terminal of the internal circuit.
2 GND - Ground.
3 EN I
4 /OC O
Enable input.
Power switch on at High level.
Over current output. Low level at over current detection.
Open drain output.
VOUT
/OC
5 VOUT O Switch output.
●Terminal circuit
symbol Pin No. Equivalent circuit
VOUT 5
EN 3
EN
VOUT
/OC
/OC 4
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Fig.38 Terminal circuit
7/11
2011.05 - Rev.B
BD6538G
t
t
t
t
Technical Note
●Operations Explanation
1.Overcurrent protection（OCD）
The overcurrent detection circuit limits the current and outputs an error flag (/OC) when the current flowing in switch
MOSFET exceeds overcurrent threshold (I
The timer is reset when the state of the overcurrent is terminated before passing of T
TH
).
. After a state of overcurrent is
BLANK
passed at blanking time, the switch is shut down and the overcurrent signal (/OC) changes to Low level.
The latch is reset through it input Low to EN or detects UVLO. Normal operation is returned by EN signal is set to High or
UVLO is off. (Fig. 4, Fig. 5).
The over current limit circuit works when EN signal is enable.
2. Thermal shutdown circuit（TSD）
Thermal shutdown circuit turns off the switch and outputs an error flag (/OC) when the junction temperature exceeds
150°C (typ.). Therefore, when the junction temperature goes down to 150°C (typ), the switch output and an error flag (/OC)
are recovered automatically. This operating is repeated until cause of junction temperature increase is removed or EN
signal is set Disable. Thermal shutdown circuit works when EN signal is enable.
3. Under voltage lockout （UVLO）
UVLO keeps the switch-off state at MOSFET until VIN exceeds 2.3V (Typ.). If VIN drops under 2.2V (Typ.) while the switch
is turning on, then UVLO shuts off the power switch.
Under voltage lockout works when EN signal is enable.
4. Overcurrent signal output
Overcurrent signal output （/OC）is N-MOS open drain output. At detection of overcurrent, thermal shutdown, output is Low level.
●Over current shutdown operating
T
BLANK
T
BLANK
O u tp u t c u r re n
Sw itch status
ON OFF ON
FLAG O utpu
VIN
V
TUVL
VEN
Fig.39 Overcurrent shutdown operation（Reset at toggle of EN）
T
BLANK
T
O u tp u t c u r r e n
Switch status
FLAG O utpu
VEN
Fig.40 Overcurrent shutdown operation (Reset at reclosing of power supply VIN)
V
ONOFFON
TUVH
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2011.05 - Rev.B
BD6538G
T
-
●Typical application circuit
Controller
10k~
100kΩ
Technical Note
5V(typ.)
IN
C
VIN
GND
VOU
Ferrite bead
+
CL
EN
/OC
Fig.41 Typical application circuit
●Application information
When excessive current flows owing to output shortcircuit or so, ringing occurs by inductance of power source line to IC, and
may cause bad influences upon IC actions. In order to avoid this case, connect a bypath capacitor by IN terminal and GND
terminal of IC. 1uF or higher is recommended.
Pull up /OC output by resistance 10kΩ ~ 100kΩ.
Set up value which satisfies the application as C
L and Ferrite Beads.
This system connection diagram doesn’t guarantee operating as the application.
The external circuit constant and so on is changed and it uses, in which there are adequate margins by taking into account
external parts or dispersion of IC including not only static characteristics but also transient characteristics.
This system connection diagram doesn’t guarantee operating as the application.
The external circuit constant and so on is changed and it uses, in which there are adequate margins by taking into account
external parts or dispersion of IC including not only static characteristics but also transient characteristics.
●Power dissipation character
(SSOP5 package)
700
600
500
400
300
200
POWER DISSIPATION: Pd[mV]
100
0
0 25 50 75 100 125 150
AMBIENT TEMPERATURE: Ta[℃]
* 70mm * 70mm * 1.6mm : glass epoxy board mounting
Fig.42 Power dissipation curve (Pd-Ta Curve)
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9/11
2011.05 - Rev.B
BD6538G
●Notes for use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any
special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety
measures including the use of fuses, etc.
(2) Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical
characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due
to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard,
for the digital block power supply and the analog block power supply, even though these power supplies has the same
level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing
the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns.
For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the
same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used
present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can
break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between
the terminal and the power supply or the GND terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig.
After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition,
for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the
transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic
element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal.
Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than
the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when
no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals
a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a larg
small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a
degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
(12) Thermal shutdown circuit (TSD)
When junction temperatures become detected temperatures or higher, the thermal shutdown circuit operates and turns a
switch OFF. The thermal shutdown circuit, which is aimed at isolating the LSI from thermal runaway as much as possible,
is not aimed at the protection or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit
operating or use the LSI assuming its operation.
(13) Thermal design
Perform thermal design in which there are adequate margins by taking into account the power dissipation (Pd) in actual states of use.
e current will cause no fluctuations in voltages of the
Technical Note
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10/11
2011.05 - Rev.B
BD6538G
●Ordering part number
B D 6 5 3 8 G - T R
Technical Note
Part No. Part No.
Package
6538
SSOP5
5
2.9±0.2
4
°
+
6
°
4
°
−4
<Tape and Reel information>
+0.2
1.25Max.
−0.1
2.8±0.2
1.6
12
1.1±0.05
0.05±0.05
0.95
3
S
+0.05
0.42
−0.04
0.1 S
+0.05
0.13
−0.03
(Unit : mm)
0.2Min.
Quantity
Direction
of feed
G: SSOP5
TR: Embossed tape and reel
(SSOP5)
Embossed carrier tapeTape
3000pcs
TR
The direction is the 1pin of product is at the upper right when you hold
()
reel on the left hand and you pull out the tape on the right hand
1pin
Direction of feed
Packaging and forming specification
Reel
Order quantity needs to be multiple of the minimum quantity.
∗
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11/1 1
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Notes
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The content specied herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specied in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specied herein is intended only to show the typical functions of and
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Notice
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A
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