This is 1-chip system motor driver integrating 2-channel H-bridge driver, step-down switching regulator with built-in power
DMOS, series regulator and reset output.
3 RNF1 Output current detection pin 1 23 DC2E H-bridge 2 side enable input pin
4 RNF1 Output current detection pin 1 24 DC2P H-bridge 2 side phase pin
5 RNF1S Output current detection input pin
6 NC Non Connection
25 STROBE
Serial port strobe input pin /
H-bridge 1 side enable pin
7 OUT1P H-bridge output pin 1P 26 SDATA Serial port data input pin
8 VM1 Motor power supply pin
9 VM1 Motor power supply pin
27 SCLK
Serial port clock input pin /
H-bridge 1 side phase input pin
10 VM4 Switching regulator power supply pin 28 RESET Reset signal output pin
11 NC Non Connection 29 AGNDANALOG GND
12 SWOUT Switching regulator output pin 30 NC Non Connection
13 NC Non Connection 31 VM3 Power supply pin
14 ROUT Series regulator output pin 32 VM2 Motor power supply pin
15 NC Non Connection 33 VM2 Motor power supply pin
16 RIN Series regulator power supply pin 34 OUT2M H-bridge output pin 2M
17 NC Non Connection 35 NC Non Connection
18 DSEN Switching regulator voltage sense pin 36 RNF2S Output current detection input pin
19 VREF2 Reference voltage input pin 37 RNF2 Output current detection pin 2
20 VREF1 Reference voltage input pin 38 RNF2 Output current detection pin 2
39 OUT2P H-bridge output pin 2P
40 PGNDPOWER GND
* Precaution regarding VM pin
If you use VM1, VM2, VM3 and VM4 not by short-circuit, they may be destroyed. Be sure to use them by short-circuit.
And be sure to set up a bypass capacitor (220µF to 470µF) closer to VM3 pin as much as possible.
Either serial control or external PWM control can be selected for motor control type with SELECT pin (pin 22).
SELECT Output state
L Serial input mode
H External PWM control mode
STROBE/DC1E(25pin)
SDATA(26pin)
SCLK/DC1P(27pin)
DC2P(24pin)
DC2E(23pin)
ENA PHA
Internal shift register
SEL
SEL
Serial
SEL
Serial
SEL
Serial
SELECT(22pin)
Fig.14 Serial Input Block Diagram
The input/output logic at SELECT = H is as follows.
DC1E/DC2E Output state
L Open
H ACTIVE
DC1P/DC2P OUTP OUTM
L SINK SOURCE
H SOURCE SINK
○Procedure of DC motor drive by external PWM control
1) Serial setting
Set the serial by SELECT pin = L. (WORD_S and WORD_D setting)
・WORD_S (see P.7) is a drive parameter for setting OFF_TIME, BLANK TIME etc.
・WORD_D (see P.7) is for drive setting to set drive mode of each H-bridge.
When setting WORD_D (see P.7), make sure that ENABLE signal (ENABLE_1、ENABLE_2) of serial bit is L.
If ENABLE signal is H, the motor may operate.
Input of DC2P pin can be either H or L.
2) External PWM drive mode switch
Set external PWM drive mode by SELECT pin = H.
Switch by DC1E (STROBE)/CD2E pin = L when switching SELECT pin.
3) Drive
PHASE, ENABLE pin input signal (DC1E/DC1P/DC2E/DC2P) drives in external PWM mode.
16-bit 3-linear type serial interface (SDATA (pin 26), SCLK (pin 27), STROBE (pin 25)) is provided to set the operation and
the value of current limit. Data are sent to the internal shift register by falling edge of SCLK pin in the area L of STROBE pin.
Data of shift register are written in an appropriate address of internal memory of 2*15 bits by rising edge of STROBE pin
according to address data of D15.The input order of serial data is from D0 to D15.
Address data
D15 Word select
0 WORD_S
1 WORD_D
Memory data allocation
BIT WORD_S Default WORD_D Default
D0 Rohm_Reserve[2] 0 Rohm_Reserve[11] 0
D1 Rohm_Reserve[1] 0 Rohm_Reserve[10] 0
D2 Rohm_Reserve[0] 0 Rohm_Reserve[9] 0
D3 OFF TIME_2[2] 0 Rohm_Reserve[8] 0
D4 OFF TIME_2[1] 0 Rohm_Reserve[7] 0
D5 OFF TIME_2[0] 0 Rohm_Reserve[6] 0
D6 BLANK TIME_2[1] 0 Rohm_Reserve[5] 0
D7 BLANK TIME_2[0] 0 Rohm_Reserve[4] 0
D8 OFF TIME_1[2] 0 Rohm_Reserve[3] 0
D9 OFF TIME_1[1] 0 PWM_MODE_2 0
D10 OFF TIME_1[0] 0 S_PHASE_2 0
D11 BLANK TIME_1[1] 0 S_ENABLE_2 0
D12 BLANK TIME_1[0] 0 PWM_MODE_1 0
D13 MASK SELECT 0 S_PHASE_1 0
D14 SWOFF 0 S_ENABLE_1 0
The timing of serial report writing is shown in the right figure.
And the minimum timing of each is as follows:
A:SDATA setup time・・・・・・・・・・・・・・・・・・・ 10nsec
B:SDATA hold time・・・・・・・・・・・・・・・・・・・・ 10nsec
C:Setup STROBE to SCLK falling edge・・ 50nsec
D:SCLK low pulse width・・・・・・・・・・・・・・・・ 25nsec
E:SCLK High pulse width・・・・・・・・・・・・・・・ 25nsec
F:Setup SCLK falling edge to STROBE・・・ 25nsec
G:STROBE pulse width・・・・・・・・・・・・・・・・ 50nsec
H:Setup RESET to SCLK Rising・・・・・・・・・ 50µsec
H
RESET
STROBE
SCLK
B
D0
D1
D15
CGF E D
○RESET signal is an internal RESET signal and generated inside IC at the same timing of external RESET output.
○STROBE, SCLK and SDATA signals are input signals through external ASIC.
Common mask can be provided to 2-phase H-bridge drive noise mask (BLANK time).
○BLANK TIME
Current-limit comparator monitors RNF pin voltage to set limit to current, but during the period from switching on to BLANK
TIME, detection becomes invalid in order to avoid wrong detection caused by spike noise that happens at the time of
switching on. See P.8 for details.And during the period from ENABLE signal on to BLANK TIME at switching of PHASE
signal, detection becomes invalid as well.
○OFF TIME
Set current decay time.
WORD_D
○S_ENABLE_1/S_ENABLE_2
Each bridge on/off signal. Output state is as follows.
○S_PHASE_1/S_PHASE_2
Set the direction of current of each bridge. Output state is as follows.
○PWM_MODE_1/PWM_MODE_2
Set current decay mode in bridge1 and 2. (See page 8 for details about each mode.)
(※)Rohm_Reserve
0 Switching regulator on
1 Switching regulator off
0 Independent mask on single-phase/two-phase.
1 Common mask on single-phase/two-phase.
[1] [0] BLANK TIME Unit
0 0 2.0 µs
0 1 3.0 µs
1 0 4.0 µs
1 1 5.0 µs
[2] [1] [0] OFF TIME Unit
0 0 0 6 µs
0 0 1 8 µs
0 1 0 10 µs
0 1 1 12 µs
1 0 0 14 µs
1 0 1 16 µs
1 1 0 18 µs
1 1 1 20 µs
Output state
0 Open
1 ACTIVE
P M
0 SINK SOURCE
1 SOURCE SINK
0 FAST DECAY
1 SLOW DECAY
Rohm_Reserve is special mode setting port for inspection at shipment. Especially, if Rohm Reserve [3], [4], [5], [7], [8], [9], [10], [11] is set to H by mistake,
malfunction may be caused. Be sure not to set.
This IC has built-in 2-channel H-bridge driver.
Each can be used for DC motor drive independently.
1. Current setting
Motor output current-limit value can be set according to the equation below.
Io=(VREF/10)・(1/RNFS) [A]
Decide within the range VREF = 0.8V to 3.5V, RNFS = 0.04Ωto 0.35Ω.
2. DECAY mode
Current decay mode can be selected from serial input at the time of motor chopping drive.
Each mode and timing is as follows.
○SLOW DECAY mode ○FAST DECAY Mode ○Timing chart
VM
VM
ON→OFF
OFF→OFF
ON→OFF
OFF→OFF
(Internal 8 MHz)
Limit value
Output current
0 1
F
BASE
OFF→OFF
ON→ON
At the time on
At the time off (at DECAY)
OFF→OFF
At the time on
At the time off (at DECAY)
ON→OFF
On time
Off time
(Set by off time)
SLOW
FAST
Fig.16 On/Off Timing at SLOW Fig.17 On/Off Timing at FAST Fig.18 DECAY Mode Timing Chart
3. Protection area for output current value wrong detection
In order to avoid wrong detection of current detection comparator by varistor current element in each motor, current
detection are masked at the timing as follows.
①PHASE switching time
②ENABLE on time
③When output is on after OFF_TIME is finished at the time of current chopping drive
①PHASE switching time
PHASE signal
Motor current
Mask area
BLANK TIME
②ENABLE on time
Fig.19 Timing Chart of PHASE Switching Time
③Current chopping driving time
ENABLE
Motor current
Mask area
BLANK TIME
Fig.20 Timing Chart of ENABLE On Timing Fig.21 Timing Chart of Current Chopping Driving Time
A switching regulator circuit that repeats on/off being synchronized with internal CLK (200 KHz) is built-in.
The start up output voltage SWOUT (pin 12) becomes up and run step by step with soft start at the VM power-on
(VM≧V
).The output voltage is determined by the equation below with external resistance.
MPORH
VOUTDCDC=VBIAS・{(R1+R2)/R2 } [V]
The setting should be performed so that the switching regulator output voltage (VOUTDCDC) waveform is optimized within
the range of VOUTDCDC = 3V to 5V, VBIAS = 0.9V (Typ.), R1 + R2 = 1kΩ to 10kΩ, C1 = 1,000pF to 10,000pF.
DSEN
-
+
+
200KHzCLK
SWOUT
DRIVER
0.9V
BIAS
DAC
SWOFF
SS
COUNTER
CLK(=1.95kHz)
Fig.22 Switching Regulator Block Diagram
Reference clock
(200kHz)
DUTY MAX
Output voltage
MAX_DUTY 92%
⇒
SWOUT
Fig.23 Timing Chart of Switching Regulator Operation
As shown in Fig.24, VOUTDCDC output voltage becomes up and run step by step with soft start at the time of power-on.
VM voltage
V
MPORH
CLK195
(Internal)
Oscillation
Counter output
1 2 3 4 5
・・ ・・・・・49・・・ ・・63 64
SWOUT
DAC output
VOUTDCDC output voltage
~Duty increase~
T1=23.6[msec]
T2=32.8[msec]
Constant ON Duty
ON Duty=
V
DCOUT
/VM
1.21V
0.90V
0V
5.0Vor3.3V
0V
Fig.24 Soft Starting Time Timing Chart
This soft start method is realized by changing comparator positive side voltage that determines output duty of switching
regulator to linear using DAC.
Soft start time T1 is constant value regardless of VM voltage.
Soft start time T1=23.6msec(typ.)
Count finish time T2=32.8msec(typ.)
○Series regulator operation
Inputting switching regulator output into RIN pin (pin 16) enables to drive series regulator circuit.
At the time of power-on, output voltage start up step by step with soft starting at the same timing as switching regulator
circuit.^Soft start time is 23.6ms (Typ.).
Regarding external capacitor of ROUT pin (pin 14), it works normally without setting. But switching noise of switching
regulator becomes easy to get in due to dragging on board pattern and the like. Pay attention to switching noise.
④Low voltage protection/overvoltage protection circuit
All functions are shutout on the condition of setting value (+30%, -30%) while DSEN pin voltage (pin 18) of switching
regulator circuit is monitored.
Set voltageMask timeState after operation
VSWLV 0.60(V) 10µsec All function shutout
VSWOH 1.20(V) 10µsec All function shutout
Note that output overvoltage and output low voltage protection does not work until soft start count finish (32.8 ms, Typ.)
at the time of start up of DC/DC power after power-on.
Switching regulator Series regulator DC motor RESET Re-start
Operating OFF OFF OFF L Again power-on
DSEN
0.9V
BIAS
SWOUT
DRIVER
DAC
SS
COUNTER
DSEN
0.60V
1.21V
Mask during
soft starting
All function
off circuit
Fig.27 Switching Regulator Block Diagram
○RESET function
Power-on RESET circuit is built-in for VM power source.
H is output at RESET pin through DELAY time of internal counter when power voltage goes up to V
(6.5 V, Typ.) or
MPORH
higher at the time of power-on. In addition, hysteresis is set up at the time of power-down to output L at RESET pin with
VMPORL (6.1 V, Typ.) And no response time (2.5µs, Typ.) of voltage detection is set in order to avoid wrong detection by
sudden power-off.If protection circuits other than overcurrent protection of motor starts operating, RESET is not released if
VM power is not on again.
●Power Dissipation Reduction
On the backside of HTSSOP-B40 package, metal is filled in. Heat dissipation is possible by letting in a through hole from
backside. Power dissipation can be improved by providing heat dissipation pattern of copper foil or the like not only on the
board surface but also on the backside. The metal on the backside shorts with the backside of IC tip and the potential is GND.
Therefore, avoid shorts with other potential than GND, or malfunction or destruction may happen. It is recommended that
backside metal should short with GND by soldering.
W)
(
Pd
:
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
④4.7W
③3.6W
1.95W
②
1.6W
①
Measuring instrument: TH156 (Kuwano Denki)
Measuring state: ROHM substrate mounted
Board size:70mm×70mm×1.6mm(Thermal via on the board)
Solder the board and exposed heat release part of package backside.
Board①:1-layer board (Backside copper foil area: 0 mm x 0 mm)
Board②:2-layer board (Backside copper foil area: 15 mm x 15 mm)
Board③:2-layer board (Backside copper foil area: 15 mm x 15 mm)
Board④:4-layer board (Backside copper foil area: 70 mm x 70 mm)
1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may
result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such
damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special
mode where the absolute maximum ratings may be exceeded is anticipated.
2) Connecting the power supply connector backward
Connecting the power supply connector backwards may result in damage to the IC. Insert external diodes between the power
supply and the IC's power supply pins as well as the motor coil to protect against damage from backward connections.
3) Power supply lines
As return of current regenerated by back EMF of motor happens, take steps such as putting capacitor between power
supply and GND as a electric pathway for the regenerated current. Be sure that there is no problem with each property
such as emptied capacity at lower temperature regarding electrolytic capacitor to decide capacity value.
If the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the
voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the
absolute maximum ratings. It is recommended to implement a physical safety measure such as the insertion of a voltage
clamp diode between the power supply and GND pins.
4) GND potential
Ensure a minimum GND pin potential in all operating conditions.
5) Setting of heat
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
BD64550EFV expose its frame of the backside of package. Note that this part is assumed to use after providing heat
dissipation treatment to improve heat dissipation efficiency . Try to occupy as wide as possible with heat dissipation
pattern not only on the board surface but also the backside.
6) Pin short and mistake fitting
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by the
presence of a foreign object may result in damage to the IC.
7) Actions in strong magnetic field
Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.
8) ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
9) Thermal shutdown circuit
The IC has a built-in thermal shutdown circuit (TSD circuit). If the chip temperature becomes Tjmax=150℃, and higher,
coil output to the motor and regulator output will be OFF, and reset output will be L. The TSD circuit is designed only to
shut the IC off to prevent runaway thermal operation. It is not designed to protect or indemnify peripheral equipment. Do
not use the TSD function to protect peripheral equipment.
10) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure,
and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process.
11) Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety
of parasitic elements. For example, when a resistor and transistor are connected to pins as shown in Fig. 31,
○the P/N junction functions as a parasitic diode
when GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN).
○Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines
with the N layer of other adjacent elements to operate as a parasitic NPN transistor.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the
IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and
damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of
parasitic elements, such as by the application of voltages lower than the GND (P substrate) voltage to input pins.
Pin A
+
N
P
P
P
Parasitic element
GND
Resistor
+
N N
P substrate
Pin B
Pin A
aras
element
Fig.31 example of IC structure
N
c
Parasitic element
Tr
B
C
+
P
E
N
P
GND
+
P
N
P substrate
GND
Pin B
B C
E
GND
Other adjacent elements
12) Ground Wiring Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring pattern of any external components, either.
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consent of ROHM Co.,Ltd.
The content specied herein is subject to change for improvement without notice.
The content specied herein is for the purpose of introducing ROHM's products (hereinaf ter
"Products"). If you wish to use any such Product, please be sure to refer to the specications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specied in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specied herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
Notice
The Products specied in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, ofce-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specied in this document are not designed to be radiation tolerant.
While ROHM always makes effor ts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
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The Products are not designed or manufactured to be used with any equipment, device or
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