These products are a low power consumption PWM constant current-drive driver of bipolar stepping motor with power
supply’s rated voltage of 45V and rated output current of 1.0A, 1.5A.
●Feature
1) Power supply: one system drive (rated voltage of 45V)
2) Rated output current: 1.0A, 1.5A
3) Low ON resistance DMOS output
4) CLK-IN drive mode (BD6425/6423EFV)
5) Parallel IN drive mode (BD6422EFV)
6) PWM constant current control (other oscillation)
7) Built-in spike noise blanking function (external noise filter is unnecessary)
8) FULL STEP & HALF STEP (two kinds), applicable to QUARTER STEP
9) Current decay mode switching function (4 kinds of FAST/SLOW DECAY ratio)
10) Normal rotation & reverse rotation switching function (BD6425/6423EFV)
11) Power save function
12) Built-in logic input pull-down resistor
13) Power-on reset function(BD6425/6423EFV)
14) Thermal shutdown circuit (TSD)
15) Over current protection circuit (OCP)
16) Under voltage lock out circuit (UVLO)
17) Malfunction prevention at the time of no applied power supply (Ghost Supply Prevention)
19) Microminiature, ultra-thin and high heat-radiation (exposed metal type) HTSSOP package
●Application
serial dot impact printer、sewing machine etc.
●Absolute maximum ratings(Ta=25℃)
Item Symbol BD6425EFV BD6423/6422EFV Unit
Supply voltage V
Power dissipation Pd
Input voltage for control pin VIN -0.2~+5.5 -0.2~+5.5 V
RNF maximum voltage V
Maximum output current I
Operating temperature range T
Storage temperature range T
Junction temperature T
※1 70mm×70mm×1.6mm glass epoxy board. Derating in done at 11.6mW/℃ for operating above Ta=25℃.
※2 4-layer recommended board. Derating in done at 37.6mW/℃ for operating above Ta=25℃.
※3 70mm×70mm×1.6mm glass epoxy board. Derating in done at 8.8mW/℃ for operating above Ta=25℃.
※4 4-layer recommended board. Derating in done at 32.0mW/℃ for operating above Ta=25℃.
※5 Do not, however exceed Pd, ASO and Tjmax=150℃.
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If
any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices,
such as fuses.
(2) Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply
lines. An external direction diode can be added.
(3) Power supply Lines
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals
to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the
circuit, not that capacitance characteristic values are reduced at low temperatures.
(4) GND Potential
The potential of GND pin must be minimum potential in all operating conditions.
(5) Metal on the backside (Define the side where product markings are printed as front)
The metal on the backside is shorted with the backside of IC chip therefore it should be connected to GND. Be aware that
there is a possibility of malfunction or destruction if it is shorted with any potential other than GND.
(6) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
Users should be aware that these products have been designed to expose their frames at the back of the package, and
should be used with suitable heat dissipation treatment in this area to improve dissipation. As large a dissipation pattern
should be taken as possible, not only on the front of the baseboard but also on the back surface. It is important to
consider actual usage conditions and to take as large a dissipation pattern as possible.
(7) Inter-pin shorts and mounting errors
When attaching to a printed circuit board, pay close attention to the direction of the IC and displacement. Improper
attachment may lead to destruction of the IC. There is also possibility of destruction from short circuits which can be
caused by foreign matter entering between outputs or an output and the power supply or GND.
(8) Operation in a strong electric field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
(9) ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
(10) Thermal shutdown circuit
The IC has a built-in thermal shutdown circuit (TSD circuit). If the chip temperature becomes Tjmax=150℃, and higher,
coil output to the motor will be open. The TSD circuit is designed only to shut the IC off to prevent runaway thermal
operation. It is not designed to protect or indemnify peripheral equipment. Do not use the TSD function to protect
peripheral equipment.
TSD on temperature [℃] (Typ.) Hysteresis Temperature [℃] (Typ.)
175 25
(11) Inspection of the application board
During inspection of the application board, if a capacitor is connected to a pin with low impedance there is a possibility
that it could cause stress to the IC, therefore an electrical discharge should be performed after each process. Also, as a
measure again electrostatic discharge, it should be earthed during the assembly process and special care should be
taken during transport or storage. Furthermore, when connecting to the jig during the inspection process, the power
supply should first be turned off and then removed before the inspection.
This IC is a monolithic IC, and between each element there is a P+ isolation for element partition and a P substrate.
This P layer and each element’s N layer make up the P-N junction, and various parasitic elements are made up.
For example, when the resistance and transistor are connected to the terminal as shown in figure 4,
○When GND>(Terminal A) at the resistance and GND>(Terminal B) at the transistor (NPN),
the P-N junction operates as a parasitic diode.
○Also, when GND>(Terminal B) at the transistor (NPN)
The parasitic NPN transistor operates with the N layers of other elements close to the aforementioned
parasitic diode.
Because of the IC’s structure, the creation of parasitic elements is inevitable from the electrical potential relationship. The
operation of parasitic elements causes interference in circuit operation, and can lead to malfunction and destruction.
Therefore, be careful not to use it in a way which causes the parasitic elements to operate, such as by applying voltage
that is lower than the GND (P substrate) to the input terminal.
Pin A
Resistor Transistor (NPN)
Pin B
C
Pin A
B
E
Pin B
C
Parasitic element
+
N
P
P
P
P substrate
GND
+
N N
aras
element
N
c
P+ P
Parasitic element
N
GND
+
P
P substrate
N
GND
B
E
Other adjacent elements
Fig. 4 Pattern Diagram of Parasitic Element
(13) Ground Wiring Patterns
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change
the GND wiring pattern potential of any external components, either.
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which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
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