(Note) Pd : Mounted on a 70mm x 70mm x 1.6mm glass-epoxy board.
Datashee
t
DC Brush Motor Drivers (18V Max)
BD622xxx Series
General Description
These H-bridge drivers are full bridge drivers for brush
motor applications. Each IC can operate at a power
supply voltage range of 6V to 15V, with output currents of
up to 2A. MOS transistors in the output stage allow PWM
speed control. The integrated VREF voltage control
function allows direct replacem ent of discontinued motor
driver ICs. These highly efficient H-bridge driver ICs
facilitate low-power consumption design.
Features
Built-in Selectable One Channel or Two Channels
Configuration
VREF Voltage Setting Pin Enables PWM Duty Control
Cross-Conduction Prevention Circuit
Four Protection Circuits Provided: OCP, OVP, TSD
and UVLO
Key Specifications
■ Supply Voltage Range: 18V(Max)
■ Maximum Output Current: 0.5A / 1.0A / 2.0A
■ Output ON-Resistance: 1.5Ω / 1.5Ω / 1.0Ω
■ PWM Input Frequency Range: 20kHz to 100kHz
■ Standby Current: 0μA (Typ)
■ Operating T emperature Range: -40°C to +85°C
Packages W(Typ) x D(Typ) x H(Max)
SOP8 5.00mm x 6.20mm x 1.71mm
HSOP25 13.60mm x 7.80mm x 2.11mm
HRP7 9.395mm x 10.540mm x 2.005mm
Applications
VTR; CD/DVD players; audio-visual equipment; optical
disc drives; PC peripherals; OA equipments
Ordering Information
B D 6 2 2 x x x x - x x
Lineup
Voltage Rating
(Max)
18V
○Product structure:Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays.
www.rohm.com
17 VREF Duty setting pin
19 RIN Control input (reverse)
20 FIN Control input (forward)
21 VCC Power supply
22,23 VCC Power supply
FIN GND Ground
(Note) All pins not described above are NC pins.
Note: Use all VCC pin by the same voltage.
Table 4 BD6225FP/BD6226FP
Pin No. Pin Name Function
1 OUT1A Driver output
3 RNFA Power stage ground
6 OUT2A Driver output
8 GND Small signal ground
9 VREFA Duty setting pin
10 RINA Control input (reverse)
11 FINA Control input (forward)
12 VCC Power supply
13 VCC Power supply
14 OUT1B Driver output
16 RNFB Power stage ground
19 OUT2B Driver output
20 GND Small signal ground
21 VREFB Duty setting pin
22 RINB Control input (reverse)
23 FINB Control input (forward)
24 VCC Power supply
25 VCC Power supply
FIN GND Ground
(Note) All pins not described above are NC pins.
Note: Use all VCC pin by the same voltage.
3/21
TSZ02201-0P2P0B300080-1-2
09.Sep.2014 Rev.003
Page 4
BD622xxx Series
Absolute Maximum Ratings (Ta=25°C, All voltages are with respect to ground)
Parameter Symbol Rating Unit
Supply Voltage VCC 18 V
Output Current I
OMAX
0.5
(Note 1)
/ 1.0
(Note 2)
/ 2.0
(Note 3)
A
All Other Input Pins VIN -0.3 to VCC V
Operating Temperature Topr -40 to +85 °C
Storage Temperature Tstg -55 to +150 °C
Power Dissipation Pd 0.68
(Note 4)
/ 1.6
(Note 5)
/ 1.4
(Note 6)
W
Junction Temperature Tjmax 150 °C
(Note 1) BD6220 / BD6225. Do not exceed Pd or ASO.
(Note 2) BD6221 / BD6226. Do not exceed Pd or ASO.
(Note 3) BD6222. Do not exceed Pd or ASO.
(Note 4) SOP8 package. Mounted on a 70mm x 70mm x 1.6mm glass-epoxy board. Derate by 5.5mW/°C for Ta above 25°C.
(Note 5) HRP7 package. Mounted on a 70mm x 70mm x 1.6mm glass-epoxy board. Derate by 12.8mW/°C for Ta above 25°C.
(Note 6) HSOP25 package. Mounted on a 70mm x 70mm x 1.6mm glass-epoxy board. Derate by 11.6mW/°C for Ta above 25°C.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions (Ta=25°C)
Parameter Symbol Rating Unit
Supply voltage VCC 6 to 15 V
VREF voltage V
Electrical Characteristics (Unless otherwise specified, Ta=25°C and VCC=V
Parameter Symbol
Supply Current (1ch) ICC 0.8 1.3 2.5 mA Forward / Reverse / Brake
Supply Current (2ch) ICC 1.3 2.0 3.5 mA Forward / Reverse / Brake
Stand-by Current I
Input High Voltage VIH 2.0 - - V
Input Low Voltage VIL - - 0.8 V
Input Bias Current IIH 30 50 100 µA VIN=5.0V
Output ON-Resistance
Output ON-Resistance
Output ON-Resistance
VREF Bias Current I
Carrier Frequency f
Input Frequency Range f
Hi-Z
b H L VCC H L Forward (OUT1 > OUT2)
c L H VCC L H Reverse (OUT1 < OUT2)
d H H X L L Brake (stop)
e PWM L VCC H
f L PWM VCC
g H PWM VCC
PWM
h PWM H VCC L
i H L Option H
j L H Option
(Note) Hi-Z : all output transistors are OFF. Please note that this is the state of the connected diodes, which differs from that of the mechanical
relay.
X : Don’t care
Mode (a) Stand-by Mode
Stand-by operates independently with the VREF pin voltage. In stand-by mode, all internal cir cuits are turned OFF,
including the output power transistor s. Motor output goes to high impedan ce state. When the system is switched
to stand-by mode while the motor is running, the system enters an idling state because of the body diodes.
However, when the system switches to stand-by from any other mode (except the brake mode), the control logic
remain in the HIGH state for at least 50µs before shutting down all circuits.
Mode (b) Forward Mode
This operating mode is defined as th e forward rotation of the motor when OUT1 pin is HIG H and OUT2 pin is
LOW. When the motor is connected between OUT1 and OUT2 pins, the current flows from OUT1 t o OUT2. To
operate in this mode, connect the VREF pin to the VCC pin.
Mode (c) Reverse Mode
This operating mode is defined as the rever se rotation of the motor when OUT1 pin is low a nd OUT2 pin is high.
When the motor is connected between the OUT1 and OUT2 pins, the current flows from OUT2 to OUT1. To
operate in this mode, connect the VREF pin to the VCC pin.
Mode (d) Brake Mode
This operating mode is used to quickly stop the motor (short circuit brake). It differs from the stand-by mode
because the internal control circuit is operating in the brake mode. Please switch to stand-by mode (rather than
the brake mode) to save power and reduce consumption.
( a) Stand-by Mode (b) For ward Mode (c) Reverse Mode (d) Brake Mode
The rotational speed of the motor can be cont rolled by the duty cyc le of the PWM signal fed to the FIN pin or the
RIN pin. In this mode, the high side output is fixed and the lo w side output is switching, corresponding t o the input
signal. The state of the output toggles between "L" and "Hi-Z".
The frequency of the input PWM signal can be between 20kHz and 1 00kHz. The cir cuit may not operate proper ly
for PWM frequencies below 20kHz and abov e 100k Hz. Note t hat contr ol ma y not be attained b y switc hing on d ut y
at frequencies lower than 20kHz, since the operat ion functions via the stand-by mode. To operate in this mode,
connect the VREF pin to the VCC pin. In addition, establis h a current path for the recovery current from the m otor,
by connecting a bypass capacitor (10µF or higher is recommended) between VCC and ground.
Figure 34. PWM Control Mode A Operation (Output Stage)
Figure 35. PWM Control Mode A Operation (Timing Chart)
The rotational speed of the motor can be cont rolled by the duty cyc le of the PWM signal fed to the FIN pin or the
RIN pin. In this mode, the low side output is fixed and the high side out put is switching, corresponding to the input
signal. The state of the output toggles between "L" and "H".
The frequency of the input PWM signal can be between 20kHz and 1 00kHz. The cir cuit may not operate proper ly
for PWM frequencies below 20kHz and above 100kHz . To operate in this mode, connect the VREF pin to the VCC
pin. In addition, establish a current path for the recover y current f rom the mot or, by connecting a bypass capacitor
(10µF or higher is recommended) between VCC and ground.
Figure 36. PWM Control Mode B Operation (Output Stage)
Figure 37. PWM Control Mode B Operation (Timing Chart)
12/21
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09.Sep.2014 Rev.003
Page 13
BD622xxx Series
[ ][ ]
VVVVDUTY
CCREF
/≈
VCC
VREF
FIN
RIN
OUT1
OUT2
0
Mode (i),(j) VREF Control Mode
The built-in VRE F duty cycle conversion circuit provides a duty c ycle corresponding to the voltage of the VREF
pin and the VCC v oltage. The function offers the same level of control as the high voltage output set ting function
in previous modes. The duty cycle is calculated by the following equation.
For example, if VCC voltage is 12V and VREF pin voltage is 9V, the duty cycle is about 75 percent. However,
please note that the duty cycle might be limited b y the range of the VR EF pin voltage (Refer to the recommended
operating conditions, shown on page 4). The PWM carrier frequency in this mode is 25kHz (nominal), and the
switching operation is the same as the PWM control modes. When operating in this mode, do not input a PWM
signal to the FIN and RIN pins. In addition, establish a current path for the recovery current from the motor, by
connecting a bypass capacitor (10µF or more is recommended) between VCC and ground.
(2) Cross-Conduction Protection Circuit
In the full bridge output stage, when the up per and lower transist ors are t urned ON at t he same time d uring hig h to lo w
or low to high transition, an inrush current flo ws from the power supply to ground, resulting to a loss . This circuit
eliminates the inrush current by providing a dead time (about 400ns, nominal ) during the transition.
(3) Output Protection Circuits
(a) Under Voltage Lock Out (UVLO) Circuit
To ensure the lowest power supply voltage necessary to operate the controller, and to prevent under voltage
malfunctions, a UVLO circuit has been built into this driver. When the power supply voltage falls to 5.0V (nominal)
or below, the controller forces all driver outputs to hig h imp edance state. When the voltage rises to 5.5 V (nomi nal)
or above, the UVLO circuit ends the loc kout operation and returns the chip to its normal operation.
(b) Over Voltage Protection (OVP) Circuit
When the power supply voltage exceeds 30V (nomina l), the controller forces all driver outputs to high impedance
state. The OVP circuit is released and its operation ends when the voltage drops back to 25V (nominal) or below.
This protection circuit does no t work in t he stand-by mode. Also, note that this circui t is s uppleme ntary, and thus if
it is asserted, the absolute max imum rating will have been excee ded. Therefore, do not continue to use the I C
after this circuit is activated, and do not operate the IC in an environment where activation of the circuit is
assumed.
(c) Thermal Shutdown (TSD) Circuit
The TSD circuit operates when the junction temperature of the driver exceeds the preset temperature (175°C
nominal). At this time, the con troller forces all dr iver outputs to high imped ance state. Since therma l hysteresis is
provided by the TSD circuit, the chi p returns to its normal operation when the juncti on temperatur e falls belo w the
preset temperature (150°C nominal). Thus, it is a self-resetting circuit.
The TSD circuit is designed only to shut the IC off to prevent thermal runa way. It is not designed to protect the IC
or guarantee its operation in the presence of extrem e heat. Do not continue to use the IC after t he TSD circuit is
activated, and do not operate the IC i n an environment where activation of the circuit is assumed.
To protect this driver IC from ground faults, power supply line faults and load short circuits, the OCP circuit
monitors the output current fo r the circuit’s monitoring time ( 10µs, nom inal) . When the protection circuit detects an
over current, the controller forces al l driver outputs to high impedance state during the off time (290µs, nominal).
The IC returns to its normal operation after the off time period has elapsed (self-returning type). At the two
channels type, this circuit works i ndependently for each channel.
OUT
Figure 39. Over-Current Protection (Timing Chart)
I/O Equivalent Circuits
Figure 40. FIN / RIN Figure 41. VREF Figure 42. OUT1 / OUT2 Figur e 43. OUT1 / OUT2
(SOP8/HRP7) (HSOP25)
Connecting the power supply in rev erse polarity can d amage the IC. Take precautions against reverse p olarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide lo w impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent nois e in the ground an d supply lines of the digital bloc k from affecting the anal og
block. Furthermore, connect a capacitor to ground at all power supply pins. Consid er the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-curr ent ground t races , the t wo ground traces should be rout ed separately but
connected to a single ground at the referenc e point of the application board to avoid f luctuations in the small-signal
ground caused by large currents. Also ensur e that the ground tr aces of external com ponents do not cause variat ions
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the power dissip ation rating be exceeded the rise in temperature of the chip may result i n
deterioration of the properties of the c hip. In case of exceeding this absolute m aximum rat ing, inc re ase t he boar d siz e
and copper area to prevent exceeding t he Pd rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are g uaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may caus e the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharg e capacitors completely after each process or step. The IC’s power suppl y
should always be turned off completely before connec ting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assem bly and use s imil ar prec autions durin g
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are cor rect when mountin g the IC on t he PCB. Incorr ect mount ing ma y result in
damaging the IC. Avoid nearby pins being shorted t o each other especially to ground, p ower supply and output pin.
Inter-pin shorts could be due to many reaso ns such as metal particles, water droplets (in very humid enviro nment)
and unintentional solder bridge depos i ted in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to t he gate of a M OS transi stor. The gate has extremely high i mpedance an d
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a s ignificant effect on the conduction through the transistor and
cause unexpected operation of the I C. So unless otherwise spec ified, unused input pins should be connected to t he
power supply or ground line.
This monolithic IC contains P+ isolatio n and P substrate layers between adjacent elements in order to keep the m
isolated. P-N junctions are formed at the intersection of the P layers with the N layers o f other elements, creating a
parasitic diode or transistor. For example (refer to figure bel ow):
When GND > P in A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > P in B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operat ional faults, or physic al damage. Therefore, conditions that c ause these diodes to
operate, such as applying a voltage lo wer than the GND vo ltage to an input pin (and thu s to the P substrate) shou ld
be avoided.
13. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within t he Area of Safe
Operation (ASO).
14. Power supply lines2
Return current generated by the motor ’s Back-EMF requires countermeasures, such as providing a return current
path by inserting capacitors across the power supply and GND (10µF, ceramic capacitor is recommended). In this
case, it is important to conclusively confirm that none of the negative effects sometimes seen with electrolytic
capacitors – including a capacitance drop at lo w temperatur es - occurs. Also, the connected power supply must have
sufficient current absorbing capability. Otherwise, the regenerated current will incr ease voltage on the power supply
line, which may in turn cause problems with the product, including peripheral circuits exceeding the absolute
maximum rating. To help protect against damage or degradation, physical safety meas ures should be taken, such as
providing a voltage clamping diode across the power supply and GND.
15. Capacitor Between Output and Ground
If a large capacitor is connected betwee n the output pin and ground p in, current from the c harged capacitor can flo w
into the output pin and may destro y the IC when the VCC o r VIN pin is short ed to groun d or pul led do wn to 0V. Use a
capacitor smaller than 10µF between out put and ground.
16. Switching Noise
When the operation mode is in PWM control or VREF contr ol, PWM switching nois e may affect the control input pins
and cause IC malfunctions. In this case, insert a pull down resistor (10kΩ is recommended) between each control
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment ,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medica l equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way respons ible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN USA EU CHINA
CLASSⅢ
CLASSⅣ CLASSⅢ
CLASSⅢ
CLASSⅡb
CLASSⅢ
(Note 1)
, transport
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
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[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
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2S, NH3, SO2, and NO2
H
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Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux ma y negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, ple ase consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
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