ROHM BD6088GUL Technical data
A
LED Driver s for LCD Backlights
Mulitifunction Backlight LED Driver
for Small LCD Panels (Charge Pump Type)
BD6088GUL
●Description
BD6088GUL is “Intelligent LED Driver” that is the most suitable for the cellular phone.
It has 6LED driver for LCD Backlight and GPO 4 port.
It has ALC function, that is “Low Power Consumption System” realized.
It can be developed widely from the model high End to the model Low End.
As it has charge pump circuit for DCDC, it is no need to use coils, and it contributes to small space.
VCSP50L3(3.50mm×3.50mm 0.5mm space)
It adopts the very thin CSP package that is the most suitable for the slim phone.
●Functions
1) Total 6LEDs driver for LCD Backlight
It have 4LEDs (it can select 4LED or 3LED) for exclusire use of Main and 2LEDs which can
chose independent control or a main allotmert by resister setting.
“Main Group” can be controlled by Auto Luminous Control (ALC) system.
“Main Group” can be controlled by external PWM signal.
ON/ off and a setup of electric current are possible at the time of the independent control by the independence.
2) Ambient Light sensor interface
Main backlight can be controlled by ambient brightness.
Photo Diode, Photo Transistor, Photo IC(Linear/Logarithm) can be connected.
Bias source for ambient light sensor, gain and offset adjustment are built in.
LED driver current as ambient level can be customized.
3) Charge Pump DC/DC for LED driver
It has x1/x1.5/ x2 mode that will be selected automatically.
The most suitable voltage up magnification is controlled automatically by LED port voltage.
Output voltage fixed mode function loading (3.9V/4.2V/4.5V/4.8V)
Soft start
4) GPO 4 Port
Open Drain output and slope control loading
5) Thermal shutdown
6) I2C BUS FS mode(max 400kHz)
*This chip is not designed to protect itself against radioactive rays.
*This material may be changed on its way to designing.
*This material is not the official specification.
●Absolute Maximum Ratings (Ta=25 oC)
functions, Over voltage protec t i on (Auto-return t ype), Over current protection (Auto-return t ype) Loading
No.11040EAT29
Parameter Symbol Ratings Unit
Maximum voltage VMAX 7 V
Power Dissipation Pd 1380
Operating Temperature Range Topr -30 ～ +85 ℃
Storage Temperature Range Tstg -55 ～ +150 ℃
note) Power dissipation deleting is 11.04mW/ oC, when it’s used in over 25 oC.
(It’s deleting is on the board that is ROHM’s standard)
●Operating conditions (VBAT≥VIO, Ta=-35~85
Parameter Symbol Ratings Unit
VBAT input voltage VBAT 2.7 ～ 5.5 V
VIO pin voltage VIO 1.65 ～ 3.3 V
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(note
mW
o
C)
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●Electrical Characteristics (Unless otherwise specified, Ta=25°C, VBAT=3.6V, VIO=2.6V)
Parameter Symbol
【Circuit Current】
VBAT Circuit current 1 IBAT1 - 0.1 3.0 μA RESETB=0V, VIO= 0V
VBAT Circuit current 2 IBAT2 - 0.5 3.0 μA RESETB=0V, VIO=2.6V
Min. Typ. Max.
Limits
Unit Condition
Technical Note
VBAT Circuit current 3 IBAT3 - 61 65 mA
VBAT Circuit current 4 IBAT4 - 92 102 mA
VBAT Circuit current 5 IBAT5 - 123 140 mA
VBAT Circuit current 6 IBAT6 - 0.25 1.0 mA
【LED Driver】
LED current Step (Setup) ILEDSTP1 128 Step LED1~6
LED current Step (At slope) ILEDSTP2 256 Step LED1~6
LED Maximum setup current IMAXWLED - 25.6 - mA LED1~6
LED current accuracy IWLED -7% 15 +7% mA I
LED current Matching ILEDMT - - 4 %
LED OFF Leak current ILKLED - - 1.0 μA VLED=4.5V
【DC/DC(Charge Pump)】
Output Voltage 1 VoCP1 - Vf+0.2 Vf+0.25 V Vf is forward direction of LED
3.705 3.9 4.095 V
Output Voltage 2 VoCP2
3.99 4.2 4.41 V
4.275 4.5 4.725 V
4.56 4.8 5.04 V
DC/DC x1 mode, Io=60mA
VBAT=4.0V
DC/DC x1.5 mode, Io=60mA
VBAT=3.6V
DC/DC x2 mode, Io=60mA
VBAT=2.7V
ALC Operating
ALCEN=1, AD cycle=0.5s setting
Except sensor current
=15mA setting, VLED=1.0V
LED
Between LED1~6
at VLED=1.0V, ILED=15mA
Fixation Voltage Output
ModeIo=60mA
VBAT≧3.2V
Drive ability IOUT - - 150 mA VBAT≥3.2V, VOUT=3.9V
Switching frequency fosc 0.8 1.0 1.2 MHz
Over Voltage
Protection detect voltage
Over Current
Protection detect Current
【Sensor Interface】
SBIAS Output Voltage VoS
SBIAS Maximum Output current IomaxS 30 - - mA Vo=2.6V setting
SBIAS Discharge resister at OFF ROFF S - 1.0 1.5 kΩ
SSENS Input range VISS 0 -
ADC resolution ADRES 8 bit
ADC integral calculus non-linearity ADINL -3 - +3 LSB
ADC differential calculus
non-linearity
OVP - 6.0 6.5 V
OCP - 250 375 mA VOUT=0V
2.85 3.0 3.15 V Io=200µA
2.47 2.6 2.73 V Io=200µA
VoS×
255/256
ADDNL -1 - +1 LSB
V
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●Electrical Characteristics (Unless otherwise specified, Ta=25°C, VBAT=3.6V, VIO=2.6V)
Parameter Symbol
【SDA, SCL】 (I2C Interface)
L level input voltage VILI -0.3 -
H level input voltage VIHI
Hysteresis of Schmitt trigger input VhysI
L level output voltage VOLI 0 - 0.3 V SDA Pin, IOL=3 mA
Min. Typ. Max.
0.75 ×
VIO
0.05 ×
VIO
Limits
0.25 ×
VIO
VBAT
-
+0.3
- - V
Unit Condition
V
V
Technical Note
Input current linI - - 1 μA
【RESETB】 (CMOS Input Pin)
L level input voltage VILR -0.3 -
H level input voltage VIHR
Input current IinR - - 1 μA
【WPWMIN】 (NMOS Input Pin)
L level input voltage VILA -0.3 - 0.3 V
H level input voltage VIHA 1.4 -
Input Current IinA - - 1 μA
PWM input minimum High pulse
width
【OUTCNT】 (Pull-down resistance NMOS Input Pin)
L level input voltage VILA -0.3 - 0.3 V
H level input voltage VIHA 1.4 -
Input Current IinA - 3.6 10 μA Vin=1.8V
PWmin 80 - - μs WPWMIN Pin
0.75 ×
VIO
0.25 ×
VIO
VBAT
-
+0.3
VBAT
+0.3
VBAT
+0.3
Input Voltage
= 0.1×VIO～0.9×VIO
V
V
Input Voltage
= 0.1×VIO～0.9×VIO
V
Input Voltage
= 0.1×VBAT～0.9×VBAT
V
【OUT1～4】 ( NMOS Open Drain Outp ut Pin)
L level output voltage VOLG - - 0.3 V IOL=10mA
Output Leak current ILKG - - 1.0 μA Vout=3.6V
【GC1, GC2】 (Sensor Gain Control CMOS Output Pin)
L level output voltage VOLS - - 0.2 V IOL=1mA
H level output voltage VOHS
【KBLT】 (Key Back Light Control CMOS Output Pin)
L level output voltage VOLK - - 0.2 V IOL=1mA
H level output voltage VOHK
Pull-downregistance RPUDK - 1.0 2.0 MΩ Vin=3.3V
VoS
-0.2
VIO
-0.2
- - V IOH=1mA
- - V IOH=1mA
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( ) ( )
( )
●Block Diagram / Application Circuit example 1
1μF
Technical Note
1μF
GC1
GC2
Photo IC
BH1600FVC
VBAT
VDD
GND
IOUT
10µF
VBATCP
VBAT1
VIO
RESETB
SCL
SD
WPWMIN
OUTCNT
SBIAS
SSENS
SGND
GC2
GC1
1μF
Charge Pump
Mode Control
Level
I/O
Sensor
I/F
Shift
ALC
C1P
C1N
Charge Pump
x1 / x1.5 / x2
LED terminal voltage feedback
I2C interface
Digital Control
LED
control
C2N
OVP
C2P
TSD
IREF
VREF
CPGND
GPO
Key
Control
Slope
Control
Slope
Control
Slope
Control
Slope
Control
VOUT
LED1
LED2
LED3
LED4
LED5
LED6
LEDGND
KBLT
OUT1
OUT2
OUT3
OUT4
VBAT
・・
VBAT
Key Pad
LED
1μF
Main Back Light
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T4
T1
T2
T3
(Open)
GND1
Fig.1 Block Diagram / Application Circuit example 1
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( )
●Block Diagram / Application Circuit example 2
1μF
Technical Note
1μF
GC1
GC2
Photo IC
BH1600FVC
VBAT
VDD
GND
IOUT
10µF
VBATCP
VBAT1
VIO
RESETB
SCL
SD
WPWMIN
OUTCNT
SBIAS
SSENS
SGND
GC2
GC1
1μF
Charge Pump
Mode Control
Level
I/O
Sensor
I/F
Shift
ALC
C1P
C1N
Charge Pump
x1 / x1.5 / x2
LED terminal voltage feedback
I2C interface
Digital Control
LED
control
C2N
OVP
C2P
TSD
IREF
VREF
CPGND
GPO
Key
Control
Slope
Control
Slope
Control
Slope
Control
Slope
Control
VOUT
LED1
LED2
LED3
LED4
LED5
LED6
LEDGND
KBLT
OUT1
OUT2
OUT3
OUT4
VBAT
・・
VBAT
Key Pad
LED
2ch
Sub Back Light
1μF
4ch
Main Back Light
T4
T1
T2
T3
(Open)
GND1
Fig.2 Block Diagram / Application Circuit example 2
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●Pin Arrangement ［Bottom View］
F
E
D
C
T3
T4 SSENS SGND VBAT1 VIO
SBIAS GC1 GC2 SDA OUT2 OUT4
LED5 LED6 SCL OUT1 OUT3 VOUT
LEDGND LED4 OUTCNT WPWMIN C1P C2P
Technical Note
6 x 6 Ball
B
A
INDEX
○
LED2 LED3 RESETB KBLT C2N VBATCP
T1 LED1 GND1 C1N CPGND T2
1 2 3 4 5 6
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●Package
VCSP50L3 CSP small package
SIZE : 3.50mm×3.50mm(A difference in public：X,Y Both ±0.05mm) Height : 0.55mm max
A ball pitch : 0.5 mm
2
Technical Note
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●Pin Functions
No Ball No. Pin Name I/O
1 B6 VBATCP - - GND Battery is connected A
2 F4 VBAT1 - - GND Battery is connected A
3 A1 T1 I VBAT - Test Ground Pin(short to Ground) B
4 A6 T2 I VBAT GND Test Input Pin (short to Ground) S
5 F6 T3 O VBAT GND Test Output Pin(Open) M
6 F1 T4 I VBAT GND Test Input Pin (short to Ground) S
7 F5 VIO - VBAT GND I/O Power supply is connected C
8 B3 RESETB I VBAT GND Reset input (L: reset, H: reset cancel) H
9 E4 SDA I/O VBAT GND I2C data input / output I
10 D3 SCL I VBAT GND I2C clock input H
11 A5 CPGND - VBAT 12 A3 GND1 - VBAT 13 C1 LEDGND - VBAT 14 A4 C1N I/O VBAT GND
15 C5 C1P I/O - GND
16 B5 C2N I/O VBAT GND
17 C6 C2P I/O - GND
18 D6 VOUT O - GND Charge Pump output pin A
19 A2 LED1 I - GND LED is connected 1 for LCD Back Light E
20 B1 LED2 I - GND
21 B2 LED3 I - GND
22 C2 LED4 I - GND
23 D1 LED5 I - GND
24 D2 LED6 I - GND
25 E1 SBIAS O VBAT GND Bias output for the Ambient Light Sensor Q
26 F2 SSENS I VBAT GND Ambient Light Sensor input N
27 E2 GC1 O VBAT GND Ambient Light Sensor gain control output 1 X
28 E3 GC2 O VBAT GND Ambient Light Sensor gain control output 2 X
29 F3 SGND - VBAT - Ground B
30 D4 OUT1 O - GND General Output Port 1 U
31 E5 OUT2 O - GND General Output Port 1 U
32 D5 OUT3 O - GND General Output Port 1 U
33 E6 OUT4 O - GND General Output Port 1 U
34 C4 WPWMIN I VBAT GND External PWM input for Back Light * V
35 C3 OUTCNT I VBAT GND OUT1,2,3,4 Output Control (L:OFF) * L
36 B4 KBLT O VBAT GND Key Back Light Control Output W
* A setup of a register is separately necessary to make it effective.
ESD Diode
For Power For Ground
Functions
Ground
Ground
Ground
Charge Pump capacitor is connected
Charge Pump capacitor is connected
Charge Pump capacitor is connected
Charge Pump capacitor is connected
LED is connected 2 for LCD Back Light
LED is connected 3 for LCD Back Light
LED is connected 4 for LCD Back Light
LED is connected 5 for LCD Back Light
LED is connected 6 for LCD Back Light
Technical Note
Equivalent
Circuit
B
B
B
F
G
F
G
E
E
E
E
E
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●Equivalent Circuit
A VBATB E
C
Technical Note
VBAT
F
VBAT
J
Q
VBAT VBAT
G
VIO VBAT
R
VBATVBAT L
VBATVBAT
H
M
VBAT VBAT
S
VIOVBAT
VBATVBAT
I
N
U
VIOVBAT
VBAT
VBAT VBAT V
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VBAT W
VIO
X
VoS VBAT
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Technical Note
●I2C BUS format
The writing/reading operation is based on the I
2
C slave standard.
・Slave address
A7 A6 A5 A4 A3 A2 A1 R/W
1 1 1 0 1 1 0 1/0
・Bit Transfer
SCL transfers 1-bit data during H. SCL cannot change signal of SDA during H at the time of bit transfer. If SDA changes
while SCL is H, START conditions or STOP conditions will occur and it will be interpreted as a control signal.
SDA
SCL
SDA a state of stability
Data are effective
SDA
：
It can change
・START and STOP condition
When SDA and SCL are H, data is not transferred on the I
2
C- bus. This condition indicates, if SDA changes from H to L
while SCL has been H, it will become START (S) conditions, and an access start, if SDA changes from L to H while SCL
has been H, it will become STOP (P) conditions and an access end.
SDA
SCL
S P
START condition
STOP condition
・Acknowledge
It transfers data 8 bits each after the occurrence of START condition. A transmitter opens SDA after transfer 8bits data, and
a receiver returns the acknowledge signal by setting SDA to L.
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
SCL
START condition
S
12 89
not acknowledge
acknowledge
clock pulse for
acknowledgement
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A A
A
A
A7 A6 A5A4A3A2A1A
A
A
A
A
A
A
A
A A
A
A
A6A5A4A3A2A1A
A
A
A
A
Technical Note
・Writing protocol
A register address is transferred by the next 1 byte that transferred the slave address and the write-in command. The 3rd
byte writes data in the internal register written in by the 2nd byte, and after 4th byte or, the increment of register address is
carried out automatically. However, when a register address turns into the last address, it is set to 00h by the next
transmission. After the transmission end, the increment of the address is carried out.
*1 *1
D7 D6D5 D4D3 D2D1 D0 D7 D6 D5 D4 D3 D2D1 D0
X X X X X X X
S
R/W=0(write)
from master to slave
from slave to master
register addressslave address
00
DATA
register address
increment
=acknowledge(SDA LOW)
=not acknowledge(SDA HIGH)
S=START condition
P=STOP condition
*1: Write Timing
DATA
register address
・Reading protocol
It reads from the next byte after writing a slave address and R/W bit. The register to read considers as the following address
accessed at the end, and the data of the address that carried out the increment is read after it. If an address turns into the
last address, the next byte will read out 00h. After the transmission end, the increment of the address is carried out.
X X X X X X X
R/W=1(read)
from master to slave
from slave to master
P
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
DATA
register address
increment
=acknowledge(SDA LOW)
=not acknowledge(SDA HIGH)
S=START condition
P=STOP condition
DATA slave address
register address
increment
1 S
・Multiple reading protocols
After specifying an internal address, it reads by repeated START condition and changing the data transfer direction. The
data of the address that carried out the increment is read after it. If an address turns into the last address, the next byte will
read out 00h. After the transmission end, the increment of the address is carried out.
P
increment
S
slave address
R/W=0(write)
from master to slave
from slave to master
0
7
register address
D7 D6 D5 D4 D3D2D1D0 D7D6D5D4D3D2D1D0
DATA DATA
register address
increment
Sr 1
0X X X X X X X
X X X X X X X
slave address
=acknowledge(SDA LOW)
=not acknowledge(SDA HIGH)
S=START condition
P=STOP condition
Sr=repeated START condition
R/W=1(read)
P
register address
increment
As for reading protocol and mul tiple reading protocols, please do A(not acknowledge) after doing the final reading operation.
It stops with read when ending by A(acknowledge), and SDA stops in the state of Low when the readingdata of that time is
0. However, this state returns usually when SCL is moved, data is read, and A(not acknowledge)is done.
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S
●Timing diagram
SDA
CL
t
LOW
SU;DAT
t
HD;STA
t
Technical Note
t BUF
SU;STA
t
HD;STA
t
HD;DAT
S Sr P
t
HIGH
t
t SU;STO
S
●Electrical Characteristics(Unless otherwise specified, Ta=25
o
C, VBAT=3.6V, VIO=2.6V)
Standard-mode Fast-mode
Parameter Symbol
Unit
Min. Typ. Max. Min. Typ. Max.
2
【I
C BUS format】
SCL clock frequency fSCL 0 - 100 0 - 400 kHz
LOW period of the SCL clock tLOW 4.7 - - 1.3 - - μs
HIGH period of the SCL clock tHIGH 4.0 - - 0.6 - - μs
Hold time (repeated) START condition
After this period, the first clock is generated
tHD;STA 4.0 - - 0.6 - - μs
Set-up time for a repeated START condition tSU;STA 4.7 - - 0.6 - - μs
Data hold time tHD;DAT 0 - 3.45 0 - 0.9 μs
Data set-up time tSU;DAT 250 - - 100 - - ns
Set-up time for STOP condition tSU;STO 4.0 - - 0.6 - - μs
Bus free time between a STOP and START
condition
t
BUF 4.7 - - 1.3 - - μs
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●Register List
Address W/R
Register data
D7 D6 D5 D4 D3 D2 D1 D0
Technical Note
Function
00h W VOUT(1) VOUT(0) DCDCMD DCDCFON - - - SFTRST
01h W WPWMEN W PWMPOL - - W6MD W5MD W4MD MLEDMD LED Pin function setting
02h W/R - - - - ALCEN W6EN W5EN MLEDEN
03h W - IMLED(6) IMLED(5) IMLED(4) IMLED(3) IMLED(2) IMLED(1) IMLED(0)
04h W - IW5(6) IW5(5) IW5(4) IW5(3) IW5(2) IW5(1) IW5(0)
05h W - IW6(6) IW6(5) IW6(4) IW6(3) IW6(2) IW6(1) IW6(0)
06h W THL (3) THL (2) THL (1) THL (0) TLH (3) TLH (2) TLH (1) TLH (0)
07h W ADCYC (1) ADCYC (0) GAIN (1) GAIN(0) STYPE VSB MDCIR SBIASON
08h W SOFS (3) SOFS (2) SOFS (1) SOFS (0) SGAIN (3) SGAIN (2) SGAIN (1) SGAIN (0)
09h R - - - - AMB (3) AMB (2) AMB (1) AMB (0) Ambient level
0Ah W - IU0 (6) IU0 (5) IU0 (4) IU0 (3) IU0 (2) IU0 (1) IU0 (0) LED Current at Ambient level 0h
0Bh W - IU1 (6) IU1 (5) IU1 (4) IU1 (3) IU1 (2) IU1 (1) IU1 (0) LED Current at Ambient level 1h
0Ch W - IU2 (6) IU2 (5) IU2 (4) IU2 (3) IU2 (2) IU2 (1) IU2 (0) LED Current at Ambient level 2h
0Dh W - IU3 (6) IU3 (5) IU3 (4) IU3 (3) IU3 (2) IU3 (1) IU3 (0) LED Current at Ambient level 3h
0Eh W - IU4 (6) IU4 (5) IU4 (4) IU4 (3) IU4 (2) IU4 (1) IU4 (0) LED Current at Ambient level 4h
Software Reset
DC/DC function setting
Power Control
Main group current setting
LED5 current setting
LED6 current setting
Main Current transition
Measurement mode setting
Measurement data adjustment
0Fh W - IU5 (6) IU5 (5) IU5 (4) IU5 (3) IU5 (2) IU5 (1) IU5 (0) LED Current at Ambient level 5h
10h W - IU6 (6) IU6 (5) IU6 (4) IU6 (3) IU6 (2) IU6 (1) IU6 (0) LED Current at Ambient level 6h
11h W - IU7 (6) IU7 (5) IU7 (4) IU7 (3) IU7 (2) IU7 (1) IU7 (0) LED Current at Ambient level 7h
12h W - IU8 (6) IU8 (5) IU8 (4) IU8 (3) IU8 (2) IU8 (1) IU8 (0) LED Current at Ambient level 8h
13h W - IU9 (6) IU9 (5) IU9 (4) IU9 (3) IU9 (2) IU9 (1) IU9 (0) LED Current at Ambient level 9h
14h W - IUA (6) IUA (5) IUA (4) IUA (3) IUA (2) IUA (1) IUA (0) LED Current at Ambient level Ah
15h W - IUB (6) IUB (5) IUB (4) IUB (3) IUB (2) IUB (1) IUB (0) LED Current at Ambient level Bh
16h W - IUC (6) IUC (5) IUC (4) IUC (3) IUC (2) IUC (1) IUC (0) LED Current at Ambient level Ch
17h W - IUD (6) IUD (5) IUD (4) IUD (3) IUD (2) IUD (1) IUD (0) LED Current at Ambient level Dh
18h W - IUE (6) IUE (5) IUE (4) IUE (3) IUE (2) IUE (1) IUE (0) LED Current at Ambient level Eh
19h W - IUF (6) IUF (5) IUF (4) IUF (3) IUF (2) IUF (1) IUF (0) LED Current at Ambient level Fh
1Ah W - - CHYS (1) CHYS (0) CTH (3) CTH (2) CTH (1) CTH (0)
1Bh W - - - KBMD OUT4MD OUT3MD OUT2MD OUT1MD OUT, KBLT Output Mode setting
1Ch W/R - - - KBEN OUT4EN OUT3EN OUT2EN OUT1EN OUT, KBLT Output Control
1Dh W FPWM - - - KBSLP(1) KBSLP(0) OUTSLP(1) OUTSLP(0) OUT, KBLT Slope setting
Input "0” for "-".
A free address has the possibility to assign it to the register for the test.
Access to the register for the test and the undefined register is prohibited.
Key driver 2 Value
judging control setup
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2011.04 - Rev.
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BD6088GUL
●Register Map
Address 00h < Software Reset , DC/DC f unction setting >
Address R/W Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
00h W VOUT(1) VOUT(0) DCDCMD DCDCFON - - - SFTRST
Initial
Value
Bit [7:6] : VOUT (1:0) VOUT Output Voltage setting
“00” : VOUT Output Voltage 3.9V
“01” : VOUT Output Voltage 4.2V
“10” : VOUT Output Voltage 4.5V
“11” : VOUT Output Voltage 4.8V
Bit [5:4] : DCDCMD, DCDCFON DC/DC setting
<DC/DC Return Mode> <DC/DC ON/OFF Control>
“00” : LED Pin Return Depend on LED ON/OFF
“01” : LEDPin Return Depend on LED ON/OFF
“10” : Output Voltage Fixation Depend on LED ON/OFF
“11” : Output Voltage Fixation Compulsion ON
Bit [3:1] : (Not used)
Bit0 : SFTRST
00h 0 0 0 0 - - - 0
Software Reset
“0” :
“1” :
Refer to “The explanation of Reset” for detail.
Reset cancel
Reset(All register initializing)
Technical Note
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© 2011 ROHM Co., Ltd. All rights reserved.
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BD6088GUL
Address 01h < LED Pin function setting>
Address R/W Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
01h W WPWMEN WPWMPOL - - W6MD W5MD W4MD MLEDMD
Initial
Value
Bit7 : WPWMEN External PWM Input “WPWMIN” terminal Enable Control (Valid/Invalid)
“0” : External PWM input invalid
“1” : External PWM input valid
Bit6 : WPWMPOL Polarity setting of External PWM input "WPWMIN" terminal
“0” : External PWM ’L’ drive
“1” : External PWM ’H’ drive
Refer to “(11) Current Adjustment” of “The explanation of ALC” for detail.
Bit [5:4] : (Not used)
Bit3 : W6MD LED6 control setting (individual / Main group)
Bit2 : W5MD LED5 control setting (individual / Main group)
Bit1 : W4MD LED4 movement setting (unuse / use)
Bit0 : MLEDMD Main group setting (Normal / ALC)
Set up a fixation in every design because it isn't presumed W*PW that it is changed dynamically.
And, do the setup of W*PW when each LED is Off.
42h 0 1 - - 0 0 1 0
Refer to “(11) Current Adjustment” of “The explanation of ALC” for detail.
“0” : LED6 individual control
“1” : LED6 Main group control
Refer to “LED Driver” for detail.
“0” : LED5 individual control
“1” : LED5 Use (Main group)
Refer to “LED Driver” for detail.
“0” : LED4 unuse
“1” : LED4 use (Main group Control)
Refer to “LED Driver” for detail.
“0” : Main group Normal Mode(ALCNon-reflection)
“1” : Main group ALC Mode
Refer to “(1) Auto Luminous Control ON/OFF” of “The explanation of ALC” for detail.
Technical Note
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
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2011.04 - Rev.
A
BD6088GUL
Address 02h < Power Control>
Address R/W Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
02h W/R - - - - ALCEN W6EN W5EN MLEDEN
Initial
Value
Bit [7:4] : (Not used)
Bit3 : ALCEN ALC function Control (ON/OFF)
Bit2 : W6EN LED6 Control (ON/OFF)
Bit1 : W5EN LED5 Control (ON/OFF)
Bit0 : MLEDEN Main group LED Control (ON/OFF)
00h - - - - 0 0 0 0
“0” : ALC block OFF
“1” : ALC block ON (Ambient Measurement)
“0” : LED6 OFF
“1” : LED6 ON(individual control)
“0” : LED5 OFF
“1” : LED5 ON(individual control)
“0” : Main group OFF
“1” : Main group ON
Technical Note
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
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2011.04 - Rev.
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