ROHM BD6081GVW Technical data

A

LED Drivers for LCD Backlights

Multifunction Backlight LED Drivers
for Small LCD Panels (Charge Pump Type)

BD6081GU, BD6081GVW

●Description
BD6081GU / BD6081GVW is compound LED Driver which is the most suitable for the cellular phone.
Main LCD Back Light LED Driver (Max 4 Light), Sub LCD Back Light LED Driver (Max 2 Light), 2 system RGB LED Drivers,
2Ch LDO (2.8V/1.8V) included. This is PMIC (Power Management IC) that is the most suitable for "the indication part" of the
cellular phone.A charge pump form is adopted, and a coil is never used for the part DC/DC. This IC achieves compact size
with the chip size package (VCSP85H3). [BD6081GU] This IC solves a mounting problem by BGA package
(SBGA063W060). [BD6081GVW]

●Features

1) Main LCD Back Light LED Driver (Max 4 Light)
4 Lighting / 3 Lighting can be chosen (register setting)

2) Sub LCD Back Light LED Driver (Max 2 Light)
2 Lighting / 1 Lighting can be chosen (register setting)

3) RGB LED Driver (2 System)
Slope control is built in.(2 system independence can be controlled.)
LED connection (for G1LED,G2LED,B1LED,B2LED) can be set up in the battery or the DC/DC output.(register setting)
LED connection (for R1LED,R2LED) can be set up in the battery only.

4) 2ch Series Regulator

2.8V output Iomax=150mA

1.8V output Iomax=150mA(normal mode)

1.8V output low current consumption mode / normal mode Switching is possible. (The outside pin control / regi ster setting)

5) Charge Pump DC/DC
Soft start Functions
Over voltage protection (Auto-return type)
Over current protection (Auto-return type)

6) Thermal shutdown (Auto-return type)

2

7) I

●Absolute Maximum Ratings (Ta=25

C BUS Fast-mode (max 400kHz)Writing

*This chip is not designed to protect itself against radioactive rays.
*This material may be changed on its way to designing.
*This material is not the specification.

℃)

Parameter

Symbol Ratings Unit

No.11040EAT27

Maximum Applied voltage VMAX 7 V
Power Dissipation
Operating Temperature Range Topr -25 ～ +85 ℃

Storage Temperature Range Tstg -55 ～ +150 ℃

cote1)Power dissipation deleting is 13.8mW/ ℃, when it’s used in over 25 ℃.
(It’s deleting is on the board that is ROHM’s standard))
Note2)Power dissipation deleting is 8.48mW/
(It’s deleting is on the board that is ROHM’s standard))

●Operating conditions (VBATVIO, Ta=-25~85

Parameter Symbol

VBAT input voltage VBAT 2.7 ～ 5.5 V
VIO pin voltage VIO 1.65 ～ 3.3 V

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

BD6081GU Pd 1725 note1) mW
BD6081GVW Pd 1060 note2) mW

℃, when it’s used in over 25 ℃.

℃)

1/35

Ratings

Unit

2011.04 - Rev.

A

BD6081GU,BD6081GVW

●Electrical Characteristics (Unless otherwise specified, Ta=25℃, VBAT=3.6V, VIO=1.8V)

Parameter Symbol

【Circuit Current】

VBAT Circuit current 1 IBAT1 - 0.1 3.0 A
VBAT Circuit current 2 IBAT2 - 0.5 3.0 A

VBAT Circuit current 3 IBAT3 - 6.2 9.5 A
VBAT Circuit current 4 IBAT4 - 100 150 A

VBAT Circuit current 5 IBAT5 - 140 210 A
VBAT Circuit current 6 IBAT6 - 63 95 mA

VBAT Circuit current 7 IBAT7 - 95 143 mA

VBAT Circuit current 8 IBAT8 - 125 188 mA

【LED Driver】

LED current Step1 ILEDSTP1 32 Step
LED current Step2 ILEDSTP2 64 Step
LED Maximum setup current 1
LED Maximum setup current 2
LED current accurate ILED 18 20 22 mA

LED current Matching ILEDMT - 5 10 %

LED OFF Leak current ILKLED - - 1.0 A

【DC/DC(Charge Pump)】

Output voltage V℃P Vf+0.15 Vf+0.2 - V
Current Load IOUT - - 255 mA
Oscillator frequency fosc 0.8 1.0 1.2 MHz

Over voltage protection
detect voltage
Over current protection
detect current

【REG1】

Output voltage Vo1 2.716 2.80 2.884 V
I/O voltage difference Vsat1 - 0.2 0.3 V
Load stability Vo11 - 10 60 mV
Input stability Vo12 - 10 60 mV
Ripple Rejection Ratio RR1 30 40 - dB
Short circuit current limit Ilim01 - 225 450 mA
Discharge resister at OFF ROFF1 - 1.0 1.5 k

【REG2】

Output voltage 1 Vo21 1.74 1.8 1.86 V

Output voltage 2 Vo22 1.71 1.8 1.89 V
Load stability Vo21 - 10 60 mV

Input stability Vo22 - 10 60 mV
Ripple Rejection Ratio RR2 30 40 - dB
Short circuit current limit Ilim02 - 225 450 mA
Discharge resister at OFF ROFF2 - 1.0 1.5 k

IMAX1 - - 32 mA
IMAX2 - - 31.5 mA

OVP - 6.0 6.5 V

OCP - 250 375 mA

Min. Typ. Max.

Limits

Unit Condition

RESET=0V, VIO=0V
RESET=0V, VIO=1.8V
REG2 low current consumption mode,

Io=0mA
REG2 normal mode, Io=0mA
REG1, REG2 normal mode, Io=0mA
DC/DC x1mode, Io=60mA,VBAT=4.0V
DC/DC x1.5mode,

Io=60mA,VBAT=3.6V
DC/DC x2 mode,

Io=60mA,VBAT=2.7V

MLED1~4, SLED1~2
R1LED, G1LED, B1LED,R2LED,

G2LED, B2LED (with 0mA setting)
MLED1~4, SLED1~2, ISET=120k
R1LED, G1LED, B1LED,R2LED,

G2LED, B2LED, ISET=120k
ILED=20mA, ISET=120k

Between MLED1~4
Between SLED1~2
Between R1LED, G1LED and B1LED
Between R2LED, G2LED and B2LED

Vf is LED forward voltage
VBAT3.2V, VOUT=4V

VOUT=0V

Io=150mA, VBAT3.1V
VBAT=2.5V, Io=150mA
Io=1~150mA
VBAT=3.2~5.5V, Io=150mA
f=100Hz, Vin=200mVp-p
Vo=0V

Io=150mA
(normal mode)

Io=100A
(low current consumption mode)

Io=1~150mA
VBAT=3.2~5.5V, Io=150mA
f=100Hz, Vin=200mVp-p
Vo=0V

Technical Note

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

2/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

Technical Note

●Electrical Characteristics (Unless otherwise specified, Ta=25℃, VBAT=3.6V, VIO=1.8V)

Parameter Symbol

Min. Typ. Max.

Limits

Unit Condition

【I2C Input (SDA, SCL)】

LOW level input voltage
HIGH level input voltage
Hysteresis of Schmitt trigger input

LOW level output voltage
(SDA) at 3mA sink current

Input current each I/O pin

VIL -0.3 - 0.25 ×VIO V

VIH 0.75 ×VIO - VBAT+0.3 V

Vhys 0.05 ×VIO - - V

VOL 0 - 0.3 V

lin -10 - 10 A

Input voltage =

0.1×VIO~0.9×VIO

【RESET, RGB1CNT, RGB2CNT】

LOW level input voltage
HIGH level input voltage1
HIGH level input voltage2

Input current each I/O pin1

Input current each I/O pin2

VIL -0.3 - 0.25 ×VIO V
VIH1 0.75 ×VIO - VBAT+0.3 V
VIH2 0.75 ×VIO - VIO+0.3 V

Iin -10 - 10 A

Iin - 6 15 A

RESET Pin
RGB1CNT, RGB2CNT Pin
Input voltage =

0.1×VIO~0.9×VIO,RESET Pin
Input voltage = .9×VIO

,RGB1CNT, RGB2CNT Pin

【REG2EN, REG2MD】

LOW level input voltage
HIGH level input voltage
Input current each I/O pin

VIL -0.3 - 0.3 V

VIH 1.4 - VBAT,+0.3 V

Iin - 6 15 A Vin=1.8V

●Power dissipation (On the ROHM’s standard board)

BD6081GU BD6081GVW

2.0

1.8

1725mW

1.6

1.4

W)

1.2

（

1.0

0.8

Power Dissipation

0.6

0.4

0.2

0.0
0 25 50 75 100 125 150

Ta（

℃）

1.2

1.0

1060mW

0.8

W)

（

0.6

Power Dissipation

0.4

0.2

0.0
0 25 50 75 100 125 150

Ta（ ℃）

Fig.1 Fig.2

Information of the ROHM’s standard board Information of the ROHM’s standard board

Material: glass-epoxy Material: glass-epoxy

Size: 50mm×58mm×1.75mm (8 Layer) Size: 114.3mm×76.2mm×1.6mm

Pattern of the board: Refer to it that goes later.

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

3/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

A

●Block Diagram / Application Circuit example

VBATCP

VBAT1

VBAT2

Charge Pump
Mode Control

VIO

RESET

SCL

SD

RGB1CNT

RGB2CNT

I/O

LEVEL
SHIFT

I2C

CONTROL

DGND

120k

0.1µF

ISET

CREF

IREF

VREF

T3

T1

REFGND

T2

T4

Fig.3 Block Diagram / Application Circuit example

1F (10V)

C1N

1F (10V)

C1P

C2N

Charge Pump
x1 / x1.5 / x2

OVP

LED terminal voltage feedback

Register control

TESTI2

TESTI1

TESTO1

TESTO2

C2P

TSD

Register control

REG2EN

CPGND

Slope

Control

(RGB1)

Slope

Control

(RGB2)

REG2MD

REG1

2.8V

Io=150mA

REG2

1.8V

Io=150mA

REGGND

VOUT

VOUTM

MLED1～4

SLED1～2

BLGND

G1LED

B1LED

R1LED

G2LED

B2LED

R2LED

RGBGND

VBATREG

REG1O

REG2O

Technical Note

VBAT

External Control

External Control

VBAT

1F

1F

1F

(10V)

Main LCD

Back Light

Sub LCD

Back Light

RGB1 LED

RGB2 LED

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

4/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

●Pin Arrangement [Bottom View］

BD6081GU

T4 VBAT1 REG2O

G

REFGND R1LED CREF REG1O REG2M D

F

G1LED B1LED ISET REG2EN

E

RGBGND R2LED TESTI1 TESTI2 SCL VOUTM VOUT

D

G2LED B2LED

C

SLED1 BLGND MLED2 MLED4 CPGND C1N VBATCP

B

T1 SLED2 MLED1 MLED3 V BA T2 C2N T2

A

1234567

Total: 48ball
There is no Ball only in C3 for index.

BD6081GVW

H

T2 C1P C2P - - SDA RESET T3

G

C1N - - VOUT M TESTO 1 SCL

CPGND C2N TESTI1 VOUT DGND

F

MLED3 MLED4 VBAT2

E

MLED2 - MLED1 - - REG1O

D

(index) BLGND B2LED - - TESTI2 CR EF REG2O

C

SLE D2 SLED1 R2LED - -

B

A

T1 G2LED

12345678

Total: 63ball
There is no Ball only in C1 for index.
“-“ means NC pin (Non connect to internal circuit)

VBATREG

TESTO2 TESTO1 C1P C2P

index

RGBGND

REGGND VIO T3

RGB2CNT

VBATCP

B1LED G1LED R1LED ISET T4

-

RGB1CNT

SDA DGN D

RGB1CNT

REG2EN

REFGND

RESET

RGB2CNT

TESTO2

REGGND

VBATREG

VIO

REG2MD

-VBAT1

Technical Note

-

-

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

5/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

●Package
BD6081GU
VCSP85H3 CSP small Package
SIZE : 3.90mm×3.90mm(A difference in public: X and Y, together, ± 0.1mm) height 1.0mm max
A ball pitch : 0.5mm

BD6081

Lot No.

Technical Note

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

6/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

●Package
BD6081GVW
SBGA063W060
SIZE : 6.0mm×6.0mm(A difference in public: X and Y, together, ± 0.1mm) height 0.9mm max
A ball pitch : 0.65mm

BD6081

Lot No.

Technical Note

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

7/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

m

Technical Note

●Pin Functions

No

BD6081GU BD6081GVW

1 B7 E4 VBATCP - - - GND Battery is connected A
2 G2 B8 VBAT1 - - - GND Battery is connected A
3 A5 E3 VBAT2 - - - GND Battery is connected A
4 G4 D7 VBATREG - - - GND Battery is connected A
5 A1 A1 T1 - - - GND Test Pin (short to GND) A
6 A7 H1 T2 - - - GND Test Pin (short to GND) A
7 G7 H8 T3 - - VBAT GND Test Pin (short to GND) J
8 G1 A8 T4 - - VBAT GND Test Pin (short to GND) J

9 F3 C7 CREF O - VBAT GND Reference voltage output P
10 G6 G8 VIO - - VBAT GND I/O voltage source is connected C
11 F7 H7 RESET I VIO VBAT GND Reset input (L: RESET, H: RESET cancel) H
12 E6 H6 SDA I VIO VBAT GND I2C data input I
13 D5 G6 SCL I VIO VBAT GND I2C clock input H
14 B5 F1 CPGND - - VBAT - Ground B
15 F1 B6 REFGND - - VBAT - Ground B
16 G5 E7 REGGND - - VBAT - Ground B
17 B2 C2 BLGND - - VBAT - Ground B
18 D1 A3 RGBGND - - VBAT - Ground B
19 E7 F5 DGND - - VBAT - Ground B
20 B6 G1 C1N I/O - VBAT GND Charge Pump capacitor is connected F
21 C6 H2 C1P I/O - - GND Charge Pump capacitor is connected G
22 A6 F2 C2N I/O - VBAT GND Charge Pump capacitor is connected F
23
24 D7 F4 VOUT O ­25 D6 G4 VOUTM O - - GND Charge Pump output pin output pin A
26 E3 A7 ISET I - VBAT GND LED standard current O
27 F4 D6 REG1O O - VBAT GND REG1 output pin Q
28 G3 C8 REG2O O - VBAT GND REG2 output pin Q
29 A3 D3 MLED1 I - VBAT GND Main LCD Back Light LED is connected 1 D
30 B3 D1 MLED2 I - VBAT GND Main LCD Back Light LED is connected 2 D
31 A4 E1 MLED3 I - VBAT GND Main LCD Back Light LED is connected 3 D
32 B4 E2 MLED4 I - VBAT GND Main LCD Back Light LED is connected 4 D
33 B1 B2 SLED1 I - VBAT GND Sub LCD Back Light LED is connected 1 D
34 A2 B1 SLED2 I - VBAT GND Sub LCD Back Light LED is connected 2 D
35 F2 A6 R1LED I
36 E1 A5 G1LED I - VBAT GND Green LED1 is connected D
37 E2 A4 B1LED I - VBAT GND Blue LED1 is connected D
38 D2 B3 R2LED I
39 C1 A2 G2LED I - VBAT GND Green LED2 is connected D
40 C2 C3 B2LED I - VBAT GND Blue LED2 is connected D
41 F6 F6 RGB1CNT I VIO VIO GND RGB1 LED external ON/OFF Synchronism Pin K
42 E5 G7 RGB2CNT I VIO VIO GND RGB2 LED external ON/OFF Synchronism Pin K
43 E4 E6 REG2EN I (VBAT) VBAT GND REG2 ON/OFF control Pin (L: OFF, H: ON) L

44 F5 F8 REG2MD I (VBAT) VBAT GND
45 D3 F3 TESTI1 I - VBAT GND Test input pin 1 (short to GND) H

46 D4 C6 TESTI2 I - VBAT GND Test input pin 2 (short to GND) H
47 C5 G5 TESTO1 O - VBAT GND Test output pin 1 (OPEN) M

48 C4 F7 TESTO2 O - VBAT GND Test output pin 2 (OPEN) N
49

-

63

※ The LED pin which isn't used is to short-circuit to the ground. But, the setup of a register concerned with LED that isn’t used is prohibited.
Total: Functional 48Pin
48 balls (BD6081GU)
63 balls (BD6081GVW)

Pin No.

C7

- (Other) NC - - - - Non connect pin -

H3 C2P I/O - - GND Charge Pump capacitor is connected G

Pin Name I/O

Input
Level

-

-

ESD Diode

For

Power

VBAT GND Red LED1 is connected D

VBAT GND Red LED2 is connected D

For

Ground

-

GND Charge Pump output pin A

REG2 Mode control Pin
(L: low current consumption, H: normal)

Functions

Equivalent

circuit diagra

L

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

8/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

●Equivalent circuit diagram

A VBATB

C

VBAT

Technical Note

VBAT D

E

M

VBAT VBAT

F G

VBAT

VIO VBAT I VIO VBAT

J

N

VBAT

K

O

VBAT

H

VIOVIO

P

VBAT VBAT

VIO VBAT

VBAT VBAT L

Q

VBAT VBAT

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

9/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

r

Technical Note

●I2C BUS format
The writing/reading operation is based on the I2C slave standard.

・Slave address

A7 A6 A5 A4 A3 A2 A1 W

1 1 1 0 1 1 0 0

・Bit Transfer

SCL transfers 1-bit data during H. SCL cannot change signal of SDA during H at the time of bit transfer. If SDA changes
while SCL is H, START conditions or STOP conditions will occur and it will be interpreted as a control signal.

SDA

SCL

Data lin e stable;

Data valid

Change of data

allowed

・START and STOP condition

When SDA and SCL are H, data is not transferred on the I

2

C- bus. This condition indicates, if SDA changes from H to L
while SCL has been H, it will become START (S) conditions, and an access start, if SDA changes from L to H while SCL
has been H, it will become STOP (P) conditions and an access end.

SDA

SCL

S P

START Condition

STOP Condition

・Acknowledge

It transfers data 8 bits each after the occurrence of START condition. A transmitter opens SDA after transfer 8bits data, and
a receiver returns the acknowledge signal by setting SDA to L.

DATA OUTPUT
BY TRANSMITTER

DATA OUTPUT
BY RECEIVER

SCL from maste

S

START condition

12 89

not acknowledge

acknowledge

clock pulse for
acknowledgement

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

10/35

2011.04 - Rev.

A

BD6081GU,BD6081GVW

A A

A

A

A7 A6 A5A4A3A2A1A

A

A

_

S

2

Technical Note

・ Writing protocol

A register address is transferred by the next 1 byte that transferred the slave address and the write-in command. The 3rd
byte writes data in the internal register written in by the 2nd byte, and after 4th byte or, the increment of register address is
carried out automatically. However, when a register address turns into the last address (1Ah), it is set to 00h by the next
transmission. After the transmission end, the increment of the address is carried out.

*1 *1

D7 D6D5 D4D3 D2D1D0 D7 D6 D5 D4 D3 D2D1D0

X X X X X X X

S

R/W=0(write)

from m aste r to slave

from slave to master

register addressslave address

00

DATA

register address

increment

=acknowledge(SDA LOW)

=not acknowledge(SDA HIGH)
S=START condition
P=STOP condition
*1: Write Timing

DATA

register address

●Timing diagram

SDA

BUF

t

SU;DAT

t

CL

LOW

t

HD;STA

t

HD;DAT

S Sr P

t

t HIGH

t

HD;STA

SU;STA

t

t SU;STO

S

●Electrical Characteristics(Unless otherwise specified, Ta=25 ℃, VBAT=3.6V, VIO=1.8V)

Standard-mode Fast-mode

Min. Typ. Max. Min. Typ. Max.

【I

C BUS format】

Parameter Symbol

SCL clock frequency fSCL 0 - 100 0 - 400 kHz
LOW period of the SCL clock tLOW 4.7 - - 1.3 - - s
HIGH period of the SCL clock tHIGH 4.0 - - 0.6 - - s
Hold time (repeated) START condition
After this period, the first clock is generated

tHD;STA 4.0 - - 0.6 - - s

Set-up time for a repeated START condition tSU;STA 4.7 - - 0.6 - - s
Data hold time tHD;DAT 0 - 3.45 0 - 0.9 s
Data set-up time tSU;DAT 250 - - 100 - - ns
Set-up time for STOP condition tSU;STO 4.0 - - 0.6 - - s
Bus free time between a STOP

and START condition

BUF 4.7 - - 1.3 - - s

t

P

Unit

www.rohm.com

© 2011 ROHM Co., Ltd. All rights reserved.

11/35

2011.04 - Rev.