ROHM BA7062F Datasheet

1
Multimedia ICs
SYNC separator IC with AFC
BA7062F
The BA7062F separates the synchronization signals from a video signal and outputs the horizontal and vertical syn­chronization signals (H
D and VD), and the composite synchronization signal (Sync-out).
The H
Applications
TVs and VCRs
Features
1) Built-in AFC circuit.
2) Low power dissipation (approx. 21mW).
3) Low external parts count.
4) SOP 8-pin package.
5) Horizontal free-run frequency does not require adjust­ment.
1
2
3
4
8
7
6
5
PHASE
COMP
H.OSC
SYNC
SEPA
V.SEPA
Block diagram
Absolute maximum ratings (Ta = 25°C)
Parameter Symbol Limits Unit
8.0 V
350
mW
°C °C
V
CC Max.
Pd Topr Tstg
– 20 ~ + 75 – 55 ~ + 125
Power supply voltage Power dissipation Operating temperature Storage temperature
When mounted on a 50mm × 50mm PCB, reduced by 3.5mW for each increase in Ta of 1°C over 25°C.
Recommended operating conditions (Ta = 25°C)
Parameter Symbol Min. Typ. Max. Unit
V
CC 4.5 5.5 VOperating power supply voltage
2
Multimedia ICs BA7062F
VCC
1pin
1k
12k
100µA
Fig. 1
2pin
V
CC
200
5k
Fig. 2
3pin
200
Fig. 3
VCC
4pin
200
10k
Fig. 4
VCC
6pin
100
10µA
Fig. 5
VCC
8pin
1k
3k
3k 3k
3k 3k 3k
Fig. 6
Input / output circuits
Pin descriptions
Pin No.
1 2H
D
3 4V
D
5 6 7 8
Horizontal oscillator resistor H
D output
SYNC output (open collector) V
D output
GND Video input Power supply Phase comparator output
Function
3
Multimedia ICs BA7062F
Electrical characteristics (unless otherwise noted, Ta = 25°C and VCC = 5V)
Parameter Symbol Min. Typ. Max. Unit
I
Q
2.0 4.1 6.2 mA
V
syn-Min.
0.08 0.15 V
P-P
V
P-L
0.1 0.3 V
V
P-H
4.7 4.9 V
f
H-O
13.9 15.7 17.5 kHz
± 2.1 ± 2.9 ——kHz
T
HPH
– 1.0 0 + 1.0 µs
T
HD
10.5 11.5 12.5 µs
T
VD
200 260 320 µs
f
CAP
Quiescent current Minimum SYNC separation level Pulse voltage, Low Pulse voltage, High
Capture range Lock-in phase H
D pulse width
V
D pulse width
Conditions
2pin 4pin
2pin – 6pin
Pin 3 open Pin 6 terminated with 75
resistor 2, 4 pin 2, 4 pin
No input signal, I
1
= open
Not designed for radiation resistance.
(Horizontal) free-running frequency
Measurement circuit
8 7 6 5
1 2 3 4
II
100p
130k
V
T
V
T
V
T
1µ
1µ
1µ
75
Video In
+
+
+
A
47µ
0.022µ
39k
VCC
2200p
470k
10k V
CC
Fig. 7
Circuit operation (1) Synchronization separation circuit Detects the charging current to a externally-connected capacitor, and performs synchronization separation. (2) Horizontal oscillation circuit When a video signal is input, it is synchronized with Hsync by the PLL. The horizontal free-running frequen­cy is determined by external resistor R
1.
(3) Vertical synchronization separation circuit When a video signal is input, synchronization signal separation is done over the vertical synchronization pulse interval.
f
H-O = [kHz]
2.05E6 R
1
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