●Description
The reversible motor driver for output 1.0A for 1 motor can set the output modes to four modes, normal, reverse, stop
(idling), and braking in accordance with logic input (2 inputs).
●Features
1) Built-in surge absorption diode
2) By built-in power save circuit, current consumption when a motor stops (idles) can be suppressed
3) Output voltage can be optionally set by reference voltage setting pin
4) Built-in thermal shutdown circuit (TSD)
●Applications
Audio-visual equipment; PC peripherals; Car audios; Car navigation systems; OA equipments
●Absolute maximum ratings (Ta=25℃, All voltages are with respect to ground)
Parameter Symbol
Supply voltage VCC 18 18 18 30 36 V
Supply voltage VM 18 18 18 30 36 V
Output current I
OMAX
BA6956ANBA6287F BA6285FSBA6285AFP-Y BA6920FP-Y
1*1 1*1 1*1 1*1 1*1 A
Ratings
No.11008EBT02
Unit
Operating temperature T
Storage temperature T
Power dissipation Pd 1.19*2 0.689*3 0.813*4 1.45*5 1.45*5 W
Junction temperature T
*1 Do not, exceed Pd or ASO.
*2 SIP9 package. Derated at 9.5mW/℃ above 25℃.
*3 SOP8 package. Mounted on a 70mm x 70mm x 1.6mm FR4 glass-epoxy board with less than 3% copper foil. Derated at 5.52mW/℃ above 25℃.
*4 SSOP-A16 package. Mounted on a 70mm x 70mm x 1.6mm FR4 glass-epoxy board with less than 3% copper foil. Derated at 6.5mW/℃ above 25℃.
*5 HSOP25 package. Mounted on a 70mm x 70mm x 1.6mm FR4 glass-epoxy board with less than 3% copper foil. Derated at 11.6mW/℃ above 25℃.
●Operating conditions (Ta=25℃)
Parameter Symbol
Supply voltage VCC 6.5 ~ 15 4.5 ~ 15 4.5 ~ 15 4.5 ~ 24 6.5 ~ 34 V
Supply voltage VM 6.5 ~ 15 4.5 ~ 15 4.5 ~ 15 4.5 ~ 24 6.5 ~ 34 V
VREF voltage VREF < VCC, VM< VCC, VM< VCC, VM< VCC, VM < VCC, VMV
●Electrical characteristics (BA6956AN, unless otherwise specified, Ta=25℃ and VCC=9V, VM=9V)
Parameter Symbol
Min. Typ. Max.
Limits
Unit Conditions
Technical Note
Supply current 1 I
Supply current 2 I
Supply current 3 I
- 29 44 mA FWD/REV mode
CC1
- 56 80 mA Brake mode
CC2
- 0 15 µA Standby mode
CC3
Input threshold voltage H VIH 2.0 - VCC V
Input threshold voltage L VIL 0 - 0.8 V
Input bias current IIH 50 90 131 µA VIN=2V
Output saturation voltage VCE - 1.7 2.3 V IO=0.2A, vertically total
VREF bias current I
Standby current IST - 0 15 µA Standby mode
Input threshold voltage H VIH 2.0 - VCC V
Input threshold voltage L VIL 0 - 0.8 V
Input bias current IIH 45 90 135 µA VIN=2V
Output saturation voltage VCE - 1.0 1.5 V IO=0.2A, vertically total
VREF bias current I
Standby current IST - 0 15 µA Standby mode
Input threshold voltage H VIH 2.0 - VCC V
Input threshold voltage L VIL 0 - 0.8 V
Input bias current IIH 45 90 135 µA VIN=2V
Power save on voltage V
Power save off voltage V
2.0 - VCC V Standby mode
PSON
0 - 0.8 V Operation
PSOFF
Output saturation voltage VCE - 1.0 1.5 V IO=0.2A, vertically total
VREF bias current I
Standby current IST - 0 15 µA Standby mode
Input threshold voltage H VIH 2.0 - VCC V
Input threshold voltage L VIL 0 - 0.8 V
Input bias current IIH 40 80 120 µA VIN=2V
Power save on voltage V
Power save off voltage V
- - 0.8 V Operation
PSON
2.0 - VCC V Standby mode
PSOFF
Output saturation voltage VCE - 1.0 1.5 V IO=0.2A, vertically total
VREF bias current I
9 15 21 mA IO=0.2A, FWD or REV mode
REF
●Electrical characteristics (BA6920FP-Y, unless otherwise specified, Ta=25℃ and VCC=12V, VM=12V)
Parameter Symbol
Supply current 1 I
Supply current 2 I
Min. Typ. Max.
5 8 12 mA FWD/REV mode
CC1
3 5 8 mA Brake mode
CC2
Limits
Unit Conditions
Standby current IST - 0 15 µA Standby mode
Input threshold voltage H VIH 3.0 - VCC V
Input threshold voltage L VIL 0 - 0.8 V
Input bias current IIH 100 200 300 µA VIN=3V
Power save on voltage V
Power save off voltage V
2.0 - VCC V Standby mode
PSON
- - 0.8 V Operation
PSOFF
Output saturation voltage VCE - 2.2 3.3 V IO=0.2A, vertically total
VREF bias current I
1 VREF Reference voltage setting pin
2 OUT2 Driver output
3 RNF Power ground
4 OUT1 Driver output
5 VM Power supply (driver stage)
6 VCC Power supply (small signal)
7 FIN Control input (forward)
8 GND GND
9 RIN Control input (reverse)
1 OUT1 Driver output
2 VM Power supply (driver stage)
3 VCC Power supply (small signal)
4 FIN Control input (forward)
5 RIN Control input (reverse)
6 VREF Reference voltage setting pin
7 OUT2 Driver output
8 GND GND
1) Resistor for the current limitation, R1
This is a current limiting resistor for collector loss reduction and at the time of short-circuited output. It depends o n the
power supply voltage used, etc., but choose resistance of about 5 to 10Ω. In addition, set resistance with utmost care
to voltage drop caused by inrush current that flows when the motor is started.
2) Resistors and zener diode for the output high voltage setting, R2, R3 and ZD
These are the resistors and zener diode used when output high voltage is set. As for the voltage, only ( V
lower than the VREF pin voltage for BA6287F, BA6285FS and BA6285AFP-Y. (Reference values; V
SAT
≈ 0.25V, VF ≈
SAT
0.75V) Zener diode ZD is recommended to be used instead of resistor R3 when the power supply voltage is unstable
for BA6956AN and BA6920FP-Y.
3) Stabilization capacitor for the power supply line, C1
Please connect the capacitor of 1μF to 100μF for the stabilization of the power supply line, and confirm the motor
operation.
4) Phase compensating capacitor, C2, C3
Noise is generated in output pins or oscillation results in accord with the set mountin g state such as power supply
circuit, motor characteristics, PCB pattern artwork, etc. As noise oscillation measures, connect 0.01μF to 0.1μF
capacitors.
●Functional descriptions
1) Operation modes
Table 6 Logic table
IN1 IN2 OUT1 OUT2 Operation
L L OPEN* OPEN* Stop (idling)
H L H L Forward (OUT1 > OUT2)
L H L H Reverse (OUT1 < OUT2)
H H L L Brake (stop)
* OPEN is the off state of all output transistors. Please note that this is the state of the connected diodes, which differs from that of the mechanical relay.
** Output OUT1 and OUT2 become OPEN regardless of the input logic of FIN and RIN when switching to the power save mode with the POWERSAVE pin.
a) Stand-by mode
In stand-by mode, all output power transistors are turned off, and the motor output goes to high impedance.
b) Forward mode
This operating mode is defined as the forward rotation of the motor when the OUT1 pin is high and OUT2 pin is
low. When the motor is connected between the OUT1 and OUT2 pins, the current flows from OUT1 to OUT2.
c) Reverse mode
This operating mode is defined as the reverse rotation of the motor when the OUT1 pin is low and OUT2 pin is
high. When the motor is connected between the OUT1 and OUT2 pins, the current flows from OUT2 to OUT1.
d) Brake mode
This operating mode is used to quickly stop the motor (short circuit brake).
Note) Switching of rotating direction (FWD/REV)
When the rotating direction is changed over by the motor rotating condition, switch the d irection after the motor is
temporarily brought to the BRAKE condition or OPEN condition. It is recommended to keep the relevant conditi ons
as follows:
via BRAKE: Longer than braking time*. (* the time required for the output L terminal to achieve potential below GND when brake is activated.) via OPEN: The time longer than 1 ms is recommended.
2) Output high voltage setting
This function optionally sets output voltage by the output high voltage setting pin and controls the motor rotating speed.
However, when the output high voltage is set to a low level, consumption at IC increases. Carry out thermal design with
sufficient margin incorporated with the power dissipation (Pd) under the actual application condition taken into account.
a) BA6287F, BA6285FS, BA6285AFP-Y
The circuit diagram associated with the output high voltage setting
VREF pin is as per shown on the right. The output high and low
voltages V
and VOL are expressed by:
OH
VOH = VREF - ( V
V
OL
= V
SAT(Q3)
(Reference values; V
+ V
SAT(Q1)
F(Q2)
≈ 0.15V, VF ≈ 0.7V)
SAT
)
In addition, the relation of VREF voltage to output voltage is expressed by:
( V
SAT(Q1)
+ V
) < VREF < VM - V
F(Q2)
SAT(Q2)
+ V
F(Q2)
+ V
SAT(Q1)
Therefore, when the VREF voltage condition is as follows, the
output high voltage is restricted.
VREF > VM - V
= VM - V
V
OH
SAT(Q2)
SAT(Q2)
+ V
SAT(Q1)
+ V
F(Q2)
b) BA6956AN, BA6920FP-Y
The circuit diagram associated with the output high
voltage setting VREF pin is as per shown on the right.
The output high and low voltages VOH and VOL are
expressed by:
V
= VREF + ( V
OH
≈ VREF
V
OH
V
= V
OL
SAT(Q6)
= V
V
OL
SAT(Q7)
(Reference values; V
(BA6956AN)
+ V
+ V
F(Q5)
F(Q6)
F(Q4)
(BA6920FP-Y)
≈ 0.15V, VF ≈ 0.7V)
SAT
) - ( V
F(Q2)
+ V
F(Q3)
)
VREF
Fig.36 BA6956AN Fig.37 BA6920FP-Y
The output high voltage controllable range is expressed by:
VREF < VCC - V
VREF < VM - ( V
VREF < VM - V
SAT(Q1)
SAT(Q2)
SAT(Q3)
- V
+ V
+ ( V
F(Q4)
F(Q3)
F(Q2)
- V
F(Q5)
) + ( V
+ V
F(Q3)
F(Q2)
) - ( V
+ V
F(Q3)
F(Q4)
) - ( V
+ V
+ V
F(Q4)
F(Q5)
F(Q5)
) (BA6920FP-Y)
When the VREF voltage condition is as follows, the output high voltage is restricted.
1) Absolute maximum ratings
Devices may be destroyed when supply voltage or operating temperature exceeds the absolute maximum rating.
Because the cause of this damage cannot be identified as, for e xample, a short circuit or an o pen circuit, it is important
to consider circuit protection measures – such as adding fuses – if any value in excess of absolute maximum ratings i s
to be implemented.
2) Connecting the power supply connector backward
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply lines, such as adding an external direction diode.
3) Power supply lines
Return current generated by the motor’s Back-EMF require s countermeasures, such as providing a return curr ent path
by inserting capacitors across the power supply and GND (10µF, ceramic capacitor is recommended). In this case, it is
important to conclusively confirm that none of the negative effects sometimes seen with electrolytic capacitors –
including a capacitance drop at low temperatures - occurs. Also, the connected power supply must have sufficient
current absorbing capability. Otherwise, the regenerated current will increase voltage on the power supply line, which
may in turn cause problems with the product, including peripher al circuits exceeding the absolute maximum ratin g. To
help protect against damage or degradation, physical safety measures should b e taken, such as providing a voltage
clamping diode across the power supply and GND.
4) Electrica l p otential at GND
Keep the GND terminal potential to the minimum potential under any operating condition. In addition, check to
determine whether there is any terminal that provides voltage below GND, including the voltage during transient
phenomena. When both a small signal GND and high current GND are present, single-point groundi ng (at the set’s
reference point) is recommended, in order to separate the small signal and high current GND, and to ensure that
voltage changes due to the wiring resistance and high current do not affect the voltage at the small signal GND. In the
same way, care must be taken to avoid changes in the GND wire pattern in any external connected component.
5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power d issipation (Pd) under actual operating
conditions.
6) ASO - Area of Safety Operation
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
7) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. T he IC may be damaged if there is any
connection error, or if pins are shorted together.
8) Operation in strong electromagnetic fields
Using this product in strong electromagnetic fields may cause IC malfunctions. Use extreme caution with
electromagnetic fields.
9) Built-in thermal shutdown (TSD) circuit
The TSD circuit is designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or
guarantee its operation in the presence of extreme heat. Do not continue to use the IC after the TSD circuit is activated,
and do not operate the IC in an environment where activation of the circuit is assumed.
10) Capacitor between output and GND
In the event a large capacitor is connected between the output and GND, i f VCC and VIN are sh ort-circuited with 0V or
GND for any reason, the current charged in the capacitor flows into the output and may destroy the IC. Use a capacitor
smaller than 0.47μF between output and GND.
11) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a l ow impedance pin subjects the IC to stress.
Therefore, always discharge capacitors after each process or step. Always turn the IC's power supply off before
connecting it to or removing it from the test setup during the inspection process. Ground the IC during assembly steps
as an antistatic measure. Use similar precaution when transporting or storing the IC.
12) Regarding the input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements, in order to keep them
isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, as well as operating malfunctions and physical damage. T herefor e, do not use methods b y
which parasitic diodes operate, such as applying a voltage lower than the GND (P substrate) voltage to an input pin.
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