Motor driver ICs
FDD spindle motor driver
BA6492BFS
The BA6492BFS is a one-chip IC designed for driving FDD spindle motors. This high-performance IC employs a
3-phase, full-wave soft switching drive system, and contains a digital servo, an index amplifier, two monostable multivibrator elements, and a power save circuit. The compactly packaged IC reduces the number of external components
required.
Applications
Floppy disk drivers
Features
1) 3-phase, full-wave soft switching drive system.
2) Digital servo circuit.
3) Power save circuit.
Absolute maximum ratings (Ta = 25C)
4) Hall power supply switch.
5) Motor speed changeable.
6) Index amplifier. Built-in 2 monostable multivibrator.
Recommended operating conditions (Ta = 25C)
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Motor driver ICs BA6492BFS
Block diagram
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Motor driver ICs BA6492BFS
Pin descriptions
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Motor driver ICs BA6492BFS
Input/output circuits
(1) Monostable multivibrator element timing setting
(3, 4 pin)
(3) Speed discriminator output (6 pin) (4) Integrating amplifier (7, 8 pin)
(2) Constant voltage output (5 pin)
(5) Motor output (1115 pin) (6) Hall bias (16 pin)
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Motor driver ICs BA6492BFS
(7) Hall input (1722 pin) (8) Index input (23, 24 pin)
(9) FG amplifier (2527 pin)
(10) Speed control (29 pin) (11) External clock input (30 pin)
(12) Start/stop (31 pin) (13) Timing output (32 pin)
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Motor driver ICs BA6492BFS
Electrical characteristics (unless otherwise noted, Ta = 25C, VCC = 5V)
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Motor driver ICs BA6492BFS
FCircuit operation
(1) Motor drive circuits
The motor driver employs a 3-phase, full-wave soft
switching current drive system, in which the rotor position
is sensed by Hall elements. The motor drive current is
sensed by a small resistor (R
NF). The total drive current
is controlled and limited by sensing the voltage developed across this resistor. The motor drive circuit consists
of Hall amplifiers, an amplitude control circuit, a driver, an
error amplifier, and a current feedback amplifier (Fig. 14).
The waveforms of different steps along the signal path
from the Hall elements to the motor driver output are
shown in Fig. 15. The Hall amplifiers receive the Hall elements voltage signals as differential inputs. Next, by deducting the voltage signal of Hall elements 2 from the
voltage signal of Hall elements 1, current signal H1,
which has a phase 30 degrees ahead of Hall elements 1,
is created. Current signals H2 and H3 are created likewise. The amplitude control circuit then amplifies the H1,
H2, and H3 signals according to the current feedback
amplifier signal. Then, drive current signals are produced
at A1, A2, and A3 by applying a constant magnification
factor. Because a soft switching system is employed, the
drive current has low noise and a low total current ripple.
The total drive current is controlled by the error amplifier
input voltage. The error amplifier has a voltage gain of
about –1 1dB (a factor of 0.28). The current feedback amplifier regulates the total drive current, so that the error
amplifier output voltage (V1) becomes equal to the V
RNF
voltage, which has been voltage-converted from the total
drive current through the R
NF pin. If V1 exceeds the cur-
rent limiter voltage (Vcl), the constant voltage Vcl takes
precedence, and a current limit is provided at the level of
NF .
Vcl/R
The current feedback amplifier tends to oscillate because it receives all the feedback with a gain of 0dB. To
prevent this oscillation, connect an external capacitor to
the C
NF pin for phase compensation and for reducing the
high frequency gain.
(2) Speed control circuit
The speed control circuit is a non-adjustable digital servo
system that uses a frequency locked loop (FLL). The circuit consists of an 1/2 frequency divider, an FG amplifier ,
and a speed discriminator (Fig. 16).
An internal reference clock is generated from an external
clock signal input. The 1/2 frequency divider reduces the
frequency of the OSC signal. The FG amplifier amplifies
the minute voltage generated by the motor FG pattern
and produces a rectangular-shaped speed signal. The
FG amplifier gain (G
FG = 42dB, typical) is determined by
the internal resistance ratio.
For noise filtering, a high-pass filter is given by C3 and a
resistor of 1.6kΩ (typical), and a low-pass filter is given
by C4 and a resistor of 200kΩ (typical). The cutoff frequencies of high-pass and low-pass filters (f
H and fL, re-
spectively) are given by:
f
H=
2π 1.6kΩ C3
1
fL=
2π 200kΩ C4
1
The C3 and C4 capacitances should be set so as to satisfy the following relationship:
HtfFGtfL
f
where fFG is the FG frequency . Note that the FG amplifier
inputs have a hysteresis.
The speed discriminator divides the reference clock and
compares it with the reference frequency , and then outputs an error pulse according to the frequency difference.
The motor rotational speed N is given by:
fosc
1
(1)N=60 S
S
n
z
fosc is the reference clock frequency,
n is (speed discriminator count)
2,
z is the FG tooth number.
The discriminator count depends on the speed control
pin voltage.
The integrator flattens out the error pulse of the speed
discriminator and creates a control signal for the motor
drive circuit (Fig. 17).
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Motor driver ICs BA6492BFS
(3) Index signal circuit
The index signal circuit receives and amplifies differential
inputs of Hall device signals. The Hall inputs have a hysteresis. The monostable multivibrator devices create a
delay time from the zero-cross point, and outputs a pulse
after the delay time. The delay time and the pulse width
can be set arbitrarily with the time constant of the external
CR. The following equations are given for the delay times
T1, T2, and T3 for the speed control pin voltage levels of
LOW, HIGH, and MEDIUM, respectively:
T1
1.35 C5 VR [sec] (Typ.)
1.13 C5 VR [sec] (Typ.)
T2
0.68 C5 VR [sec] (Typ.)
T3
2.14 10
T4
T1/T2 = 1.2 (Typ.)
T1/T3 = 2.0 (Typ.)
The delay angle remains constant regardless of changes
in the motor speed.
5
C4 [sec] (Typ.)
(4) Other circuits
The start/stop circuit puts the IC to the operational state
when the control pin is LOW, and to the standby state (circuit current is nearly zero) when the control pin is HIGH.
The Hall elements bias switch, which is linked to the
start/stop circuit, is turned off during the standby state,
so that the Hall elements current is shut down.
The thermal shutdown circuit shuts down the IC currents
when the chip junction temperature is increased to about
175C (typical). The thermal shutdown circuit is deactivated when the temperature drops to about 20C (typical).
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Motor driver ICs BA6492BFS
Circuit operation
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Motor driver ICs BA6492BFS
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Motor driver ICs BA6492BFS
Application example
Operation notes
(1) Thermal shutdown circuit
This circuit shuts down all the IC currents when the chip
junction temperature is increased to about 175C (typical). The circuit is deactivated when the temperature
drops to about 155C (typical).
(2) Hall elements connection
Hall elements can be connected in either series or paral-
lel. When connecting in series, care must be taken not to
allow the Hall output to exceed the Hall common-mode
input range.
(3) Hall input level
Switching noise may occur if the Hall input voltage
(1722 pin) is too high. Differential inputs of about
100mV (peak to peak) are recommended.
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Motor driver ICs BA6492BFS
(4) Driver ground pin (pin 14)
Pin 14, which is the motor current ground pin, is not connected to the signal ground pins (pin 1 and 2). Design a
proper conductor pattern in consideration of the motor
current that flows through pin 14.
Electrical characteristic curves
(5) External clock
For the external clock, make sure that the pin30 voltage
is always less than V
age.
CC and more than the ground volt-
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Motor driver ICs BA6492BFS
External dimensions (Units: mm)
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