The BA6110FS is a low-noise, low-offset programmable operational amplifier. Offering superb linearity over a broad
range, this IC is designed so that the forward direction conductivity (g
such as voltage control amplifiers (VCA), voltage control filters (VCF) and voltage control oscillators (VCO).
Distortion reduction circuitry improves the signal-to-noise ratio by a significant 10dB at a distortion rate of 0.5% in
comparison with products not equipped with this feature. When used as a voltage control amplifier (VCA), a high S / N
ratio of 86dB can be achieved at a distortion rate of 0.5%.
The open loop gain is determined by the control current and an attached gain determining resistance R
range of settings.
In addition, a built-in low-impedance output buffer circuit reduces the number of attachments.
Power supply voltageV
Power dissipation
Operating temperature ˚C
Storage temperature˚C
Maximum control current500µAI
1 Reduced by 3mW for each increase in Ta of 1˚C each 25˚C.
*
11
OUT
Current mirror (4)
Q
15
Current mirror (5)
mW
R
12
3
Buffer IN
R
4
Q
Q
BA6110FS
15
V
CC
R
5
14
Buffer OUT
17
Q
18
16
9
EE
V
Electrical characteristics
!!!!
ParameterSymbolMin.Typ.Max.UnitConditions
Quiescent currentI
Pin 7 bias currentI
DistortionTHD—0.21%Fig.2
Forward transmission conductanceg
Pin 6 maximum output voltage| V
Pin 8 maximum output voltage911—VR
Pin 6 maximum output current300500650µAI
Residual noise 1VN
Residual noise 2VN
Discontinuous noiseVNP
Leakage level—– 94– 75dBm
(unless otherwise noted, Ta = 25°C, VCC = 15V, VEE = – 15V)
Q
7PIN
m
OM6
OM8
| V
OM6
| I
1
2
L (Leak)
0.93.06.0mA I
—0.85µA—Fig.2
4800 8000 12000µsI
1214—VI
|
|
|
—– 94– 90dBmFig.2
—– 74– 66dBmFig.2
2
—10.511.5dBFig.2
CONTROL
= 0µAFig.2
I
CONTROL
= 200µA, VI = 5mVrms
CONTROL
= 500µAFig.2
CONTROL
= 500µAFig.2
L
= 47kΩFig.2
CONTROL
= 500µAFig.2
CONTROL
= 0µA, BPF
I
(30 ~ 320kHz, 3dB, 6dB / OCT)
CONTROL
= 200µA, BPF
I
(30 ~ 20kHz, 3dB, 6dB / OCT)
CONTROL
= 200µA, BPF
I
(30 ~ 20kHz, 3dB, 6dB / OCT)
I
CONTROL
= 0µA, VIN = – 30dBm
IN
= 20kHz
f
Measurement
circuit
Fig.2
Standard ICs
Measurement circuit
!!!!
BA6110FS
D.V
4
S
27kΩ
Circuit discription
!!!!
10µF
V
600Ω
1
1kΩ
1
S
+
1
2
2
S
1V
1
3
1kΩ
S
3
2
500µA→
11
12
BA6110FS
7
3
1
3
2
200µA→
5
S
15
5
9
7
S
1
The BA6110FS is configured of an operational amplifier
which can control the forward propagation conductance
m
(g
) using the control current, an input biascompensating diode used to eliminate distortion created
by the amplifier’s differential input, a bias setter, and an
output buffer.
In the operational amplifier, Pin 1 is the positive input and
Pin 3 is the negative input. Pin 7 is the control pin which
determines the differential current. Pin 11 is the output pin
which determines the open loop gain using the external
resistor and the control current.
This section describes the circuit operation of this
operational amplifier.
Transistors Q
operational amplifier, while transistors Q
13
and Q14 form the differential input for the
7
to Q12 are
composed of the current mirror circuits. The current
mirror absorbs current from the differential input common
emitter which is equal to the control current flowing into
the Pin 7 control pin. If the differential input V
point, then 1 / 2 Ic is supplied to the Q
IN
= 0 at this
13
and Q
collectors and the other half passes through the current
mirrors (3) and (4). The output of current mirror (3) which
is the differential active load is inverted by current mirror
(5), and is balanced with the output of current mirror (4),
also an active load.
If the differential input changes, the current balance
changes. The output current is on Pin 11. An output
voltage can be generated using an external resistance.
2
150kΩ
Fig.2
mA
S
0
1
30 ~ 20kHz
BPF
47kΩ
VEE = – 10V
2
S
6-1
14
CC
V
1
S
6-2
2
40dB AMP
= + 10V
V.V
THD
Vmp
DV
For the open loop gain of this operational amplifier, if the
Pin 7 control current is I
resistance is R
O
, then:
Av = gm · RO =
CONTROL
and the Pin 11 external
CONTROL
× R
I
KT
2
q
To eliminate the distortion created by the differential input,
the input bias diode and its bias circuit consist of the
following: bias diodes D
1
and D2, current mirrors (1) and
(2), and the Pin 5 bias pin current mirror that consists of
the transistors Q
1
to Q6 and the resistance R1.
This circuit eliminates the distortion that occurs as a
result of using the differential input open loop.
In the buffer circuit, Pin 12 is the buffer input and Pin 14 is
the buffer output.
In the buffer circuit, the emitter follower consists of the
active load of the NPN transistor, Q
16
Q
. The VF difference created by the emitter follower is
17
, and its active load,
eliminated by the emitter follower which consists of the
14
PNP transistor Q
18
and resistor R5. Also, the gain is
determined by the ratio of the signal source resistance
IN
R
and the diode impedance.
O
Standard ICs
BA6110FS
Attached components
!!!!
(1) Positive input (Pin 1)
This is the differential positive input pin. To minimize the
distortion due to the diode bias, an input resistor is
connected in series with the signal source. By increasing
the input resistance, distortion is minimized.
However, the degree of improvement for resistances
greater than 10kΩ is about the same. An input resistance
of 1kΩ to 20kΩ is recommended.
(2) Negative input (Pin 3)
This is the differential negative input pin. It is grounded
with roughly the same resistance value as that of the
positive input pin. The offset adjustment is also
connected to this pin. Make sure a sufficiently high
resistance is used, so as not to disturb the balance of the
input resistance (see Figure 3).
(3) Input bias diode (Pin 5)
The input bias diode current (I
D
) is determined by this pin.
The IC input impedance when the diode is biased, if the
diode bias current is I
D
, is expressed as follows:
I
D
26
(mA)
Rd = (Ω)
(4) Control (Pin 7)
This pin controls the differential current. By changing the
current which flows into this pin, the gain of the differential
amplifier can be changed.
(5) Output (Pin 11)
The differential amplifier gain (A
resistor R
O
connected between the output terminal and
V
) is determined by the
the Pin 7 control terminal, as follows:
I
CONTROL
Av = gm · RO =
52 (mV)
(mA)
× R
O
Make sure the resistor is selected based on the desired
maximum output and gain.
(6) Buffer input (Pin 12)
The buffer input consists of the PNP and NPN emitter
follower. The bias current is normally about 0.8µA.
Consequently, when used within a small region of control
current, we recommend using the high input impedance
FET buffer.
(7) Buffer output resistance (Pin 14)
An 11kΩ resistor is connected between V
CC
and the
output within the IC. When adding an external resistance
between the GND and the output, make sure the resistor
L
R
= 33kΩ.
Application example
!!!!
(1) Fig.3 shows a voltage-controlled amplifier (AM
modulation) as an example of an application of the
BA6110FS.
By changing the I
gain can be changed. The gain (A
Pin 11 is R
CONTROL
current on Pin 7, the differential
V
), if the resistance of
O
, is determined by the following equation:
CONTROL
(mA)
Av = gm · RO =
I
52 (mV)
× R
O
Good linearity can be achieved when controlling over
three decades.
By connecting Pin 5 to the V
CC
by way of a resistor, the
input is biased at the diode and distortion is reduced.
The gain in this case is given by the diode impedance Rd
and the ratio of the input resistance R
IN
, as shown in the
following:
d
Av = gm · RO ×
R
Rd × R
IN
The diode impedance Rd = (26 / ID (mA) ) Ω, so that the
Pin 5 bias current I
D
= (VCC - 1V) / R (Pin 5). The graph in
Fig. 6 shows the control current in relation to the open
loop gain at the diode bias. In the same way, Fig.7 shows
the control current in relation to the THD = 0.5% output at
the bias point.
Fig. 8 shows a graph of the control current in relation to
the open gain with no diode bias.
Fig. 9 shows a graph of the control current in relation to
the SN ratio.
Fig. 10 shows a graph of the diode bias current in relation
to the SN ratio.
Fig. 11 shows a graph of the power supply voltage
characteristics.
(2) Fig. 4 shows a low pass filter as an example of an
application of the BA6110FS.
The cutoff frequency f
O
can be changed by changing the
Pin 7 control current.
The cutoff frequency f
O
is expressed as:
R
fO =
(R + RA) 2πC
A
· g
m
This is attenuated by -6dB / OCT.
Fig. 12 shows a graph of the I
CONTROL
in relation to the
output characteristics.
(3) Fig. 5 shows a voltage-controlled secondary low
passfilter as an example of an application of the
BA6110FS.
The cutoff frequency f
O
can be changed by changing
thePin 7 control current.
R
A
· g
m
fO =
(R + RA) · 2πC
This is attenuated by - 12dB / OCT.
Fig. 13 shows a graph of the I