BA6110FS
Standard ICs
Voltage controlled operational amplifier
BA6110FS
The BA6110FS is a low-noise, low-offset programmable operational amplifier. Offering superb linearity over a broad
range, this IC is designed so that the forward direction conductivity (g
such as voltage control amplifiers (VCA), voltage control filters (VCF) and voltage control oscillators (VCO).
Distortion reduction circuitry improves the signal-to-noise ratio by a significant 10dB at a distortion rate of 0.5% in
comparison with products not equipped with this feature. When used as a voltage control amplifier (VCA), a high S / N
ratio of 86dB can be achieved at a distortion rate of 0.5%.
The open loop gain is determined by the control current and an attached gain determining resistance R
range of settings.
In addition, a built-in low-impedance output buffer circuit reduces the number of attachments.
Applications
!
Electronic volume controls
Voltage-controlled impedances
Voltage-controlled amplifiers (VCA)
Voltage-controlled filters (VCF)
Voltage-controlled oscillators (VCO)
Multipliers
Sample holds
Schmitt triggers
m
) can be changed, making it ideal for applications
L
, enabling a wide
Features
!
1) Low distortion rate.
(built-in distortion reduction bias diode)
2) Low noise.
3) Low offset voltage. (V
Block diagram
!!!!
IO
= 3m V
Max
).
BA6110FS
4) Built-in output buffer.
5) Variable g
m
with superb linearity across three decade
fields.
CC
V
N.C.
16 15 14 13 12 11 10
–
+
12345678
N.C.
POSITIVE INPUT
N.C.
BUFFER OUTPUT
1 / 2
1 / 2
N.C.
NEGATIVE INPUT
BUFFER INPUT
VCA OUTPUT
V
CC
N.C.
INPUT BIAS
EE
N.C.
– V
9
BUFFER
N.C.
CONTROL INPUT
Standard ICs
Internal circuit configuration
!!!!
Q
5
Q
4
CC
Pd
Topr
Tstg
C Max.
Current mirror (2)
Q
13
Current mirror (3)
R
1
Q
6
Q
9
Q
7
Q
8
Control pin
7
300
– 20 ~ + 70
– 55 ~ + 125
Q
14
R
2
Q10Q
12
Q
11
Fig.1
34 V
1
∗
Current mirror (1)
Input bias
1
D
1
D
2
3
5
Q
Q
1
(Ta = 25°C)
3
Q
2
Positive input
Negative input
Absolute maximum ratings
!!!!
Parameter Symbol Limits Unit
Power supply voltage V
Power dissipation
Operating temperature ˚C
Storage temperature ˚C
Maximum control current 500 µAI
1 Reduced by 3mW for each increase in Ta of 1˚C each 25˚C.
*
11
OUT
Current mirror (4)
Q
15
Current mirror (5)
mW
R
12
3
Buffer IN
R
4
Q
Q
BA6110FS
15
V
CC
R
5
14
Buffer OUT
17
Q
18
16
9
EE
V
Electrical characteristics
!!!!
Parameter Symbol Min. Typ. Max. Unit Conditions
Quiescent current I
Pin 7 bias current I
Distortion THD — 0.2 1 % Fig.2
Forward transmission conductance g
Pin 6 maximum output voltage | V
Pin 8 maximum output voltage 911— VR
Pin 6 maximum output current 300 500 650 µAI
Residual noise 1 VN
Residual noise 2 VN
Discontinuous noise VNP
Leakage level —– 94 – 75 dBm
(unless otherwise noted, Ta = 25°C, VCC = 15V, VEE = – 15V)
Q
7PIN
m
OM6
OM8
| V
OM6
| I
1
2
L (Leak)
0.9 3.0 6.0 mA I
— 0.8 5 µA — Fig.2
4800 8000 12000 µsI
12 14 — VI
|
|
|
—– 94 – 90 dBm Fig.2
—– 74 – 66 dBm Fig.2
2
— 10.5 11.5 dB Fig.2
CONTROL
= 0µA Fig.2
I
CONTROL
= 200µA, VI = 5mVrms
CONTROL
= 500µA Fig.2
CONTROL
= 500µA Fig.2
L
= 47kΩ Fig.2
CONTROL
= 500µA Fig.2
CONTROL
= 0µA, BPF
I
(30 ~ 320kHz, 3dB, 6dB / OCT)
CONTROL
= 200µA, BPF
I
(30 ~ 20kHz, 3dB, 6dB / OCT)
CONTROL
= 200µA, BPF
I
(30 ~ 20kHz, 3dB, 6dB / OCT)
I
CONTROL
= 0µA, VIN = – 30dBm
IN
= 20kHz
f
Measurement
circuit
Fig.2
Standard ICs
Measurement circuit
!!!!
BA6110FS
D.V
4
S
27kΩ
Circuit discription
!!!!
10µF
V
600Ω
1
1kΩ
1
S
+
1
2
2
S
1V
1
3
1kΩ
S
3
2
500µA→
11
12
BA6110FS
7
3
1
3
2
200µA→
5
S
15
5
9
7
S
1
The BA6110FS is configured of an operational amplifier
which can control the forward propagation conductance
m
(g
) using the control current, an input biascompensating diode used to eliminate distortion created
by the amplifier’s differential input, a bias setter, and an
output buffer.
In the operational amplifier, Pin 1 is the positive input and
Pin 3 is the negative input. Pin 7 is the control pin which
determines the differential current. Pin 11 is the output pin
which determines the open loop gain using the external
resistor and the control current.
This section describes the circuit operation of this
operational amplifier.
Transistors Q
operational amplifier, while transistors Q
13
and Q14 form the differential input for the
7
to Q12 are
composed of the current mirror circuits. The current
mirror absorbs current from the differential input common
emitter which is equal to the control current flowing into
the Pin 7 control pin. If the differential input V
point, then 1 / 2 Ic is supplied to the Q
IN
= 0 at this
13
and Q
collectors and the other half passes through the current
mirrors (3) and (4). The output of current mirror (3) which
is the differential active load is inverted by current mirror
(5), and is balanced with the output of current mirror (4),
also an active load.
If the differential input changes, the current balance
changes. The output current is on Pin 11. An output
voltage can be generated using an external resistance.
2
150kΩ
Fig.2
mA
S
0
1
30 ~ 20kHz
BPF
47kΩ
VEE = – 10V
2
S
6-1
14
CC
V
1
S
6-2
2
40dB AMP
= + 10V
V.V
THD
Vmp
DV
For the open loop gain of this operational amplifier, if the
Pin 7 control current is I
resistance is R
O
, then:
Av = gm · RO =
CONTROL
and the Pin 11 external
CONTROL
× R
I
KT
2
q
To eliminate the distortion created by the differential input,
the input bias diode and its bias circuit consist of the
following: bias diodes D
1
and D2, current mirrors (1) and
(2), and the Pin 5 bias pin current mirror that consists of
the transistors Q
1
to Q6 and the resistance R1.
This circuit eliminates the distortion that occurs as a
result of using the differential input open loop.
In the buffer circuit, Pin 12 is the buffer input and Pin 14 is
the buffer output.
In the buffer circuit, the emitter follower consists of the
active load of the NPN transistor, Q
16
Q
. The VF difference created by the emitter follower is
17
, and its active load,
eliminated by the emitter follower which consists of the
14
PNP transistor Q
18
and resistor R5. Also, the gain is
determined by the ratio of the signal source resistance
IN
R
and the diode impedance.
O