The BA3662CP-V5 is low-saturation regulator. The output voltage can be arbitrarily configured using the external resistance.
This IC has a built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits and a
thermal shutdown circuit that protects the IC from thermal damage due to overloading.
●Features
1) Output Current: 300mA
2) High Output Voltage Precision : ±2%
3) Low saturation with PNP output
4) Built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits
5) Built-in thermal shutdown circuit for protecting the IC from thermal damage due to overloading
6) Built-in over- voltage protection circuit that prevents the destruction of the IC due to power supply surges
7) TO220CP-V5 packaging
●Applications
Audiovisual equipments, FPDs, televisions, personal computers or any other consumer device
●Absolute Maximum Ratings (Ta=25℃)
Parameter Symbol Ratings Unit
1
Supply Voltage
Output Control Voltage V
※
Vcc -0.3~+35.0 V
-0.3~+Vcc V
CTL
2
Power Dissipation
※
Pd 2000 mW
Operating Temperature Range Topr -40~+125 ℃
Storage Temperature Range Tstg -55~+150 ℃
Maximum Junction
Temperature
Peak Supply Voltage
※ 1 Not to exceed Pd.
※ 2 TO220CP-V5:Derating in done at 16mW/℃ for operating above Ta≧25℃.(without heat sink)
※ 3 Applied voltage : 200msec or less (tr≥1msec)
NOTE : This product is not designed for protection against radioactive rays.
Please connect resistors R1 and R2 (which determines the output voltage) as shown in Fig.14.
Please be aware that the offset due to the current that flows from the C terminal becomes large when resistors with large
values are used. The use of resistors with R1=2kΩ to 15kΩ is recommended.
(1)When using a maximum heat sick : θjc=6.25(℃/W)
(2)When using an IC alone : θja=62.5(℃/W )
10
Power Diss ipation Pd
5
(2) 2.0
0
0255075100125150
Ambient Temperature Ta(℃)
Fig.15
When using at temperatures over Ta=25℃, please refer to the heat reducing characteristics shown in Fig.15.
The IC characteristics are closely related to the temperature at which the IC is used, so it is necessary to operate the IC
at temperatures less than the maximum junction temperature Tjmax.
Fig.15 shows the acceptable loss and heat reducing characteristics of the TO220CP-V5 package. Even when the ambient
temperature Ta is a normal temperature (25℃), the chip (junction) temperature Tj may be quite high so please operate the IC
at temperatures less than the acceptable loss Pd.
The calculation method for power consumption Pc(W) is as follows.
Pc=(Vcc-Vo)×Io+Vcc×Ib
Acceptable loss Pd≧Pc
Solving this for load current Io in order to operate within the acceptable loss,
Io≦
Pd-Vcc×Ib
Vcc-Vo
Vcc:
Vo:
Io:
Ib:
Ishort:
Input voltage
Output voltage
Load current
Circuit current
Short current
(Please refer to Figs.8 for Ib.)
It is then possible to find the maximum load current Io
Max with respect to the applied voltage Vcc at the time of thermal
design.
Calculation Example)
When Ta=85℃,Vcc=10V,Vo=5V
Io≦
Io≦192mA (Ib:8mA)
1.04-10×Ib
5
With the IC alone :θja=62.5℃/W → -16mW/℃
℃=2.0W → 85℃=1.04W
25
Please refer to the above information and keep thermal designs within the scope of acceptable loss for all operating
temperature ranges. The power consumption Pc of the IC when there is a short circuit (short between Vo and GND) is :
Pc=Vcc×(Ib+Ishort) (Please refer to Fig.4 for Ishort.)
1. Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may
result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode)
when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device, consider
adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC.
2. Electrical characteristics described in these specifications may vary, depending on temperature, supply voltage, external
circuits and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics.
3. GND potential
The potential of the GND pin must be the minimum potential in the system in all operating conditions. Ensure that no pins
are at a voltage below the GND at any time, regardless of transient characteristics.
4. Ground wiring pattern
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused
by large currents. Also ensure that the GND traces of external components do not cause variations on GND voltage. The
power supply and ground lines must be as short and thick as possible to reduce line impedance.
5. Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply or GND pins (caused by poor
soldering or foreign objects) may result in damage to the IC.
6. Operation in strong electromagnetic fields
Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in applications
where strong electromagnetic fields may be present.
7. Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to
stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be
turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
8. Thermal consideration
Use a thermal design that allows for a sufficient margin in light of the Pd in actual operating conditions.
Consider Pc that does not exceed Pd in actual operating conditions. (Pd≧Pc)
Tjmax : Maximum junction temperature=150[℃], Ta : Peripheral temperature[℃] , θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W],
Pc : Power dissipation [W], Vcc : Input Voltage,
Vo : Output Voltage, Io : Load, Ib : Bias Current
Package Power dissipation : Pd (W)=(Tjmax-Ta) /θja
Power dissipation : Pc (W)=(Vcc-Vo)×Io+Vcc×Ib
9. Vcc pin
Insert a capacitor(capacitor≧0.33µF~) bet
application. Be sure to allow a sufficient margin for input voltage levels.
ween the Vcc and GND pins. The appropriate capacitance value varies by
10. Vo Terminal
Please attach an anti-oscillation capacitor between Vo and GND. The capacitance of the capacitor may significantly
change due to factors such as temperature changes, which may cause oscillations. Please use a tantalum capacitor or
aluminum electrolytic capacitor with favorable characteristics and small external series resistance (ESR) even at low
temperatures. The output oscillates regardless of whether the ESR is large or small. Please use the IC within the stable
operating region while referring to the ESR characteristics reference data shown in Fig.16. In cases where there are
sudden load fluctuations, the large capacitor is recommended. Below figure, it is ESR-to-Io stability Area characteristics,
measured by 22µF-ceramic-capacitor and resistor connected in series.
This characteristic is not equal value perfectly to 22µF-aluminum electrolytic capacitor in order to measurement method.
Note, however, that the stable range suggested in the figure depends on the IC and the resistance load involved, and can
vary with the board’s wiring impedance, input impedance, and/or load impedance. Therefore, be certain to ascertain the
final status of these items for actual use.
Keep capacitor capacitance within a range of 22µF~1000µF. It is also recommended that a 0.33µF bypass capacitor be
connected as close to the input pin-GND as location possible. However, in situations such as rapid fluctuation of the input
voltage or the load, please check the operation in real application to determine proper capacitance.
Vcc=10V Vo=5V
Ta =2 5 ℃
R1=2kΩ~15kΩ
Cin=0.33µF Cout=22µF
100
10
(Ω)
1
Cout_ESR
0.1
0
Fig.16 Cout_ESR vs Io (reference data)
Unstable operating region
Stable operating region
Unstable operating region
Io[mA]
Cout(22µF)
(0.001Ω~)
Vcc
10V
200 100
300
Cin
(0.33µF)
Vcc
CTL
VCTL
(5V)
GND
※Operation Note 10 Measurement circuit
Vo
ADJ
ESR
R2
R1
(2k~15kΩ)
Io (ROUT)
11. Over current protection circuit (OCP)
The IC incorporates an integrated over-current protection circuit that operates in accordance with the rated output capacity.
This circuit serves to protect the IC from damage when the load becomes shorted. It is also designed to limit output current
(without latching) in the event of a large and instantaneous current flow from a large capacitor or other component. These
protection circuits are effective in preventing damage due to sudden and unexpected accidents. However, the IC should
not be used in applications characterized by the continuous or transitive operation of the protection circuits.
12. Thermal shutdown circuit (TSD)
The IC incorporates a built-in thermal shutdown circuit, which is designed to turn the IC off completely in the event of
thermal overload. It is not designed to protect the IC from damage or guarantee its operation. ICs should not be used after
this function has activated, or in applications where the operation of this circuit is assumed.
13. Applications or inspection processes where the potential of the Vcc pin or other pins may be reversed from their normal
state may cause damage to the IC's internal circuitry or elements. Use an output pin capacitance of 1000µF or lower in
case Vcc is shorted with the GND pin while the external capacitor is charged. Insert a diode in series with Vcc to prevent
reverse current flow, or insert bypass diodes between Vcc and each pin.
14. Positive voltage surges on VCC pin
A power zener diode should be inserted between VCC and GND for protection against voltage surges of more than 50V on
the VCC pin.
Vcc
GND
15. Negative voltage surges on VCC pin
A schottky barrier diode should be inserted between VCC and GND for protection against voltages lower than GND on the
VCC pin.
Vcc
GND
16. Output protection diode
Loads with large inductance components may cause reverse current flow during startup or shutdown. In such cases, a
protection diode should be inserted on the output to protect the IC.
17. Regarding input pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes
and/or transistors. For example (refer to the figure below):
○When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
○When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
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Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
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Notice
The Products specied in this document are intended to be used with general-use electronic
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