The BA3258HFP, BA33D15HFP, BA33D18HFP are fixed 2-output low-saturation regulators with a voltage accuracy at both
outputs of 2%. These series incorporate both overcurrent protection and thermal shutdown (TSD) circuits in order to
prevent damage due to output short-circuiting and overloading, respectively.
●Features
1) Output voltage accuracy: 2%.
2) Output current capacity: 1A (BA3258HFP), 0.5A (BA33D□□ Series)
3) A ceramic capacitor can be used to prevent output oscillation (BA3258HFP).
4) High Ripple Rejection (BA33D□□ Series)
5) Built-in thermal shutdown circuit
6) Built-in overcurrent protection circuit
●Applications
FPDs, TVs, PCs, DSPs in DVDs and CDs
●Product Lineup
Part Number
BA3258HFP 3.3 V 1.5 V 1 A 1 A HRP5
BA33D15HFP 3.3 V 1.5 V 0.5 A 0.5 A HRP5
BA33D18HFP 3.3 V 1.8 V 0.5 A 0.5 A HRP5
●Absolute Maximum Ratings
BA3258HFP BA33D□□ Series
Parameter
Output voltage
Vo1
SymbolRatings Unit
Output voltage
Vo2
Current capability
Io1
Parameter
Current capability
Io2
Symbol Ratings Unit
No.11026EBT01
Package
Applied voltage VCC 15*1 V Applied voltage VCC 18*1 V
Power dissipation Pd 2300*2 mWPower dissipation Pd 2300*2 mW
Operating
temperature range
Ambient storage
temperature
Maximum junction
temperature
*1 Must not exceed Pd
*2. Derated at 18.4 mW/℃ at Ta>25℃ when mounted on a glass epoxy board (70 mm 70 mm 1.6 mm)
●Thermal Design
If the IC is used under excessive power dissipation conditions, the chip temperature will rise, which will have an adverse
effect on the electrical characteristics of the IC, such as a reduction in current capability. Furthermore, if the temperature
exceeds T
, element deterioration or damage may occur. Implement proper thermal designs to ensure that the power
jmax
dissipation is within the permissible range in order to prevent instantaneous IC damage resulting from heat and maintain the
reliability of the IC for long-term operation. Refer to the power derating characteristics curves in Fig. 29.
・Power Consumption (Pc) Calculation Method
・Power consumption of 3.3V power transistor:
Pc1 = (Vcc − 3.3) Io1
・Power consumption of Vo2 power transistor:
Pc2 = (Vcc − Vo2) Io2
・Power consumption due to circuit current:
Pc3 = Vcc Icc
Vcc
P
I
Controlle
Icc
GND
Vcc
Power T
Power Tr
3.3 V output
Vo1
Vcc
Vo2
*Vcc: Applied voltage
Io1: Load current on Vo1 side
O1
I
Io2: Load current on Vo2 side
Icc: Circuit current
* The Icc (circuit current) varies with the load.
I
O2
1.5 V output o
1.8 V output
(See reference data in Figs. 2, 3, 14, and 15.)
→Pc = Pc1 + Pc2 + Pc3
Refer to the above and implement proper thermal designs so that the IC will not be used under excessive power dissipation
conditions under the entire operating temperature range.
・Calculation example (BA33D15HFP)
Example: Vcc = 5V, Io1 = 200mA, and Io2 = 100mA
・Power consumption of 3.3V power transistor: Pc1 = (Vcc − 3.3) Io1 = (5 − 3.3) 0.2 = 0.34W
・Power consumption of 1.5V power transistor: Pc2 = (Vcc − 1.5) Io2 = (5 − 1.5) 0.2 = 0.35W
・Power consumption due to circuit current: Pc3 = Vcc Icc = 5 0.0085 = 0.0425 (W) (See Figs. 14 and 15)
Implement proper thermal designs taking into consideration the dissipation at full power consumption
(i.e., Pc1 + Pc2 + Pc3 = 0.34 + 0.35 + 0.0425 = 0.7325W).
●Explanation of External Components
○BA3258HFP
1) Pin 1 (Vcc pin)
Connecting a ceramic capacitor with a capacitance of approximately 3.3F between Vcc and GND as close to the pins
as possible is recommended.
2) Pins 4 and 5 (Vo pins)
Insert a capacitor between the Vo and GND pins in order to prevent output oscillation. The capacitor may oscillate if
the capacitance changes as a result of temperature fluctuations. Therefore, it is recommended that a ceramic
capacitor with a temperature coefficient of X5R or above and a maximum capacitance change (resulting from
temperature fluctuations) of 10% be used. The capacitance should be between 1F and 1,000µF. (Refer to Fig. 30)
○BA33D□□Series
1) Pin 1 (Vcc pin)
Insert a 1F capacitor between Vcc and GND. The capacitance will vary depending on the application. Check the
capacitance with the application set and implement designing with a sufficient margin.
Pins 4 and 5 (Vo pins)
2)
Insert a capacitor between the Vo and GND pins in order to prevent oscillation. The capacitance may vary greatly with
temperature changes, thus making it impossible to completely prevent oscillation. Therefore, use a tantalum aluminum
electrolytic capacitor with a low ESR (Equivalent Serial Resistance). The output will oscillate if the ESR is too high or too
low, so refer to the ESR characteristcs in Fig. 31 and operate the IC within the stable operating region. If there is a
sudden load change, use a capacitor with higher capacitance. A capacitance between 10F and 1,000F is
recommended.
200400600800 10000
Unstable region
不安定領域
Stable region
安定領域
Io [mA]
10.0
5.0
4.0
2.0
]
1.0
Ω
0.5
0.2
ESR [
0.15
0.1
0.05
Unstable region
不安定領域
Stable region
安定領域
Unstable region
不安定領域
0.02
0.01
200 400 600800 10000
Io [mA]
10
9
(3) 7.3 W
8
7
(2) 5.5 W
6
5
4
(1) 2.3 W
3
2
1
0
PO W ER D I SSI PAT ION :Pd [W]
0
AMBIENT TEMPERATURE:Ta [℃]
Board size: 70 mm 70 1.6 mm (with a thermal via incorpo rated by the board)
1) Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break
down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated
values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
2) GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
3) Thermal Design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
5) Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
6) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting or storing the IC.
7) Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode
or transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
8) Ground Wiring Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring pattern of any external components, either.
9) Thermal Shutdown Circuit (TSD)
This IC incorporates a built-in thermal shutdown circuit for protection against thermal destruction. Should the junction
temperature (Tj) reach the thermal shutdown ON temperature threshold, the TSD will be activated, turning off all output
power elements. The circuit will automatically reset once the chip's temperature Tj drops below the threshold temperature.
Operation of the thermal shutdown circuit presumes that the IC's absolute maximum ratings have been exceeded.
Application designs should never make use of the thermal shutdown circuit.
10) Overcurrent protection circuit
An overcurrent protection circuit is incorporated in order to prevention destruction due to short-time overload currents. Continued
use of the protection circuits should be avoided. Please note that the current increases negatively impact the temperature.
11) Damage to the internal circuit or element may occur when the polarity of the Vcc pin is opposite to that of the other pins in
applications. (I.e. Vcc is shorted with the GND pin while an external capacitor is charged.) Use a maximum capacitance of
1000 mF for the output pins. Inserting a diode to prevent back-current flow in series with Vcc or bypass diodes between
Vcc and each pin is recommended.
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