5.2.1AC & DC Input Levels for CK........................................................................................ 63
5.2.2Input Slew Rate for CK..................................................................................................65
5.2.3Differential Cross Point Voltage for CK......................................................................... 67
5.2.4AC Input Levels for DQS...............................................................................................68
5.2.5AC Differential Cross Point Voltage for DQS.................................................................70
5.2.6Input Slew Rate for DQS...............................................................................................72
5.2.7Differential AC Output Levels for DQS..........................................................................73
5.2.8Differential Output Slew Rate for DQS..........................................................................75
Contents
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Contents
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1R&S ScopeSuite Overview
R&S ScopeSuite Overview
The R&S ScopeSuite software is used with R&S RTP oscilloscopes. It can be installed
on a test computer or directly on the oscilloscope. For system requirements, refer to
the Release Notes.
The R&S ScopeSuite main panel has several areas:
●
"Settings": connection settings to oscilloscope and other instruments also default
report settings
●
"Compliance Tests": selection of the compliance test
●
"Demo": accesses demo test cases that can be used for trying out the software
without having a connection to an oscilloscope
●
"Help": opens the help file, containing information about the R&S ScopeSuite configuration
●
"About": gives information about the R&SScopeSuite software
●
"Tile View": allows a personalization of the compliance test selection
You can configure which tests are visible in the compliance test section and which
are hidden, so that only the ones you use are displayed.
► To hide a test from the "Compliance Tests" view, do one of the following:
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R&S ScopeSuite Overview
a) Right-click on the compliance test you want to hide.
The icon of the test changes, see Figure 1-1. Now with a left click you can hide
the test.
Figure 1-1: Unpin icon
b) Click on "Title View" to show a list of the available test cases. By clicking a test
case in the show list, you can pin/unpin it from the main panel.
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2Preparing the Measurements
2.1Test Equipment
Preparing the Measurements
Installing Software and License
For DDR4 compliance tests, the following test equipment is needed:
●
R&S RTP with 4 channels and minimum 8 GHz bandwidth
●
R&S RTP-K93 DDR4 compliance test option (required option, installed on the
R&S RTP)
●
4 modular probes, R&S ZM90 with 9 GHz bandwidth. See also Chapter 2.1.1,
"Soldering Guide for Modular Probes", on page 9.
●
4 modular probe tips R&S RT-ZMA10
●
The free-of-charge R&S ScopeSuite software, which can be installed on a computer or directly on the R&S RTP.
2.1.1Soldering Guide for Modular Probes
All single-ended signals such as ADD, CMD, DQ, DM, CS, CKE should be soldered so
that the signal is connected to the + part on the probe tip. The ground of the signal
should be connected to the - part on the same probe tip.
All differential signals such as CK, DQS should be soldered differentially:
●
The + signal is connected to the + part on the probe tip.
●
The - signal is connected to the - part on the same probe tip.
●
The ground of the signal is connected to the ground of the same probe tip.
2.2Installing Software and License
The preparation steps are performed only once for each computer and instrument that
are used for testing.
Uninstall older versions of the R&S ScopeSuite
If an older version of the R&S ScopeSuite is installed, make sure to uninstall the old
version before you install the new one. You can find the version number of the current
installation in "Help" menu > "About". To uninstall the R&S ScopeSuite, use the Windows " Control Panel" > "Programs".
For best operation results, we recommend that the installed firmware versions of the
R&S ScopeSuite and the oscilloscope are the same.
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Preparing the Measurements
Setting Up the Network
To install the R&S ScopeSuite
1. Download the latest R&S ScopeSuite software from the "Software" section on the
Rohde & Schwarz R&S RTP website:
For system requirements, refer to the Release Notes.
To install the license key on the R&S RTP
► When you got the license key of the compliance test option, enable it on the oscil-
loscope using [Setup] > "SW Options".
For a detailed description, refer to the R&S RTP user manual, chapter "Installing
Options", or to the online help on the instrument.
2.3Setting Up the Network
If the R&S ScopeSuite software runs on a test computer, the computer and the testing
oscilloscope require a LAN connection.
There are two ways of connection:
●
LAN (local area network): It is recommended that you connect to a LAN with DHCP
server. This server uses the Dynamic Host Configuration Protocol (DHCP) to
assign all address information automatically.
If no DHCP server is available, or if the Tabor WX2182B or WX2182C is used for
automatic testing, assign fixed IP addresses to all devices.
●
Direct connection of the instruments and the computer or connection to a switch
using LAN cables: Assign fixed IP addresses to the computer and the instruments
and reboot all devices.
To set up and test the LAN connection
1. Connect the computer and the instruments to the same LAN.
2. Start all devices.
3. If no DHCP server is available, assign fixed IP addresses to all devices.
4. Ping the instruments to make sure that the connection is established.
5. If VISA is installed, check if VISA can access the instruments.
a) Start VISA on the test computer.
b) Validate the VISA address string of each device.
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2.4Starting the R&S ScopeSuite
2.5Connecting the R&S RTP
Preparing the Measurements
Connecting the R&S RTP
See also:
●
Chapter 2.5, "Connecting the R&S RTP", on page 11
To start the R&S ScopeSuite on the test computer or on the oscilloscope:
► Double-click the R&S ScopeSuite program icon.
To start the R&S ScopeSuite on the instrument, in the R&S RTP firmware:
► In the "Apps" dialog, open the "Compliance" tab.
If the R&S ScopeSuite is installed directly on the instrument, the software detects the
R&S RTP firmware automatically, and the "Oscilloscope" button is not available in the
R&S ScopeSuite.
If the R&S ScopeSuite software runs on a test computer, the computer and the testing
oscilloscope require a LAN connection, see Chapter 2.3, "Setting Up the Network",
on page 10. The R&S ScopeSuite software needs the IP address of the oscilloscope to
establish connection.
1. Start the R&S RTP.
2. Start the R&S ScopeSuite software.
3. Click "Settings" > "Oscilloscope".
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Preparing the Measurements
Connecting the R&S RTP
4. Enter the IP address of the oscilloscope.
To obtain the IP address: press the Rohde & Schwarz logo at the top-right corner
of the oscilloscope's display.
5. Click "Get Instrument Information".
The computer connects with the instrument and gets the instrument data.
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2.6Report Configuration
Preparing the Measurements
Report Configuration
If the connection fails, an error message is shown.
In the "Report Configuration" menu, you can select the format of the report and the
details to be included in the report. You can also select an icon that is displayed in the
upper left corner of the report.
Also, you can enter common information on the test that is written in the "General Information" section of the test report.
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3Performing Tests
3.1Starting a Test Session
Performing Tests
Starting a Test Session
After you open a compliance test, the "Session Selection" dialog appears. In this dialog, you can create new sessions, open or view existing report.
The following functions are available for handling test sessions:
FunctionDescription
"Add"Adds a new session
"Open"Opens the selected session
"Remove"Removes the selected session
"Rename"Changes the "Session Name"
"Comment"Adds a comment
"Show report"Generates a report for the selected session
To add a test session
1. In the R&S ScopeSuite window, select the compliance test.
2. In the "Session Selection" dialog press "Add".
3. If necessary change the "Session Name"
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3.2Configuring the Test
Performing Tests
Configuring the Test
To open a test session
1. In the R&S ScopeSuite window, select the compliance test.
2. In the "Session Selection" dialog, select the session you want to open and double
click on it.
Alternatively, select the session and press "Open".
To show a report for a test session
1. In the R&S ScopeSuite window, select the compliance test.
2. In the "Session Selection" dialog, select the session you want the report for and
press "Show report".
1. In the R&S ScopeSuite window, select the compliance test to be performed:
●"DDR4"
2. Select the DDR4 type and the speed.
3. Open a test session, see Chapter 3.1, "Starting a Test Session", on page 14.
4. Adjust the "Properties" settings for the test cases you want to perform.
5. Click "Limit Manager" and edit the limit criteria, see Chapter 3.2.1.1, "Limit Man-
ager", on page 17.
6. If you want to use special report settings the "Report Config" tab to define the format and contents of the report. Otherwise the settings defined in "RSScopeSuite" >
"Settings" > "Report" are used. See Chapter 2.6, "Report Configuration",
on page 13.
7. Click "Test Checked"/"Test Single" and proceed as described in the relevant test
case chapter.
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3.2.1General Test Settings
Performing Tests
Configuring the Test
Each session dialog is divided into several sections:
●
"Properties": shows the settings that can be made for the test case selected on the
left side of the dialog. You can differentiate between the "All" and the sub test properties
In the "All" > "Properties" tab you can configure the settings for all test cases in the
current session. Once you change and save a setting in this tab, the changes will
be done for all test in the sessions. At the same time, there will be a special marking for the functions that have different settings for different sub tests.
●
"Limit Manager": sets the measurement limits that are used for compliance testing,
see Chapter 3.2.1.1, "Limit Manager", on page 17.
●
"Results": shows an overview of the available test results for this session.
●
"Instruments": defines instruments settings for connecting to external devices, that
are specific for this test session.
When a session is first created the global settings ("RSScopeSuite" > "Settings" >
"Instruments") are copied to the session. This "Instruments" tab can be used to
change those copied defaults.
●
"Report Config": defines the format and contents of the report for this session.
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3.2.1.1Limit Manager
Performing Tests
Configuring the Test
When a session is first created the global settings ("RSScopeSuite" > "Settings" >
"Report") are copied to the session. This "Report Config" tab can be used to
change those copied defaults.
●
"Test Checked"/ "Test Single": starts the selected test group.
The "Limit Manager" shows the measurement limits that are used for compliance testing.
Each limit comprises the comparison criterion, the unit, the limit value A, and a second
limit value B if the criterion requires two limits.
You can set the values to defaults, change the values in the table, export the table in
xml format, or import xml files with limit settings.
► Check and adjust the measurement limits.
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3.2.2Test Configuration for DDR4
Performing Tests
Configuring the Test
The test configuration consists of some test-specific configuration settings. The values
for the settings in this tab depend on the selected "Speed" and "Type" of standard.
Figure 3-1: Configuration for DDR4 compliance tests
Signals
Selects the channel for the specified signal.
For electrical tests consider also how many test signals are enabled. For example, if
only the ADD/CMD signal is selected, only ADD/CMD signal is used to run the test. If
both the ADD and the CMD signals are selected, test is run using ADD signal first, followed by the CMD signal.
The following signals are available according to the selected test case:
"ADD"
"CMD"
"CK"
"DQS"
"DQ"
"DM"
Address signal.
Command signal.
Differential clock input signal.
Data strobe signal.
Data input/output signal.
Data mask signal.
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Performing Tests
Configuring the Test
"CS"
"CKE"
Chip select signal.
Clock enable signal.
Threshold Settings
The following threshold settings are defined:
"VDD"
"V
"
REF
"V
REFDQ
"
"VSS"
"V
"
DDQ
"VTT"
"V
"
SSQ
"AC Level for
Power Supply
Reference voltage
DQ reference voltage
Ground
DQ Power Supply
VTT = V
DDQ
/2
DQ Ground
AC level for the command address.
CA"
"DC Level for
DC level for the command address.
CA"
Triggering Method
Selects the triggering method.
"Phase"
Checks the phase difference between DQ and DQS to differentiate
the type (read or write) of burst.
"Amplitude"
Checks the peak-peak amplitude difference between read and write
signals on DQS to differentiate the type (read or write) of burst.
"Advanced"
Enables the definition of more detailed trigger conditions:
●
"Min Phase for Read"/"Max Phase for Read": sets the minimum/
maximum phase for the read burst.
●
"Min Phase for Write"/"Max Phase for Write": sets the minimum/
maximum phase for the write burst.
●
"Amplitude Relationship": sets the amplitude relationship between
the read and write burst.
●
"P-P Amplitude Threshold": sets the peak-peak amplitude threshold.
Threshold Mode
Selects between the absolute and relative threshold mode.
Upper/Middle/Lower Threshold ← Threshold Mode
Sets the upper/middle/lower for the absolute threshold mode.
Top/Middle/Base Ratio ← Threshold Mode
Set the top/middle/base ratio for the relative threshold mode.
Average Window
Sets the average window in periods.
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Performing Tests
Configuring the Test
Record Length
Sets the number of waveform samples in one waveform record.
Burst Count
Sets the burst count.
Speed Bin (CL-nRCD-nRP)
Selects which speed bin is used for the tests.
CAS Latency (CL)
Selects the value for the CAS latency. It is the delay, measured in clock cycles,
between the internal read command and the availability of the first bit of output data.
CAS Write Latency (CWL)
Selects the value for the CAS write latency. It is the delay, measured in clock cycles,
between the internal write command and the availability of the first bit input data.
Data Bus Inversion
Enables data bit inversion. It helps to improve the signal integrity and reduce the power
consumption.
Export Waveforms
Enables you to export a waveform. You can later load the waveforms to run the tests in
the offline mode, see Offline Execution.
You can define an export directory, or use the default one:
If enabled, allows you to use exported waveforms as a source for the execution of the
compliance test.
You can select one waveform for each needed signal.
3.3Initiating the Test
To perform compliance tests, the device under test is connected to the test board in a
test-specific way. Using a probe, the test board is connected with the R&S RTP. The
probe connections are test-specific. The R&S ScopeSuite guides you step-by-step
through the connection setup and the test sequence.
1. Set the test setup on a nonconductive, static-approved work surface.
2. In the R&S ScopeSuite window, select the compliance test.
3. Open a test session, see Chapter 3.1, "Starting a Test Session", on page 14.
4. Check the test configuration settings and adjust, if necessary. See: Chapter 3.2,
"Configuring the Test", on page 15.
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3.4Getting Test Results
Performing Tests
Starting DDR4 Tests
5. Click "Test Checked" for starting all checked test cases or "Test Single" for starting
only the selected test case.
The R&S ScopeSuite test wizard explains the following individual setup steps. A
detailed test description can be found in the following chapters:
●Chapter 3.5, "Starting DDR4 Tests", on page 22
If you resume an existing session, new measurements are appended to the report,
new diagrams and waveform files are added to the session folder. Existing files are not
deleted or replaced. Sessions data remain until you delete them in the "Results" tab of
the session.
The report format can be defined in "RSScopeSuite" > "Settings" > "Report" for all
compliance tests (see also Chapter 2.6, "Report Configuration", on page 13). If you
want to use special report settings for a session, you can define the format and contents of the report in the "Report Config" tab of the session.
All test results are listed in the "Results" tab. Reports can be provided in PDF,
MSWord, or HTML format. To view and print PDF reports, you need a PDF viewer, for
example, the Acrobat Reader.
The test report file can be created at the end of the test, or later in the "Session Selection" dialog.
To show a test report
1. In the R&S ScopeSuite window, select the compliance test to be performed.
2. Select the session name in the "Session Selection" dialog and click "Show report".
The report opens in a separate application window, depending on the file format.
You can check the test results and print the report.
To delete the results, diagrams and waveform files of a session
1. In the "Session Selection" dialog select the session and open it.
2. In the "Results" tab, select the result to be deleted.
3. Click "Remove".
3.5Starting DDR4 Tests
Before you run the test, complete the following actions:
●
LAN connection of the oscilloscope and the computer running the R&S ScopeSuite, see Chapter 2.5, "Connecting the R&S RTP", on page 11
1. Select "DDR4" in the R&S ScopeSuite start window.
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Performing Tests
Starting DDR4 Tests
2. In the "Session Selection" dialog, set the "Select Type" standard. The following
"Types" are available:
●"DDR4": Double data rate type three. Used for desktops and servers.
●"LPDDR4": low power DDR4. Consumes very low power and is used for mobile
phones.
●"LPDDR4X": low power DDR4 extended. Consumes very low power and is
used for mobile phones. Its headlined lower I/O voltage to save system power.
3. Set the "Select Speed". There are preset speeds you can select from:
"1600"/"1866"/"2133"/"2400"/"2666"/"2933"/"3200"/"4266"
4. Add a new test session.
5. Open the session. For details, see Chapter 3.1, "Starting a Test Session",
on page 14.
6. Check the test configuration settings. Adjust, if necessary. See:
●Chapter 3.2.2, "Test Configuration for DDR4", on page 18
●Chapter 3.2.1.1, "Limit Manager", on page 17
7. Select/check the test cases you want to run and click "Test Single"/"Test checked".
8. A step-by step guide explains the following individual setup steps. When you have
finished all steps of the step-by-step guide, the compliance test runs automatically.
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4Timing Tests
4.1Clock Timing
4.1.1Test Equipment
Timing Tests
Clock Timing
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeprobe with minimum 9 GHz bandwidth1
Probe tipR&S RT-ZMA101
DUTDDR4 device that supports the selected type1
4.1.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Timing Tests" > "Clock Timing".
1
width
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Timing Tests
Clock Timing
3. Enable the tests that you want to run.
4. Click "Test Single".
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
4.1.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
4.1.4Measurements
The clock timing measurements consist of up to eight measurements. They test the
limits as defined in the JESD79-4B(DDR4)/ JESD209-4B(LPDDR4) specifications.
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Timing Tests
Clock Timing
4.1.4.1Average Clock Period - t
CK(avg)
This test aims to verify that the average clock period tCK(avg) is within the limits
defined in section 13.3.2 (DDR4)/ 10.1.1 (LPDDR4/LPDDR4X) of the specification.
tCK(avg) is the average clock period calculated across any consecutive 200 cycle window. The clock period is defined from rising edge to rising edge.
4.1.4.2Absolute Clock Period - t
CK(abs)
This test aims to verify that the average absolute clock period tCK(abs) is within the
limits defined in section 13.3.1 (DDR4)/ 10.1.2 (LPDDR4/LPDDR4X) of the specification. tCK(abs) is the absolute clock period from one rising edge to the next rising edge.
4.1.4.3Average Low Pulse Width - t
This test aims to verify that the average low pulse width tCL(avg) is within the limits
defined in section 13.3.3 (DDR4)/ 10.1.3 (LPDDR4/LPDDR4X) of the specification.
tCL(avg) is the average low pulse width, as calculated across any consecutive 200 low
pulses.
4.1.4.4Average High Pulse Width - t
CL(avg)
CH(avg)
This test aims to verify that the average high pulse width tCH(avg) is within the limits
defined in section 13.3.3 (DDR4)/ 10.1.3 (LPDDR4/LPDDR4X) of the specification.
tCH(avg) is the average low pulse width, as calculated across any consecutive 200 low
pulses.
4.1.4.5Clock Period Jitter - t
JIT(per)
This test aims to verify that the clock period jitter tJIT(per) is within the limits defined in
section 13.3.4 (DDR4)/ 10.1.5 (LPDDR4/LPDDR4X) of the specification. It is the largest deviation of any signal tCK from t
DLL is already locked.
4.1.4.6Half Period Jitter - t
JIT(duty)
This test aims to verify that the half period jitter tJIT(duty) is within the limits defined in
section 13.3.4 (DDR4)/ 10.1.6 (LPDDR4/LPDDR4X) of the specification. tJIT(duty) is
the largest deviation of any signal tCK from t
4.1.4.7Cycle to Cycle Period Jitter - t
This test aims to verify that the cycle to cycle period jitter tJIT(cc) is within the limits
defined in section 13.3.4 (DDR4)/ 10.1.6 (LPDDR4/LPDDR4X) of the specification.
JIT(cc)
. It defines the single period jitter when the
CK(avg)
.
CK(avg)
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Timing Tests
Data Timing
tJIT(cc) is the absolute difference in clock period between two consecutive clock
cycles. It defines the cycle to cycle jitter when the DLL is already locked.
4.1.4.8Cumulative Error - t
This test aims to verify that the cumulative error tERR(nper) is within the limits defined
in section 13.3.4 (DDR4)/ 10.1 (LPDDR4/LPDDR4X) of the specification. tERR(nper) is
the cumulative error across n multiple consecutive cycles from tCK(avg).
4.2Data Timing
4.2.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeprobe with minimum 9 GHz bandwidth3
Probe tipR&S RT-ZMA103
DUTDDR4 device that supports the selected type1
ERR(nper)
1
width
4.2.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Timing Tests" > "Data Timing".
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Timing Tests
Data Timing
3. Enable the tests that you want to run.
4. Click "Test Single".
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
4.2.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
4.2.4Measurements
The data timing measurements consist of up to 10 measurements. They test the limits
as defined in the JESD79-4B(DDR4)/ JESD209-4B(LPDDR4) specifications.
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Timing Tests
Strobe Timing
4.2.4.1DQS-DQ Skew for DQS and Associated DQ Signals - t
This test aims to verify that the strobe to data skew, per group, per access is within the
limits defined in section 4.24.1.2 (DDR4)/ 10.5 (LPDDR4/LPDDR4X) of the specification.
4.2.4.2DQ/DQS Output Hold Time from DQS - t
QH
This test aims to verify that the data output hold time from strobe is within the limits
defined in section 4.24.1.2 (DDR4)/ 10.5 (LPDDR4/LPDDR4X) of the specification.
4.2.4.3DQ Out High Impedance Time from CK_t/CK_c - t
HZ(DQ)
This test aims to verify that the data high impedance time from CK_t/CK_c is within the
limits defined in section 4.24.1.3 (DDR4) of the specification.
4.2.4.4DQ Low-Impedance Time from CK_t/CK_c - t
LZ(DQ)
This test aims to verify that the data low impedance time from CK_t/CK_c is within the
limits defined in section 4.24.1.3 (DDR4 ) of the specification.
DQSQ
4.3Strobe Timing
4.3.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeprobe with minimum 9 GHz bandwidth3
Probe tipR&S RT-ZMA103
DUTDDR4 device that supports the selected type1
4.3.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Timing Tests" > "Strobe Timing".
1
width
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Timing Tests
Strobe Timing
3. Enable the tests that you want to run.
4. Click "Test Single".
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
4.3.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
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4.3.4Measurements
Timing Tests
Strobe Timing
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
The strobe measurements consist of up to 10 measurements. They test the limits as
defined in the JESD79-4B(DDR4)/ JESD209-4B(LPDDR4) specifications.
4.3.4.1Time before Ringback - t
DVAC(Strobe)
This test aims to verify that the time before ringback for strobe is within the limits
defined in section 8.3.1 of the DDR4 specification. tDVAC(Strobe) is the "time above
AC-level" during a differential AC-swing.
4.3.4.2Time before Ringback - t
DVAC(Clock)
This test aims to verify that the time before ringback for CK /CK# is within the limits
defined insection 8.3.1 of the DDR4 specification. tDVAC(Clock) is the "time above AClevel" during a differential AC-swing.
4.3.4.3Low-Impedance Time from CK/CK# - tLZ(DQS)
This test aims to verify that the strobe low-impedance time is within the limits defined in
section 4.24.1 (DDR4) of the specification.
4.3.4.4High-Impedance Time from CK/CK# - tHZ(DQS)
This test aims to verify that the strobe high-impedance time is within the limits defined
in section 4.24.1 (DDR4) of the specification.
4.3.4.5DQS Output Access Time from CK/CK # - t
This test aims to verify that the strobe rising edge output access time from rising
CK/CK# is within the limits defined in section 4.24.1 (DDR4) of the specification.
4.3.4.6Differential Read Preamble - t
RPRE
This test aims to verify that the strobe differential READ preamble is within the limits
defined in section 4.24.1 (DDR4) of the specification.
4.3.4.7Read Postamble - t
RPST
This test aims to verify that the strobe differential READ postamble is within the limits
defined in section 4.24.1 (DDR4) of the specification.
DQSCK
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Timing Tests
Strobe Timing
4.3.4.8Differential Output High Time - t
QSH
This test aims to verify that the strobe differential output high time is within the limits
defined in section 4.24.1 (DDR4)/ 10.5 (LPDDR4/LPDDR4X) of the specification.
4.3.4.9Differential Output Low Time - t
QSL
This test aims to verify that the strobe differential output low time is within the limits
defined in section 4.24.1(DDR4)/ 10.5 (LPDDR4/LPDDR4X) of the specification.
4.3.4.10DQS Latching Transition to Associated Clock Edge - t
This test aims to verify that the time interval from the strobe rising edge to CK/CK# rising edge is within the limits defined in section 4.25.1 (DDR4)/ 4.11.2 (LPDDR4/
LPDDR4X) of the specification.
4.3.4.11DQS Input High Pulse Width - t
DQSH
This test aims to verify that the strobe differential input high pulse width is within the
limits defined in section 4.25.1 (DDR4)/ 4.11.2 (LPDDR4/LPDDR4X) of the specification.
DQSS
4.3.4.12DQS Input Low Pulse Width - t
DQSL
This test aims to verify that the strobe differential input low pulse width is within the limits defined in section 4.25.1 (DDR4)/ 4.11.2 (LPDDR4/LPDDR4X) of the specification.
4.3.4.13DQS Falling Edge to CK Setup Time - t
This test aims to verify that the time interval from the strobe falling edge setup time to
the CK/CK# rising edge is within the limits defined in section 4.25.1 (DDR4)/ 4.11.2
(LPDDR4/LPDDR4X) of the specification.
4.3.4.14DQS Falling Edge Hold Time from CK - t
This test aims to verify that the strobe falling edge hold time from CK/CK# rising edge
is within the limits defined in section 4.25.1 (DDR4)/ 4.11.2 (LPDDR4/LPDDR4X) of the
specification.
4.3.4.15Write Preamble - t
WPRE
This test aims to verify that the strobe differential WRITE preamble is within the limits
defined in section 4.25.1 (DDR4) of the specification.
DSS
DSH
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Timing Tests
Command Timing
4.3.4.16Write Postamble - t
This test aims to verify that the strobe differential WRITE postamble is within the limits
defined in section 4.25.1 (DDR4) of the specification.
4.4Command Timing
4.4.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeprobe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
WPST
1
width
4.4.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Timing Tests" > "Command Timing".
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Timing Tests
Command Timing
3. Enable the tests that you want to run.
4. Click "Test Single".
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
4.4.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
4.4.4Measurements
The command timing measurements consist of up to six measurements. They test the
limits as defined in section 13.7 (DDR4) of the JESD79-4B(DDR4) specifications.
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Timing Tests
Address Timing
4.4.4.1Address and Control Input Setup Time - t
This test aims to verify that the command and address setup time from CK/CK# is
within the limits defined in the specification.
4.4.4.2Address and Control Input Hold Time - t
This test aims to verify that the command and address hold time from CK/CK# is within
the limits defined in the specification.
4.4.4.3Address and Control Input Pulse Width t
This test aims to verify that the control and address input pulse width for each input is
within the limits defined in the specification.
4.5Address Timing
4.5.1Test Equipment
IS
IH
IPW
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeprobe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
4.5.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Timing Tests" > "Address Timing".
1
width
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Timing Tests
Address Timing
3. Enable the tests that you want to run.
4. Click "Test Single".
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
4.5.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
4.5.4Measurements
The address timing measurements consist of up to six measurements. They test the
limits as defined in section 13.7 of the JESD79-4B(DDR4) specification.
For details on the measurements, see Chapter 4.4.4, "Measurements", on page 34.
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4.6Chip Select Timing
4.6.1Test Equipment
Timing Tests
Chip Select Timing
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeprobe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
4.6.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Timing Tests" > "Chip Select Timing".
1
width
3. Enable the tests that you want to run.
4. Click "Test Single".
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4.6.3Test Setup
4.6.4Measurements
Timing Tests
Chip Select Timing
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
The chip select timing measurements consist of up to six measurements. They test the
limits as defined in section 13.7 (DDR4) of the JESD79-4B(DDR4) specifications.
4.6.4.1Address and Control Input Setup Time - t
This test aims to verify that the chip select setup time from CK/CK# is within the limits
defined in the specification.
4.6.4.2Address and Control Input Hold Time - t
This test aims to verify that the chip select hold time from CK/CK# is within the limits
defined in the specification.
4.6.4.3t
IPW
This test aims to verify that the chip select input pulse width for each input is within the
limits defined in the specification.
IS
IH
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5Electrical Tests
5.1Single-Ended Signals
5.1.1AC & DC Input Levels for ADD and CMD
5.1.1.1Test Equipment
Electrical Tests
Single-Ended Signals
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.1.1.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Electrical Tests" > "Single-Ended Signals" > "AC & DC Input Levels for
ADD and CMD".
1
width
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Electrical Tests
Single-Ended Signals
3. Enable the "Signals" you want to use.
If only the ADD/CMD signal is selected, only ADD/CMD signal will be used to run
the test.
If both the ADD and the CMD signals are selected, test will be run using ADD signal first, followed by the CMD signal.
4. Enable the tests that you want to run.
5. Click "Test Single".
6. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
7. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.1.1.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
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5.1.1.4Measurements
Electrical Tests
Single-Ended Signals
The AC and DC logic input levels for single-ended address and command measurements consist of up to four measurements. It tests the limits as defined in section
8.1.1(DDR4) of the JESD79-4B(DDR4) specification.
V
IH(AC)
This test aims to verify that the AC input logic high is within the limits defined in the
specification.
V
IL(AC)
This test aims to verify that the AC input logic low is within the limits defined in the
specification.
V
IH(DC)
This test aims to verify that the DC input logic high is within the limits defined in the
specification.
V
IL(DC)
This test aims to verify that the DC input logic low is within the limits defined in the
specification.
5.1.2AC Input Levels for CK
5.1.2.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.1.2.2Performing the Tests
1
width
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.1.2.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.1.2.4Measurements
The single-ended AC input levels for clock and strobe measurements consist of up to
two measurements. It tests the limits as defined in section 8.3.3 (JESD79-4B(DDR4))/
7.2.3 JESD209-4B(LPDDR4) of the specifications.
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5.1.3Output Levels for DQ
5.1.3.1Test Equipment
Electrical Tests
Single-Ended Signals
V
SEH(AC)
This test aims to verify that the single-ended high level for strobes/clock is within the
limits defined in the specification.
V
SEL(AC)
This test aims to verify that the single-ended low level for strobes/clock is within the
limits defined in the specification.
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.1.3.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.1.3.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.1.3.4Measurements
The single-ended output levels for strobe measurements consist of up to two measurements. It tests the limits as defined in section 7.4 of the JESD209-4B(LPDDR4) specification.
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5.1.4AC Overshoot & Undershoot for ADD, CMD and CTRL (DDR4)
5.1.4.1Test Equipment
Electrical Tests
Single-Ended Signals
V
OH
This test aims to verify that the output high measurement level for the output slew rate
is within the limits defined in the specification.
V
OL
This test aims to verify that the output low measurement level for the output slew rate
is within the limits defined in the specification.
This chapter is only relevant for DDR4 tests.
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.1.4.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Electrical Tests" > "Single-Ended Signals" > "AC Overshoot & Undershoot
for ADD, CMD and CTRL".
1
width
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Electrical Tests
Single-Ended Signals
3. Enable the "Signals" you want to use.
If only the ADD/CMD signal is selected, only ADD/CMD signal will be used to run
the test.
If both the ADD and the CMD signals are selected, test will be run using ADD signal first, followed by the CMD signal.
4. Enable the tests that you want to run.
5. Click "Test Single".
6. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
7. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.1.4.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
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5.1.4.4Measurements
Electrical Tests
Single-Ended Signals
The overshoot and undershoot for address and control measurements consist of up to
six measurements. It tests the limits as defined in section 8.3.4 of the
JESD79-4B(DDR4) specification.
V
AOSP
This test aims to verify that the maximum peak amplitude above V
is within the lim-
AOS
its defined in the specification.
V
AOS
This test aims to verify that the upper boundary of overshoot area A
is within the
AOS1
limits defined in the specification.
V
AUS
This test aims to verify that the maximum peak amplitude allowed for undershoot is
within the limits defined in the specification.
A
AOS2
This test aims to verify that the maximum overshoot area per 1 tCK above V
is within
AOS
the limits defined in the specification.
A
AOS1
This test aims to verify that the maximum overshoot area per 1 tCK between VDD and
V
is within the limits defined in the specification.
AOS
A
AUS
This test aims to verify that the maximum undershoot area per 1 tCK below VSS is
within the limits defined in the specification.
A
AOS
This test aims to verify that the maximum overshoot area per 1 tCK below VSS is within
the limits defined in the specification.
5.1.5AC Overshoot & Undershoot for ADD and CTRL (LPDDR4/
LPDDR4X)
This chapter is only relevant for LPDDR4/LPDDR4X tests.
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5.1.5.1Test Equipment
Electrical Tests
Single-Ended Signals
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.1.5.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
If only the ADD/CMD signal is selected, only ADD/CMD signal will be used to run
the test.
If both the ADD and the CMD signals are selected, test will be run using ADD signal first, followed by the CMD signal.
4. Enable the tests that you want to run.
5. Click "Test Single".
6. Follow the instructions of the step-by step guide.
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5.1.5.3Test Setup
5.1.5.4Measurements
Electrical Tests
Single-Ended Signals
When you have finished all steps, the compliance test runs automatically.
7. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
The overshoot and undershoot for address and control measurements consist of up to
four measurements. It tests the limits as defined in section 7.1.3.1 of the
JESD209-4B(LPDDR4) specification.
For details on the measurements, see Chapter 5.1.4.4, "Measurements", on page 47.
V
AOS
This test aims to verify that the upper boundary of overshoot area A
limits defined in the specification.
V
AUS
This test aims to verify that the maximum peak amplitude allowed for undershoot is
within the limits defined in the specification.
A
AOS
This test aims to verify that the maximum overshoot area per 1 tCK below VSS is within
the limits defined in the specification.
A
AUS
This test aims to verify that the maximum undershoot area per 1 tCK below VSS is
within the limits defined in the specification.
5.1.6AC Overshoot & Undershoot for CK
is within the
AOS
This chapter is only relevant for DDR4 tests.
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5.1.6.1Test Equipment
Electrical Tests
Single-Ended Signals
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth4
Probe tipR&S RT-ZMA104
DUTDDR4 device that supports the selected type1
5.1.6.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
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5.1.6.3Test Setup
5.1.6.4Measurements
Electrical Tests
Single-Ended Signals
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
The overshoot and undershoot for clock measurements consist of up to six measurements. It tests the limits as defined in section 8.3.5 (DDR4) of the JESD79-4B(DDR4)
specification.
V
COSP
This test aims to verify that the maximum peak amplitude above V
is within the lim-
COS
its defined in the specification.
V
COS
This test aims to verify that the upper boundary of overshoot area A
is within the
DOS1
limits defined in the specification.
V
CUS
This test aims to verify that the maximum peak amplitude allowed for undershoot is
within the limits defined in the specification.
A
COS2
This test aims to verify that the maximum overshoot area per 1 UI above V
is within
COS
the limits defined in the specification.
A
COS1
This test aims to verify that the maximum overshoot area per 1 UI between VDD and
V
is within the limits defined in the specification.
AOS
A
COS
This test aims to verify that the maximum overshoot area is within the limits defined in
the specification.
A
CUS
This test aims to verify that the maximum undershoot area per 1 UI below VSS is
within the limits defined in the specification.
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5.1.7Overshoot & Undershoot for LVSTL for CK, CS, CKE and ODT
5.1.7.1Test Equipment
Electrical Tests
Single-Ended Signals
This chapter is only relevant for LPDDR4/LPDDR4X tests.
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth4
Probe tipR&S RT-ZMA104
DUTDDR4 device that supports the selected type1
5.1.7.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
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5.1.7.3Test Setup
5.1.7.4Measurements
Electrical Tests
Single-Ended Signals
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
The overshoot and undershoot for clock measurements consist of up to four measurements. It tests the limits as defined in section 7.6 of the JESD209-4B(LPDDR4) specification.
For details on the measurements, see Chapter 5.1.6.4, "Measurements", on page 51.
5.1.8AC Overshoot & Undershoot for DQ, DQS, and DM
This chapter is only relevant for DDR4 tests.
5.1.8.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
width
Modular probeProbe with minimum 9 GHz bandwidth4
Probe tipR&S RT-ZMA104
DUTDDR4 device that supports the selected type1
5.1.8.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.1.8.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.1.8.4Measurements
The overshoot and undershoot for data, strobe and mask measurements consist of up
to 8 measurements. It tests the limits as defined in section 8.3.6 of the
JESD79-4B(DDR4) specification.
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V
Electrical Tests
Single-Ended Signals
DOSP
This test aims to verify that the maximum peak amplitude above V
is within the lim-
DOS
its defined in the specification.
V
DOS
This test aims to verify that the upper boundary of overshoot area A
is within the
DOS1
limits defined in the specification.
V
DUS
This test aims to verify that the lower boundary of undershoot area is within the limits
defined in the specification.
V
DUSP
This test aims to verify that the maximum peak amplitude below V
is within the limits
DUS
defined in the specification.
A
DOS2
This test aims to verify that the maximum overshoot area per 1 UI above V
is within
DOS
the limits defined in the specification.
A
DOS1
This test aims to verify that the maximum overshoot area per 1 UI between VDDQ and
V
is within the limits defined in the specification.
DOS
A
DUS1
This test aims to verify that the maximum undershoot area per 1 UI between VSSQ
and V
A
DUS2
is within the limits defined in the specification.
DUS1
This test aims to verify that the maximum undershoot area per 1 UI below V
within the limits defined in the specification.
5.1.9Overshoot & Undershoot for LVSTL for DQ, DQS, and DMI
This chapter is only relevant for LPDDR4/LPDDR4X tests.
DUS
is
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5.1.9.1Test Equipment
Electrical Tests
Single-Ended Signals
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth4
Probe tipR&S RT-ZMA104
DUTDDR4 device that supports the selected type1
5.1.9.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
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5.1.9.3Test Setup
5.1.9.4Measurements
5.1.10Input Slew Rate for ADD and CMD
Electrical Tests
Single-Ended Signals
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
The overshoot and undershoot for clock measurements consist of up to four measurements. It tests the limits as defined in section 7.6 of the JESD209-4B(LPDDR4) specification.
For details on the measurements, see Chapter 5.1.8.4, "Measurements", on page 54.
This chapter is only relevant for DDR4 tests.
5.1.10.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.1.10.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Electrical Tests" > "Single-Ended Signals" > "Input Slew Rate for ADD and
CMD".
1
width
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Electrical Tests
Single-Ended Signals
3. Enable the "Signals" you want to use.
If only the ADD/CMD signal is selected, only ADD/CMD signal will be used to run
the test.
If both the ADD and the CMD signals are selected, test will be run using ADD signal first, followed by the CMD signal.
4. Enable the tests that you want to run.
5. Click "Test Single".
6. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
7. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.1.10.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
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5.1.10.4Measurements
Electrical Tests
Single-Ended Signals
The input slew rates for address and command measurements consist of up to four
measurements. It tests the limits as defined in sections 8.3.6 of the JESD79-4B(DDR4)
specification.
Setup Slew Rate Rising - SR(tIS) Rising
This test aims to verify that the setup slew rate for rising signal is within the limits
defined in the specification.
Setup Slew Rate Falling - SR(tIS) Falling
This test aims to verify that the setup slew rate for falling signal is within the limits
defined in the specification.
Hold Slew Rate Rising - SR(tIH) Rising
This test aims to verify that the hold slew rate for rising signal is within the limits
defined in the specification.
Hold Slew Rate Falling - SR(tIH) Falling
This test aims to verify that the hold slew rate for falling signal is within the limits
defined in the specification.
5.1.11AC & DC Output Levels for DQ
5.1.11.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
width
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.1.11.2Performing the Tests
1
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Electrical Tests" > "Single-Ended Signals" > "AC & DC Output Levels for
DQ".
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Electrical Tests
Single-Ended Signals
3. Enable the tests that you want to run.
4. Click "Test Single".
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.1.11.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.1.11.4Measurements
The AC & DC output levels for data measurements consist of up to four measurements. It tests the limits as defined in section 9.2 of the JESD79-4B(DDR4) specifications.
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Electrical Tests
Single-Ended Signals
V
OH(AC)
This test aims to verify that the AC output high measurement level for the output slew
rate is within the limits defined in the specification.
V
OL(AC)
This test aims to verify that the AC output low measurement level for the output slew
rate is within the limits defined in the specification.
V
OH(DC)
This test aims to verify that the DC output high measurement level for IV curve linearity
is within the limits defined in the specification.
V
OL(DC)
This test aims to verify that the DC output low measurement level for IV curve linearity
is within the limits defined in the specification.
5.1.12Output Slew Rate for DQ
5.1.12.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.1.12.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.1.12.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.1.12.4Measurements
The single-ended output slew rate for data consists of up to two measurements. It tests
the limits as defined in section 9.4 (DDR4) / 7.4 (LPDDR4) / 4.2 (LPDDR4X) of the
JESD79-4B(DDR4)/ JESD209-4B(LPDDR4)/JESD209-4-1(LPDDR4X) specifications.
This test aims to verify that the single-ended output slew rate for rising edge is within
the limits defined in the specification. It is measured from VOL(AC) to VOH(AC).
This test aims to verify that the single-ended output slew rate for falling edge is within
the limits defined in the specification. It is measured from VOH(AC) to VOL(AC).
5.2.1.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.2.1.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.2.1.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.2.1.4Measurements
The differential AC input levels for clock and strobe measurements consist of up to two
measurements. It tests the limits as defined in section 8.3.2 (JESD79-4B(DDR4)) /
7.2.1 (JESD209-4B(LPDDR4)) of the specifications.
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Electrical Tests
Differential Signals
Differential Input High AC - V
This test aims to verify that the AC differential input high is within the limits defined in
the specification.
Differential Input Low AC - V
This test aims to verify that the AC differential input low is within the limits defined in
the specification.
Differential Input High DC - V
This test aims to verify that the DC differential input high is within the limits defined in
the specification.
Differential Input Low DC - V
This test aims to verify that the DC differential input low is within the limits defined in
the specification.
5.2.2Input Slew Rate for CK
IHdiff(AC)
ILdiff(AC)
IHdiff(DC)
ILdiff(DC)
5.2.2.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.2.2.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.2.2.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.2.2.4Measurements
The input slew rates for clock measurements consist of up to two measurements. It
tests the limits as defined in sections 8.4.1 (DDR4)/ 7.2.4 (LPDDR4/LPDDR4X) of the
JESD79-4B(DDR4)/ (JESD209-4B(LPDDR4)) specifications.
This test aims to verify that the setup slew rate for falling signal is within the limits
defined in the specification.
This chapter is only relevant for DDR4 tests.
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth3
Probe tipR&S RT-ZMA103
DUTDDR4 device that supports the selected type1
5.2.3.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
2. Select "Electrical Tests" > "Differential Signals" > "Differential Cross Point Voltage
for CK".
1
width
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5.2.3.3Test Setup
Electrical Tests
Differential Signals
3. Enable the tests that you want to run.
4. Click "Test Single".
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.2.3.4Measurements
The differential cross point voltage for clock measurement consists of one measurement. It tests the limits as defined in section 8.5 of the JESD79-4B(DDR4) specification.
Differential Input Cross Point Voltage - V
This test aims to verify that the differential input cross point voltage is within the limits
defined in the specification. It is measured from the actual cross point of true and complement signals to the midlevel between of VDD and VSS.
5.2.4AC Input Levels for DQS
5.2.4.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
IX(CK)
1
width
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
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5.2.4.2Performing the Tests
Electrical Tests
Differential Signals
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.2.4.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
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5.2.4.4Measurements
Electrical Tests
Differential Signals
The differential AC input levels for strobe measurements consist of up to two measurements. It tests the limits as defined in section 8.7.2 (DDR4)/ 7.2.6 (LPDDR4/
LPDDR4X) of the JESD79-4B(DDR4)/ JESD209-4B(LPDDR4) specifications.
Differential Input High AC - V
IHdiff(Peak)
This test aims to verify that the AC differential input high is within the limits defined in
the specification.
Differential Input Low AC - V
ILdiff(Peak)
This test aims to verify that the AC differential input low is within the limits defined in
the specification.
5.2.5AC Differential Cross Point Voltage for DQS
This chapter is only relevant for DDR4 tests.
5.2.5.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
width
Modular probeProbe with minimum 9 GHz bandwidth3
Probe tipR&S RT-ZMA103
1
DUTDDR4 device that supports the selected type1
5.2.5.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.2.5.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.2.5.4Measurements
The differential cross point voltage for strobe measurement consists of one measurement. It tests the limits as defined in section 8.7.4 of the JESD79-4B(DDR4) specification.
Differential Input Cross Point Voltage - V
DQSmid_to_Vcent
This test aims to verify that the differential input cross point voltage is within the limits
defined in the specification. It is measured from the actual cross point of true and complement signals to the midlevel between of VDD and VSS.
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5.2.6Input Slew Rate for DQS
5.2.6.1Test Equipment
Electrical Tests
Differential Signals
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.2.6.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
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5.2.6.3Test Setup
5.2.6.4Measurements
Electrical Tests
Differential Signals
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
The differential input slew rates for strobe measurements consist of up to two measurements. It tests the limits as defined in sections 8.7.5 (DDR4)/ 7.2.9(LPDDR4/
LPDDR4X) of the JESD79-4B(DDR4)/ JESD209-4B(LPDDR4) specifications.
This test aims to verify that the setup slew rate for falling signal is within the limits
defined in the specification.
5.2.7Differential AC Output Levels for DQS
5.2.7.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
width
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
1
5.2.7.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
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Electrical Tests
Differential Signals
2. Select "Electrical Tests" > "Differential Signals" > "Differential AC Output Levels for
DQS".
3. Enable the tests that you want to run.
4. Click "Test Single".
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.2.7.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
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5.2.7.4Measurements
5.2.8Differential Output Slew Rate for DQS
Electrical Tests
Differential Signals
The differential AC output levels for strobe measurements consist of up to two measurements. It tests the limits as defined in section 9.3 of the JESD79-4B(DDR4) specification.
V
OHdiff(AC)
This test aims to verify that the AC differential output high measurement level for the
output slew rate is within the limits defined in the specification.
V
OLdiff(AC)
This test aims to verify that the AC differential output low measurement level for the
output slew rate is within the limits defined in the specification.
5.2.8.1Test Equipment
ItemDescription, modelQuantity
Rohde & Schwarz oscilloscopeR&S RTP with 4 channels and minimum 8 GHz band-
Modular probeProbe with minimum 9 GHz bandwidth2
Probe tipR&S RT-ZMA102
DUTDDR4 device that supports the selected type1
5.2.8.2Performing the Tests
1. Start the test as described in Chapter 3.5, "Starting DDR4 Tests", on page 22.
5. Follow the instructions of the step-by step guide.
When you have finished all steps, the compliance test runs automatically.
6. You can also run the test in offline mode, using downloaded waveforms. For
details, see "Offline Execution"on page 21.
5.2.8.3Test Setup
The software guides you to make the proper connections. Follow the steps to conduct
the test.
The software is intended to facilitate the execution of a set of measurements on the relevant signals.
Consider also the soldering guide, see Chapter 2.1, "Test Equipment", on page 9.
5.2.8.4Measurements
The differential output slew rate for strobe consists of up to two measurements. It tests
the limits as defined in section 9.5 (DDR4) / 7.2.9 (LPDDR4) / 4.3 (LPDDR4X) of the
JESD79-4B(DDR4)/ JESD209-4B(LPDDR4)/JESD209-4-1(LPDDR4X) specifications.
This test aims to verify that the differential output slew rate for rising edge is within the
limits defined in the specification. It is measured from VOLdiff(AC) to VOHdiff(AC).
This test aims to verify that the differential output slew rate for falling edge is within the
limits defined in the specification. It is measured from VOHdiff(AC) to VOLdiff(AC).
77User Manual 1178.9910.02 ─ 03
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