Rockwell Automation T71xx User Manual

ICS Regent +Plus

PD-7000

Processor Modules

110 VAC, 220/240 VAC and 24 VDC

(128K: T7110, T7111 and T7112)
(512K: T7120, T7121 and T7122)

The controller assembly's three processor modules store and
execute application programs, scan and update the I/O modules,
process communications, and detect system faults. Each of the
processor modules executes the application programs
independently, but in lock-step synchronization with the other two.
And each processor module independently communicates in lock­step synchronization with the I/O assembly over its own dedicated
I/O Safetybus link.

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Features

• Triple modular redundant, fault tolerant (3-2-0) operation.

• Two-out-three hardware voting of all internal operations.

• Automatic fault handling without nuisance alarming.

• Time-stamped fault historian.

• Hot replacement with pushbutton education of new module

(no need to re-load programs).

• Battery-backed program storage for power outage protection.

• Structured function block programming.

• Multiple program execution.

• Front panel indicators on each module show processor,

communications, I/O, program, battery, memory lock, and
power status.

• TÜV certified for safety, Risk Class 5.

The processor modules use a two-out-of-three voting scheme to
detect faults in the system. The Regent identifies, isolates, and
records transient and permanent faults as they occur. All faults are
recorded in the system's fault history. Permanent faults are also

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annunciated by an LED on the front of the processor module. In
addition, redundant fault contacts are activated to signal an
external device to alert operators to any permanent fault.

Module Operation

A block diagram of a typical processor module is shown in Figure

1.
Inside each processor module is a main processor, an I/O proc-

essor, and a power supply. A battery inside each of the processor
module maintains user application programs and the downloadable
portions of the system's RAMcode if there is a power failure. Each
processor module has interfaces to the processor Safetybus and the
I/O Safetybus. These interfaces consist of an input voter,
discrepancy detector logic, and an output driver.

Figure 1. Block Diagram of a Processor Module.

The voting and fault detection circuits allow the processor modules
to identify and isolate transient, intermittent, and permanent faults
as they occur. All faults are recorded in the system's fault history.

Each processor module contains its own power supply that
converts input power to the logic power levels used by the internal
processor circuits. The failure of one power supply will only effect

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one processor module — allowing the other two modules to
continue operating — thus keeping the Regent on-line by virtue of
its majority two-out-of-three voting architecture.

Programs are stored in on-board battery-backed RAM. Program
instructions are fetched from each processor’s memory and
executed by the processors. Data from inputs are read from the
I/O modules in the I/O assembly. The main processor coordinates
the Regent’s activities and solves the application algorithms
programmed by the user. Outputs are driven by transmitting data
through the processor module’s I/O processor to the I/O assembly.

Communications between the main processor and the I/O
processor are maintained through shared RAM that is used as a
“mail box” for data transfers between the two processors.

All three processor modules operate independently in lock-step
synchronization with the other two modules, continuously
repeating a scan cycle (Figure 2).

Figure 2. The Regent’s Scan Cycle.

The main processors in each of the three processor modules run
programs and process communications synchronously, while the
I/O processors in each module read and write I/O synchronously.

During these synchronous operations, all instructions and data are
distributed across the Safetybus where automatic voting and fault
detection occur.

Main Processor

During each scan cycle, the main processor executes application
programs, reading inputs from the shared RAM and writing
outputs to the shared RAM.

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In addition to running application programs, the main processor
takes care of system overhead, such as:

• Background diagnostics including voter tests, read tests of the

EPROMs, and read-write tests of the RAM (this automatic test
is also what re-educates a new processor).

• Communications processing including reading from and

writing to the communications modules every one millisecond
and checking the communications messages at the end of each
scan.

• Fault filtering and reporting (which are available through

W

INTERPRET’s fault status and fault history features).

• Reading the communications module’s real-time clock (if a

real-time clock communications module is installed).

I/O Processor

During each scan cycle the I/O processor receives voted input data
into its local RAM and transfers it to the shared RAM — making it
available to the main processor. After being processed by the main
processor, output data are placed into the shared RAM and read by
the I/O processor into its local RAM and written to the outputs.

The I/O processor also shares in managing system overhead. This
overhead includes:

• Background I/O processor tests (voter tests, read EPROM tests,

and read-write local RAM tests).

• I/O module tests (I/O module voter tests, logic loopback tests,

and coordinating other I/O module tests).

• Fault filtering and reporting (which are available through

W

INTERPRET’s fault status and fault history features).

Testing and Diagnostics

Each processor module’s error detection logic is periodically tested
to ensure its continued correct operation. Testing is done using
self-tests that are automatically scheduled by each processor
module’s real-time operating system.

Front Panel Indicators and Controls

Figure 3 shows the physical features of the processor modules. The
front panel of each module contains status indicators as well as a
reset button and a memory lock keyswitch.

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Figure 3. Processor Module.

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