RICOH RS5C317A, RS5C317B Datasheet

ULTRA-COMPACT

HIGH PERFORMANCE

SERIAL REAL-TIME CLOCK ICs

RS5C317A/B

ELECTRONIC DEVICES DIVISION

NO.EA-036-9908

APPLICATION MANUAL

NOTICE

1. The products and the product specifications described in this application manual are subject to change or dis­continuation of production without notice for reasons such as improvement. Therefore, before deciding to use
the products, please refer to Ricoh sales representatives for the latest information thereon.

2. This application manual may not be copied or otherwise reproduced in whole or in part without prior written con­sent of Ricoh.

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4. The technical information described in this application manual shows typical characteristics of and example
application circuits for the products. The release of such information is not to be construed as a warranty of or a
grant of license under Ricoh's or any third party's intellectual property rights or any other rights.

5. The products listed in this document are intended and designed for use as general electronic components in
standard applications (office equipment, computer equipment, measuring instruments, consumer electronic
products, amusement equipment etc.). Those customers intending to use a product in an application requiring
extreme quality and reliability, for example, in a highly specific application where the failure or misoperation of
the product could result in human injury or death (aircraft, spacevehicle, nuclear reactor control system, traffic
control system, automotive and transportation equipment, combustion equipment, safety devices, life support
system etc.) should first contact us.

6. We are making our continuous effort to improve the quality and reliability of our products, but semiconductor
products are likely to fail with certain probability. In order prevent any injury to persons or damages to property
resulting from such failure, customers should be careful enough to incorporate safety measures in their design,
such as redundancy feature, fire-containment feature and fail-safe feature. We do not assume any liability or
responsibility for any loss or damage arising from misuse or inappropriate use of the products.

7. Anti-radiation design is not implemented in the products described in this application manual.

8. Please contact Ricoh sales representatives should you have any questions or comments concerning the prod­ucts or the technical information.

June 1995

OUTLINE

......................................................................................................

1

FEATURES

....................................................................................................

1

BLOCK DIAGRAM

.........................................................................................

2

APPLICATIONS

.............................................................................................

2

PIN CONFIGURATION

...................................................................................

2

PIN DESCRIPTIONS

......................................................................................

3

ABSOLUTE MAXIMUM RATINGS

...................................................................

4

RECOMMENDED OPERATING CONDITIONS

.................................................

4

DC CHARACTERISTICS

................................................................................

5

AC CHARACTERISTICS

................................................................................

5

TIMING CHARTS

...........................................................................................

6

FUNCTIONAL DESCRIPTIONS

......................................................................

7

1. Addressing

.................................................................................................

7

2. Registers

...................................................................................................

8

3. Counters

..................................................................................................

14

USAGES

......................................................................................................

16

1. Read Data (For the RS5C317A)

......................................................................

16

2. Write Data (For the RS5C317A)

.......................................................................

17

3. Read Data (For the RS5C317B)

......................................................................

18

4. Write Data (For the RS5C317B)

.......................................................................

19

5. CE Pin

....................................................................................................

20

6. Configuration of Oscillating Circuit

....................................................................

21

7. Oscillator Halt Sensing

.................................................................................

22

8. Typical Power Supply Circuit

...........................................................................

23

9. Oscillation Frequency Adjustment

.....................................................................

23

10. Interrupt Operation

....................................................................................

25

RS5C317A/B

APPLICATION MANUAL

CONTENTS

11. Timer

....................................................................................................

27

12. 32kHz Clock Output

...................................................................................

27

13. Typical Application

.....................................................................................

28

14. Typical Characteristic Measurements

...............................................................

29

15. Typical Software-based Operations

.................................................................

31

PACKAGE DIMENSIONS

..............................................................................

35

TAPING SPECIFICATION

..............................................................................

35

ULTRA-COMPACT HIGH PERFORMANCE

SERIAL REAL-TIME CLOCK ICs

1

RS5C317A/B

OUTLINE

The RS5C317A/B are CMOS type real-time clock ICs which are connected to the CPU via three signal lines and
capable of serial transmission of clock and calendar data to the CPU.
The RS5C317A/B can generate various periodic interrupt clock pulses lasting for long period (one month), further
alarm interrupt can be made by days of the week, hours, and minutes. The function of 32kHz clock output and timer
counter for watch-dog-timer are also include. Driving an oscillation circuit at constant voltage, the circuit undergoes
few voltage fluctuations and consequently realizes low current consumption (0.6µA at 3V). It also provides an oscil­lator halt sensing function for application to data validity at power-on and other occasions. Integrated into a compact
and thin 14pin SSOP (0.65mm pitch), the RS5C317A/B are the optimum choice for equipment requiring small size
and low power consumption.
The RS5C317A and the RS5C317B reads/writes data at falling and rising edge of serial clock respectively.

• Time keeping voltage 1.6V to 6.0V

• Lowest supply current 0.6µA TYP. (1.5µA MAX.) at 3V

• Connection to the CPU via only three pins: CE, SCLK/SCLK and SIO for addressing and data read/write

• A clock counter (counting hours, minutes, and seconds) and a calendar counter (counting leap years, years,

months, days, and days of the week) in BCD code

• Periodic interrupt pulses to the CPU with cycles ranging from one month to 1/1024Hz, with interrupt flags and

interrupt halt

• Alarm interrupt (days of the week, hours, minutes)

• Counter for timer with internal clock

• Oscillator halt sensing to judge internal data validity

• 32kHz clock output with enable switch

• Second digit adjustment by ±30 seconds

• 12-hour or 24-hour time display selectable

• Automatic leap year recognition up to the year 2099

• CMOS logic

• Package: 14pin SSOP (0.65mm pitch)

FEATURES

RS5C317A/B

2

APPLICATIONS

• Communication equipment (Multi-function telephone, portable telephone, PHS, pager)

• Business machine (Facsimile, portable facsimile)

• Personal computer (Desktop type, notebook type, word processor, PDA, electronic notebook, TV games)

• Audio visual equipment (Portable audio equipment, video camera, camera, digital camera, remote control equip­ment)

• Home use (Rice cooker, microwave range)

PIN CONFIGURATION

• 14pin SSOP (0.65mm pitch)

CE

1

VDD
SCLK 32KOUT
SIO NC
CLKC OSCIN
ALRM OSCOUT
TMOUT NC

VSS INTR

RS5C317A RS5C317B

14
2 13
3 12
4 11
5 10
6 9
7 8

CE

1

VDD
SCLK 32KOUT
SIO NC
CLKC OSCIN
ALRM OSCOUT
TMOUT NC

VSS INTR

14
2 13
3 12
4 11
5 10
6 9
7 8

BLOCK DIAGRAM

OSC DIV

ADDRESS
DECODER

ADDRESS
REGISTER

TIME COUNTER

(SEC,MIN,HOUR,WEEK,DAY,MONTH,YEAR)

INTERRUPT

CONTROL

SHIFT REGISTER

I/O

CONTROL

OSC
DETECT

OSCIN

OSCOUT

CLKC

32KOUT

32KHz OUTPUT

CONTROL

ALARM REGISTER

(WEEK,MIN,HOUR)

COMPARATOR

SIO

SCLK/SCLK*

CE

INTR

ALRM

TMOUT

*

) RS5C317A: SCLK RS5C317B: SCLK

RS5C317A/B

3

Pin No.

1

2

3

8

5

6

11
10

13

4

14

7

9, 12

PIN DESCRIPTIONS

Symbol

CE

SCLK

(A type)

SCLK

(B type)

SIO

INTR

ALRM

TMOUT

OSCIN

OSCOUT

32KOUT

CLKC

VDD

VSS

NC

Name

Chip enable input

Shift clock input

Serial input/output

Interrupt output

Alarm output

Timer output

Oscillator circuit
input/output

32kHz output

Control input for
32kHz output

Positive/Negative
power supply input

No Connection

Description

The CE pin is used to interface the CPU and is accessible when held at the high
level. This pin is connected to a pull-down resistor. It should be switched to the
low level or opened when not accessed or when powering off the system. Holding
the CE pin high for more than 2.5 seconds forces 1Hz interrupt pulses to be output
from the INTR pin for oscillation frequency measurement. (No “1Hz pulse” is out­put for less than 1.5 seconds.)

This pin is used to input shift clock pulses to synchronize data input to, and output
from, the SIO pin. SCLK and SCLK are for writing data at falling and rising edge of
clock pulses respectively and also reading data at rising and falling edge of clock
pulses respectively.

The SIO pin inputs and outputs written or read data in synchronization with shift
clock pulses from the SCLK/SCLK pin. The SIO pin causes high impedance when
CE pin is held at the low level (CMOS input/output). After the CE pin is switched
to the high level and the control bits and the address bits are input from the SIO,
the SIO pin performs serial input and output operations.

The INTR pin outputs periodic interrupt pulses and alarm interrupt to the CPU.
This pin functions as an Nch open drain output even when the CE pin is held at the
low level.

The ALRM pin outputs alarm interrupt to the CPU. This pin functions as an Nch
open drain output even when the CE pin is held at the low level.

TMOUT pin outputs timer counter output pulses for watch-dog-timer and free-run­timer. This pin functions as an Nch open drain output even when the CE pin is
held at the low level. Timer function is disabled and TMOUT is OFF state when
the RS5C317 is in the oscillation halt sensing state.

These pins configure an oscillator circuit by connecting a 32.768kHz crystal oscilla­tor between the OSCIN and OSCOUT pins and by connecting a capacitor between
the OSCIN and Vss pins. (Any other oscillator circuit components are built into
the RS5C317A/B.)

32kHz clock output pin for peripheral circuit.
The 32kHz clock output is controlled by CLKC pin and 32kHz control register.
The 32KOUT pin outputs 32kHz clock when the CLKC pin is held at high and
CLEN=0, and this pin is held at high impedance state when the CLKC pin and
CLEN is in any other states and even when the CLKC pin is open. CMOS output.

Control pin for an output of the 32KOUT pin. This pin incorporates a pull-down­resistor.

V

DD and VSS is connected to power supply and ground respectively.

Ordinarily connected to V

SS pin.

RS5C317A/B

4

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

ABSOLUTE MAXIMUM RATINGS

(VSS=0V)

Symbol Item Conditions Ratings Unit

VDD Supply voltage –0.3 to +7.0 V

VI Input voltage –0.3 to VDD+0.3 V

VO1 Output voltage 1 SIO, 32KOUT –0.3 to VDD+0.3 V

VO2 Output voltage 2 INTR, ALRM, TMOUT –0.3 to +12 V

PD Power dissipation Topt=25°C 300 mW

Topt Operating temperature –40 to +85 ˚C

Tstg Storage temperature –55 to +125 ˚C

(VSS=0V, Topt=–40 to +85˚C)

Symbol Item Conditions MIN. TYP. MAX. Unit

VDD Supply voltage 2.5 6.0 V

VCLK Time keeping voltage 1.6 6.0 V

fXT Oscillation frequency 32.768 kHz

CG External oscillation capacitance CL value of crystal=6 to 8pF 5 10 24 pF

V

PUP Pull-up voltage INTR, ALRM, TMOUT 10 V

Absolute Maximum ratings are threshold limit values that must not be exceeded even for an instant under
any conditions. Moreover, such values for any two items must not be reached simultaneously. Operation
above these absolute maximum ratings may cause degradation or permanent damage to the device. These
are stress ratings only and do not necessarily imply functional operation below these limits.

RS5C317A/B

5

DC CHARACTERISTICS

Unless otherwise specified: VSS=0V, VDD=3V, Topt=–40 to +85˚C, Oscillation frequency=32.768kHz,(CL=6pF, R1=30kΩ), CG=10pF

AC CHARACTERISTICS

(VSS=0V, Topt=–40 to +85˚C, CL=50pF)

Symbol Item

V

DD≥4.5V VDD≥4.0V VDD≥2.5V

Unit

MIN. MAX. MIN. MAX. MIN. MAX.

tCES CE set-up time 175 200 400 ns
tCEH CE hold time 175 200 400 ns

tCR CE inactive time 350 400 800 ns

tSCK SCLK clock cycle time 350 400 800 ns
tCKH SCLK high time 175 200 400 ns
tCKL SCLK low time 175 200 400 ns

tCKS SCLK to CE set-up time 60 80 120 ns

tRE

Data output start time (from rising

120 135 300 ns

of SCLK) (from falling of SCLK)

tRR

Data output delay time (from rising

120 135 300 ns

of SCLK) (from falling of SCLK)

tRZ Output floating time 120 135 300 ns
tDS Input data set-up time 50 60 120 ns
tDH Input data hold time 50 50 80 ns

Symbol Item Pin name Conditions MIN. TYP. MAX. Unit

VIH “H” input voltage

CE, SCLK/SCLK,

0.8VDD VDD V

SIO, CLKC

V

IL “L” input voltage

CE, SCLK/SCLK,

0 0.2VDD V

SIO, CLKC

IOH “H” output current SIO, 32KOUT VOH=VDD –0.5V –0.5 mA

IOL1

“L” output current

SIO, 32KOUT V

OL1=0.5V 0.5

mA

IOL2 INTR, ALARM, TMOUT VOL2=0.4V 1
RDN Pull-down resistance CE 45 150 450 kΩ

IIH Input current CLKC VIH=3V 1 5 µA

IILK Input leakage current SCLK/SCLK VI=VDD or VSS –1 1 µA

IOZ1

Output leakage current

SIO, 32KOUT V

O=VDD or VSS –2 2

µA

IOZ2 INTR, ALARM, TMOUT VO=10V –5 5

I

DD1 Standby current 1 VDD

VDD=3V

0.6 1.5 µA

Input/output: open

I

DD2 Standby current 2 VDD

VDD=6V

0.8 2.0 µA

Input/output: open

C

D Internal oscillation Cap. OSCOUT 10 pF

RS5C317A/B

6

tSCKtCES

tCKS

tCEH

tCR

tRE

tRZ

tCKHtCKL

tRR

Read Data

Write Data

t

DS tDH

CE

SCLK

SIORead cycle

Write cycle

SIO

tSCKtCES

tCKS

tCEH

tCR

tRE

tRZ

tCKHtCKL

tRR

Read Data

Write Data

t

DS tDH

CE

SCLK

SIORead cycle

Write cycle

SIO

Input/output conditions: VIH=0.8×VDD, VIL=0.2×VDD, VOH=0.8×VDD, VOL=0.2×VDD

• RS5C317A

• RS5C317B

TIMING CHARTS

*

) Any SCLK/SCLK state is allowed in the hatched area.

RS5C317A/B

7

FUNCTIONAL DESCRIPTIONS

1. Addressing

*

1) All the listed data can be read and written.

*

2) The “—” mark indicates data which can be read only and set to “0” when read.

*

3) The ADJ/BSY bit of the control register is set to ADJ for write operation and BSY for read operation.

*

4) The WTEN/XSTP bit of the control register is set to WTEN for write operation and XSTP for read operation.

*

5) The clock/calendar counter and the alarm register can be selected when the BANK=0 and BANK=1 respectively. To designate the BANK is unnec­essary for Interrupt cycle register and Control register 1/2.

*

6) The WTEN bit and TEST bit are set to “1” when CE is “Low”.

*

7) When the crystal oscillator is stopped after initial power-on or supply voltage drop, XSTP=1, the timer register and CLEN bit of the 32kHz control reg­ister perform as follows:
CLEN=0 TM3=TM2=TM1=TMCL=0 (Timer halts)

*

8) The CLEN data can be read only and set to 0 when CLKC is “L”.

Address

Registers

Data *

1

A3 A2 A1 A0

D3 D2 D1 D0

0 0 0 0 0

1-second counter (BANK=0) S

8 S4 S2 S1

Day-of-the-week alarm register 1 (BANK=1) AW3 AW2 AW1 AW0

1 0 0 0 1

10-second counter (BANK=0) —*

2

S40 S20 S10

Day-of-the-week alarm register 2 (BANK=1) ALC AW6 AW5 AW4

2 0 0 1 0

1-minute counter (BANK=0) M

8 M4 M2 M1

1-minute alarm register (BANK=1) AM8 AM4 AM2 AM1

3 0 0 1 1

10-minute counter (BANK=0) — M

40 M20 M10

10-minute alarm register (BANK=1) — AM40 AM20 AM10

4 0 1 0 0

1-hour counter (BANK=0) H

8 H4 H2 H1

1-hour alarm register (BANK=1) AH8 AH4 AH2 AH1

5 0 1 0 1

10-hour counter (BANK=0) — — P/A, H

20 H10

10-hour alarm register (BANK=1) ALE — AP/A, AH20 AH10

6 0 1 1 0 Day-of-the-week counter (BANK=0) — W4 W2 W1

7 0 1 1 1 Interrupt cycle register (BANK=0, 1) CT3 CT2 CT1 CT0

8 1 0 0 0 1-day counter (BANK=0) D8 D4 D2 D1

9 1 0 0 1

10-day counter (BANK=0) — — D

20 D10

Timer register *

7

(BANK=1) TM3 TM2 TM1 TMCL

A 1 0 1 0

1-month counter (BANK=0) MO

8 MO4 MO2 MO1

32kHz control register *

7

(BANK=1) — — — CLEN *

8

B 1 0 1 1 10-month counter (BANK=0) — — — MO10

C 1 1 0 0 1-year counter (BANK=0) Y8 Y4 Y2 Y1

D 1 1 0 1 10-year counter (BANK=0) Y80 Y40 Y20 Y10

E 1 1 1 0 Control register 1 (BANK=0, 1) CTFG ALFG

WTEN

*

6

/XSTP

*

4

ADJ/BSY*

3

F 1 1 1 1 Control register 2 (BANK=0, 1) 12/24 TMR BANK *5TEST *

6

RS5C317A/B

8

2. Registers

2.1 Control Register 1 (at Eh)

D3 D2 D1 D0

CTFG

ALFG XSTP BSY

CTFG ALFG WTEN ADJ

(For write operation)

(For read operation)

±30-second Adjustment Bit

ADJ

Description

0
1

Ordinary operation
Second digit adjustment

BSY

Description

0
1

Ordinary operation
Second digit carry or adjustment

Clock/Counter Busy-state Indication Bit

WTEN

Description

0
1

Disabling of 1-second digit carry for clock counter
Enabling of 1-second digit carry for clock counter

Clock Counter Enable/Disable Setting Bit

XSTP

Description

0
1

Ordinary oscillation
Oscillator halt sensing

Oscillator Halt Sensing Bit

ALFG

Description

0
1

Unmatched alarm register with clock counter
Matched alarm register with clock counter

Alarm Flag Bit

CTFG

Description

0
1

INTR=OFF enabling of write operation when CT

3 bit is set to 1

INTR=L enabling of write operation when CT

3 bit is set to 1

Interrupt Flag Bit

2.1-1 (ADJ)

The following operations are performed by setting the ADJ bit to 1.
After this bit is set to 1, the BSY bit is set to 1 for the maximum duration of 122.1µs.
If the WTEN bit is 0, these adjustment operations are started after the WTEN bit is set to 1.

1) For second digits ranging from “00” to “29” seconds:

Time counters smaller than seconds are reset and second digits are set to “00”.

2) For second digits ranging from “30” to “59” seconds:

Time counters smaller than seconds are reset and second digits are set to “00”. Minute digits are incremented by 1.