RICOH RN5T564 Technical data
7-channel Power Management IC
RN5T564
Development Specifications
Rev. 1.4
2009.06.25
RICOH COMPANY, LTD.
Electronic Devices Company
This specification is subject to change without notice.
RN5T564 7-channel Power Management IC
Table of Contents
1. Outline..................................................................................................................................................... 3
2. Feature .................................................................................................................................................... 3
3. Pin Configuration .................................................................................................................................... 4
4. Block diagram.......................................................................................................................................... 5
5. Pin Description ........................................................................................................................................ 6
6. Power ON/OFF Operation ....................................................................................................................... 7
6.1 Power ON/OFF Operation ..................................................................................................................................7
6.2 UVLO (Under Voltage Lock Out) Electrical Characteristics .............................................................................8
6.3 Thermal Shutdown Circuit Electrical Characteristics .........................................................................................8
7. Reset Function ............................................................................................................................... ..........9
8. FUNCTION Blocks ................................................................................................................................10
8.1 LDO, DCDC Table ...........................................................................................................................................10
8.2 LDO ..................................................................................................................................................................11
8.2.1 LDO1, 2, 3 Electrical Characteristics ...................................................................................................... 12
8.2.2 LDO4, 5 Electrical Characteristics .......................................................................................................... 13
8.3 Step-down DC/DC Converter...........................................................................................................................14
8.3.1 Step-down DC/DC Converter1 Electrical Characteristics ....................................................................... 14
8.3.2 Step-down DC/DC Converter2 Electrical Characteristics ....................................................................... 15
8.3.3 Step-down DC/DC Converter2 Output Voltage Setting........................................................................... 16
9. CPU Interface ........................................................................................................................................ 17
9.1 I2C BUS............................................................................................................................................................17
9.1.1 Method of I2C-Bus Transfer.................................................................................................................... 17
9.1.2 I2C-Bus Slave Address ............................................................................................................................ 18
9.1.3 I2C-Bus Data Transmission Format ........................................................................................................19
9.1.4 I2C-Bus SDA and SCL Bus Line characteristics..................................................................................... 21
10. Register.................................................................................................................................................. 23
10.1 Register Map.....................................................................................................................................................23
10.2 Register Description..........................................................................................................................................24
10.2.1 PWRON Register (Address: 00h)............................................................................................................ 24
©2009 Rev. 1.4 Page 1
RN5T564 7-channel Power Management IC
10.2.2 MODE Register (Address: 01h) ..............................................................................................................24
10.2.3 LDO Setting Voltage Register (Address: 02h)......................................................................................... 25
11. Electrical Characteristics .......................................................................................................................26
11.1 Absolute Maximum Ratings .............................................................................................................................26
11.2 Recommendation of Operation Conditions.......................................................................................................26
11.3 System Consumption Current ...........................................................................................................................26
12. Electrical Characteristics of Digital Input/Output Pin............................................................................ 27
12.1 VDD system CMOS Schmitt Input Pin.............................................................................................................27
12.2 VDD system Nch Open Drain Output Pin ........................................................................................................27
12.3 VIND system CMOS Schmitt Input Pin ...........................................................................................................27
12.4 VDD system CMOS Input pin..........................................................................................................................27
12.5 VIND system NchOpen Drain Output Pin........................................................................................................27
13. Package Information.............................................................................................................................. 28
©2009 Rev. 1.4 Page 2
RN5T564 7-CHANNEL POWER MANAGEMENT IC
1. Outline
RN5T564 is the power management IC for GPS. It integrates 2 high-efficiency Step-down DCDC controllers,
5 Low dropout regulators, Power control logic, Reset Detection, I2C interface and etc.
2. Feature
● High Efficiency Synchronous Step-down DCDC Converters
・DC/DC1 0.9 to 1.6V by trimming @ 500mA (for Core) PWM/VFM mode
・DC/DC2 0.9 to 3.3V by external resistor @ 500mA (for Memory)
* When DCDC1 is OFF, DCDC2 must not be loaded the current of 50mA or more
● Low Drop Voltage Regulator
・LDO1,LDO2,LDO3 1.2 to 3.3V by trimming @ 150mA
・LDO4,LDO5 Programmable 1.2 to 3.3V @ 300mA with ECO Mode
・Over current Protection (All Regulators)
● I2C-Bus (Max 400kHz)
・Address = 64h
・ON/OFF control
・Individual LDOs voltage value setting
● Others
・Soft-start circuit (DCDC1,2)
・Short-circuit Protection and Thermal Protection
・UVLO Function
● Package
・28pin Thin QFN package (Body size: 4 x 4 x 0.8mm)
● Process
・CMOS process
©2009 Rev. 1.4 Page 3
RN5T564 7-CHANNEL POWER MANAGEMENT IC
3. Pin Configuration
(TOP VIEW)
VFB2
SCL
SDA
VDD
VO5
1
2
3
4
5
6
7
GNDD
PSHOLD
Pin No. Name Pin No. Name Pin No. Name Pin No. Name
VINP2
LX2
27
28
RN5T564
9
8
VO4
VINL2
GNDP2
VINA
26
25
10
11
VREF
GNDA
VINP1
24
12
VO3
LX1
23
13
VO2
GNDP1
22
21
20
19
18
17
16
15
14
VINL1
QFN0404-28 pin
VFB1
PWRON
DC1EXON
RESETO
RESETI
VIND
VO1
1 GNDD 8 VINL2 15 VO1 22 GNDP1
2 VFB2 9 VO4 16 VIND 23 LX1
3 PSHOLD 10 VREF 17 RESETI 24 VINP1
4 SCL 11 GNDA 18 RESETO 25 VINA
5 SDA 12 VO3 19 DC1EXON 26 GNDP2
6 VDD 13 VO2 20 PWRON 27 LX2
7 VO5 14 VINL1 21 VFB1 28 VINP2
Fig 3-1 Pin Configuration
©2009 Rev. 1.4 Page 4
RN5T564 7-CHANNEL POWER MANAGEMENT IC
4. Block diagram
VINA
GND
GND
GND
GND
GND
1.0uF
1.0uF
1.0uF
1.0uF
2.2uF
2.2uF
GND
VINL1
VO1
VO2
VO3
VINL2
VREF
GND
VO4
VO5
GNDA
1.0uF
LDO1 150mA
Normal
LDO2 150mA
Normal
LDO3 150mA
Normal
VREF
LDO4 300mA
DAC
Normal /ECO
LDO5 300mA
DAC
Normal /ECO
UVLO
Thermal
Shutdown
Step-down
DC/DC
Converter 1
Step-down
DC/DC
Converter 2
RESET_DET
I2CI/F
Power ON
Sequence
VINP1
LX1
GNDP1
VFB1
DC1EXON
VINP2
LX2
GNDP2
VFB2
RESETO
RESETI
VIND
SDA
SCL
VDD
PWRON
PSHOLD
GNDD
4.7uH
GND
2.2uH
R1
C
R2
GND GND
(Opendrain)
0.1uF
GND
GND
10uF
4.7uF
2.2uF
1.0uF
GND
Fig 4-1 Block Diagram
©2009 Rev. 1.4 Page 5
RN5T564 7-CHANNEL POWER MANAGEMENT IC
5. Pin Description
No. Name I/O
1 GNDD G Ground GND
2 VFB2 I Output voltage feedback input of DCDC converter -
3 PSHOLD I Input signal to maintain power on VDD
4 SCL I I2C interface clock input VDD
5 SDA I/O I2C interface data input VDD
6 VDD PWR Power supply for Interface VDD
7 VO5 O LDO5 output -
8 VINL2 PWR Power supply VIN
9 VO4 O LDO4 output -
10 VREF O Bypass capacitor connecting pin -
11 GNDA G Ground GND
12 VO3 O LDO3 output -
13 VO2 O LDO2 output -
14 VINL1 PWR Power supply VIN
15 VO1 O LDO1 output -
16 VIND PWR Power supply VIN
17 RESETI I RESET in VIN
18 RESETO O RESET out VIN Open Drain
19 DC1EXON I DCDC1 ON/OFF input VIN
20 PWRON I Power ON signal input VIN
21 VFB1 I Output voltage feedback input of DCDC converter -
22 GNDP1 G Ground GND
23 LX1 O DCDC converter switch output -
24 VINP1 PWR Power supply for LDOs VIN
25 VINA PWR Power supply VIN
26 GNDP2 G Ground GND
27 LX2 O DCDC converter switch output -
28 VINP2 PWR Power supply VIN
Function I/F Level Notes
Connect only
Capacitor load
Table 5-1 Pin Description
©2009 Rev. 1.4 Page 6
RN5T564 7-CHANNEL POWER MANAGEMENT IC
6. Power ON/OFF Operation
6.1 Power ON/OFF Operation
Power on/off Operation: Both “1ms” and “10ms” period of the following timing are min standards.
PWRON
Pull PS_HOLD "H" to keep power on before power-on factor goes low.
PSHOLD
Sync
PWRON
100us(max)
VCC33
(DCDC2 output )
90%
100us
10ms
Vcore
(DCDC1 output )
RESETO
LDO1,2,3
Note*1: Generating “L” pulse can be selected by trimming.
100ms
1ms 1ms
*1
Fig 6-1 Power ON/OFF Timing
(a) Power ON by external signal: PWRON pin
When PWRON pin becomes “H” in synchronization with the internal clock, the power-on sequence starts.
DCDC1, DCDC2, LDO1, LDO 2 and LDO 3 power on following the power-on sequence in the above timing chart.
After “L”pulse output of RESETO signal for 1ms, it need to push PSHOLD signal “H”.
The power-on state can be held by PSHOLD signal= “H” during PWRON＝“H”
Note*: The default of DC1ON (Refer to Table 10-1, 2) is “H".
When both DC1ON and DC1EXON are “H”, DCDC1 turns on.
The power-on sequence will be the following. (Refer to Fig. 6-1)
(b) Power OFF operation
If PSHOLD signal goes “L”, Power-off sequence will be asserted, and then DCDC1, LDO1, LDO2, LDO3, LDO4
and LDO5 turn off immediately. However, DCDC2 will turn off with 100 us of delay time.
©2009 Rev. 1.4 Page 7
RN5T564 7-CHANNEL POWER MANAGEMENT IC
6.2 UVLO (Under Voltage Lock Out) Electrical Characteristics
Operating Conditions (unless otherwise specified) Ta = 25℃
Symbol Parameter Condition Min Typ Max Units
V
V
V
Release
Detect
HYS
Under voltage lock out threshold VCCVIN rising 2.80 V
Under voltage lock out threshold VCCVIN falling 2.70 V
UVLO Hysteresis - 100 mV
Table 6-1 UVLO Electrical Characteristics
6.3 Thermal Shutdown Circuit Electrical Characteristics
Operating Conditions (unless otherwise specified) VIND = 3.6V
Symbol Parameter Condition Min Typ Max Units
T
DET
Detected
Temperature
- 140 ℃
T
RET
Return Temperature - 110 ℃
Table 6-2 Thermal Shutdown Circuit Electrical Characteristics
©2009 Rev. 1.4 Page 8
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