R5105N Series
Compact Watchdog Timer with VD
The R5105N Series are CMOS-based system power ICs with a voltage detector (VD) and watchdog timer (WDT) integrated in a single chip. R5105N monitors the power system of devices equipped with microprocessors and prevents system runaway with a reset signal when a malfunction occurs. The output delay time of the VD and watchdog timeout period/reset time can be adjusted high accuracy by an external capacitor.
FEATURES
• Supply Current (ISS) ························Typ. 11μA (VDD=-VDET+0.5V, |
• Output Delay Time (tPLH)················· Typ. 370ms (CD=0.1μF) |
Clock pulse input) |
• Output Delay Time Accuracy·········· ± 16% (-40°C ≤ Topt ≤ 105°C) |
• Operating Voltage Range (VDD) ······0.9V to 6.0V |
(WDT Section) |
(VD Section) |
• Watchdog Timeout Period (tWD)······ Typ. 310ms (CTW=0.1μF) |
• Detector Threshold Range (-VDET) ···1.5V to 5.5V (internally fixed) |
• Reset Hold Time of WDT (tWR) ······· Typ. 34ms (CTW=0.1μF) |
• Detector Threshold Accuracy ··········± 1% |
• Watchdog Timeout Period Accuracy···· ± 33% (-40°C ≤ Topt ≤ 105°C) |
• Temp. coeff. of Detector Threshold ···Typ. ± 100ppm/°C |
• Package ········································· SOT-23-6 |
(The above shows specification at Topt=25°C. Design assurance value at -40°C ≤ Topt ≤ 105°C is also available. For details, please refer to the datasheet.)
BLOCK DIAGRAMS
R5105Nxx1A
(Nch. open drain output)
VDD |
3 |
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CD |
6 |
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Vref2 |
Vref1 |
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5 |
GND |
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CTW |
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WATCHDOG |
CLOCK |
1 |
SCK |
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TIMER |
DETECTOR |
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RESETB 4 |
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R5105Nxx1C
(CMOS output)
VDD |
3 |
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CD |
6 |
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Vref2 |
Vref1 |
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5 |
GND |
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CTW |
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WATCHDOG |
CLOCK |
1 |
SCK |
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TIMER |
DETECTOR |
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RESETB 4 |
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TYPICAL APPLICATION
Power Supply |
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Microprocessor |
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VDD |
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R |
3 VDD |
RESETB |
4 |
RESET |
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R5105Nxx1A |
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Series |
SCK |
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I/O |
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CD |
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CD |
GND |
CTW |
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CTW |
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SELECTION GUIDE |
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TIMING CHART |
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Halogen Free |
Package |
Q'ty per Reel |
Part No. |
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SOT-23-6 |
3,000 pcs |
R5105N |
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1 |
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-TR-FE |
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.xx. |
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.xx : Specify the detector threshold within the range of 1.5V (.15.) to 5.5V (.55.) in 0.1V steps.
+VDET
VDD -VDET
. : Select the output type from (.A.) Nch. open drain or (.C.) CMOS. |
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tPHL |
tPHL |
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PACKAGE (Top View) |
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VCD |
+VTCD |
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SOT-23-6 |
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-VTCD |
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tWD |
tWDI |
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Vref2H |
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VCTW |
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Vref2L |
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1 |
SCK |
Watchdog timer clock input pin |
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CTW |
Ext. Cap. pin for setting reset and |
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watchdog timeout period of WDT |
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3 |
VDD |
Power supply pin |
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RESETB |
Output pin for Reset "L" signal |
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5 |
GND |
Ground pin |
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6 |
CD |
Ext. Cap. pin for setting output |
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delay time of VD |
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tPLH |
tPLH |
VSCK |
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tWR |
VRESETB |
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APPLICATION
• Monitoring of the power system of devices equipped with microprocessors
VTCD : Threshold voltage of CD pin when a power-on reset pulse inverting.Vref2H : CTW pin voltage at the end of WDT timeout period.
Vref2L : CTW pin voltage at the begin of WDT timeout period.tPHL : Output delay time
tWDI : tWD/10 (SCK pulses input during this period are ignored.)
No.EK-159-101001 |
CMOS Microprocessor Supervisory |
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