RICOH R2051 Technical data

R2051 SERIES

2 wire interface Real-Time Clock ICs with Battery Backup switch-over Function

NO.EA-104-070626

OUTLINE

The R2051 is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL and SDA, and
configured to perform serial transmission of time and calendar data to the CPU. Further, battery backup switchover
circuit and a voltage detector are incorporated. The periodic interrupt circuit is configured to generate interrupt
signals with six selectable interrupts ranging from 0.5 seconds to 1 month. The 2 alarm interrupt circuits generate
interrupt signals at preset times. As the oscillation circuit is driven under constant voltage, fluctuation of the
oscillator frequency due to supply voltage is small, and the time keeping current is small (TYP. 0.4µA at 3V). The
oscillation halt sensing circuit can be used to judge the validity of internal data in such events as power-on; The
supply voltage monitoring circuit is configured to record a drop in supply voltage below two selectable supply
voltage monitoring threshold settings. The 32.768kHz clock output function (CMOS output) is intended to output
sub-clock pulses for the external microcomputer. The oscillation adjustment circuit is intended to adjust time counts
with high precision by correcting deviations in the oscillation frequency of the quartz crystal unit. Battery backup
switchover function is the automatic switchover circuit between a main power supply and a backup battery of
primary or secondary battery. Switchover is executed by monitoring the voltage of a main power supply, therefore
the voltage of a backup battery voltage is not relevant. Since the package for these ICs is SSOP16 (5.0x6.4x1.25:
R2051Sxx), FFP12 (2.0x2.0x1.0: R2051Kxx), or TSSOP10G (4.0x2.9x1.0: R2051Txx), high density mounting of
ICs on boards is possible.

FEATURES

• Minimum Timekeeping supply voltage Typ. 0.75V (Max. 1.00V); VDD pin

• Low power consumption 0.4µA TYP (1.0µA MAX.)

• Built-in Backup switchover circuit (can be used for a primary battery, a secondary battery, or an electric double

layer capacitor)

• Only two signal lines (SCL and SDA) required for connection to the CPU. ( I

• Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days,

and weeks) (in BCD format)

• Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month)
to the CPU and provided with an interrupt flag and an interrupt halt (except R2051Txx)

• 2 alarm interrupt circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and
minute alarm settings) (except R2051Txx)

• Built-in voltage detector with delay

• With Power-on flag to prove that the power supply starts from 0V

• 32-kHz clock output pin (CMOS output. “H” level is always equal to VCC.)

• Supply voltage monitoring circuit with two supply voltage monitoring threshold settings

• Automatic identification of leap years up to the year 2099

• Selectable 12-hour and 24-hour mode settings

• High precision oscillation adjustment circuit

• Built-in oscillation stabilization capacitors (CG and CD)

• CMOS process

• Package SSOP16 (5.0mm x 6.4mm x 1.25mm : R2051Sxx), FFP12 (2.0mm x 2.0mm x 1.0mm : R2051Kxx)

TSSOP10G (4.0x2.9x1.0: R2051Txx)

at VDD=3V

2

C-Bus Interface, 400kHz)

1

R2051 Series

A

(NC)

(NC)

PIN CONFIGURATION

R2051Sxx(SSOP16)

NC

1

VSB

CLKOUT

SCL
SDA

VDCC

VSS

NC

2
3

4
5

6
7

8

16
15
14
13
12
11
10

TOP VIEW

BLOCK DIAGRAM

C2

VSB

R1

OSCIN

OSCOUT

BATTERY
VOLTAGE
MONITOR

9

CLOCK

VCC
VDD
NC
OSCIN
OSCOUT

NC
INTR

CIN

SW2

REAL

TIME

R2051Kxx(FFP12)

CIN

10

VSS

VDCC

VDD

11
12

OSCOUT

1

SD

8

2

SCL

OSCIN

7

3

INTR

9

CLKOUT

TOP VIEW

SW1

VOLTAGE

DETECTOR

DELAY

R2051Txx(TSSOP10G)

10

9
8
7

VCC
VDD
OSCIN
OSCOUT

CIN VSS

VSB

CLKOUT

VDD

6

VCC

5

VSB

4

SCL

SDA

1
2

3
4
5 6

TOP VIEW

CPU POWER

SUPLLY

VCC

C3

VDCC

SHIFTER

LEVEL

SCL

SDA

CLKOUT

CPU

2

CIN

C1

VSS

( ) are for the R2051Txx only

VOLTAGE

REFERENCE

INTR

SELECTION GUIDE

In the R2051xxx Series, output voltage and options can be designated.

Part Number is designated as follows:
R2051K01-E2 ←Part Number
↑ ↑ ↑
R2051abb-cc

Code Description

Designation of the package.

a

bb Serial number of Voltage detector setting etc.
cc Designation of the taping type. Only E2 is available.

Part Number Package -V

R2051K01-E2 FFP12 2.40(Typ.) P.6
R2051K02-E2 FFP12 2.80(Typ.) P.7
R2051S01-E2 SSOP16 2.40(Typ.) P.6
R2051S02-E2 SSOP16 2.80(Typ,) P.7
R2051S03-E2 SSOP16 4.00(Typ.) P.8
R2051T01-E2 TSSOP10G 2.40(Typ.) P.6

K: FFP12
S: SSOP16
T: TSSOP10G

DET1 (switch-over threshold) DC Electrical

R2051 Series

Characteristics

3

R2051 Series

PIN DESCRIPTION

R2051Kxx

(FFP12)

PIN

R2051Sxx

(SSOP16)

R2051Txx

(TSSOP10G)

Symbol Item Description

2 4 3 SCL Serial

Clock Line

1 5 4 SDA Serial

Data Line

9 10 -

INTR

Interrupt
Output

3 3 2 CLKOUT 32kHz Clock

Output

5 16 10 VCC Main Battery

input

4 2 1 VSB Power Supply

Input for
Backup Battery

7 13 8 OSCIN

Oscillation
Circuit

8 12 7 OSCOUT

Input / Output

6 15 9 VDD Positive Power

Supply Input

12 7 -

VDCC

VCC Power
Supply
Monitoring
Result Output

10 9 6 CIN Noise Bypass

Pin

11 8 5 VSS Negative

Power
Supply Input

- 1,6,

- NC No Connection

11,14

The SCL pin is used to input clock pulses
synchronizing the input and output of data
to and from the SDA pin. Allows a
maximum input voltage of 5.5 volts
regardless of supply voltage.
The SDA pin is used to input or output
data intended for writing or reading in
synchronization with the SCL pin. Up to

5.5v beyond VDD may be input. This pin
functions as an Nch open drain output.

INTR

The

pin is used to output alarm
interrupt (Alarm_W) and alarm interrupt
(Alarm_D) and output periodic interrupt
signals to the CPU. Disabled at
power-on from 0V. Nch. open drain
output.
The CLKOUT pin is used to output

32.768-kHz clock pulses. CMOS output.
“H” level is always equal to VCC.
Supply power to the IC.

Connect a primary battery for backup.
Normally, power is supplied from VCC to
the IC. If VCC level is equal or less than
–V

DET1, power is supplied from this pin.

The OSCIN and OSCOUT pins are used
to connect the 32.768-kHz quartz crystal
unit (with all other oscillation circuit
components built into the R2051).

The VDD pin is connected to the power
supply. Connect a capacitor as much as

0.1µF between VDD and VSS. In the case
of using a secondary battery, connecting
the secondary battery to this pin is
possible.
While monitoring VCC Power supply, if
the voltage is equal or lower than
–V

DET1, this output level is “L”. When

VDCC

becomes “L”, SW1 turns off
and SW2 turns on. As a result, power is
supplied from VSB pin to the internal real
time clock. When VCC is equal to +V

DET1

or more, SW1 turns on and SW2 turns off.
After t DELAY passed,

VDCC

output
becomes off, or “H”.ch Open-drain output.
To stabilize the internal reference,
connect a capacitor as much as 0.1µF
between this pin and VSS.
The VSS pin is grounded.

4

R2051 Series

ABSOLUTE MAXIMUM RATINGS

(VSS=0V)

Symbol Item Pin Name Description Unit

VCC Supply Voltage 1 VCC -0.3 to +6.5 V
VDD Supply Voltage 2 VDD -0.3 to +6.5 V
VSB Supply Voltage 3 VSB -0.3 to +6.5 V

Input Voltage 1 SCL, SDA -0.3 to +6.5 V VI
Input Voltage 2 CIN -0.3 to V

VO

IOUT Maximum Output Current VDD 10 mA
PD Power Dissipation
Topt Operating Temperature -40 to +85
Tstg Storage Temperature -55 to +125

*1) Except R2051Txx

Output Voltage 1
Output Voltage 2 CLKOUT -0.3 to V

INTR

Topt = +25°C

,

VDCC

*1)

-0.3 to +6.5 V

300 mW

DD+0.3 V

CC+0.3 V

°C
°C

RECOMMENDED OPERATING CONDITIONS

(VSS=0V, Topt=-40 to +85°C)

Symbol Item Pin Name Min, Typ. Max. Unit

Vaccess Supply Voltage VCC power supply

voltage for interfacing
with CPU

VCLK Minimum Timekeeping

Voltage
CGout,CDout=0pF

*2), *3)
fXT Oscillation Frequency 32.768 kHz
VPUP Pull-up Voltage

*1) -VDET1 in Vaccess specification is guaranteed by design.
*2) CGout is connected between OSCIN and VSS, CDout is connected between OSCOUT and VSS.
R2051 series incorporates the capacitors between OSCIN and VSS, between OSCOUT and VSS.
Then normally, CGout and CDout are not necessary.
*3) Quartz crystal unit: CL=6-8pF, R1=30KΩ
*4) Except R2051Txx

0.75 1.00 V

INTR

,

VDCC

*4)

-VDET1
*1)

5.5 V

5.5 V

5

R2051 Series

DC ELECTRICAL CHARACTERISTICS

• R2051K01, R2051S01, R2051T01

(Unless otherwise specified: VSS=0V,VCC=VSB=3.0V, 0.1uF between VDD and VSS, CIN and VSS,
Topt=-40 to +85°C)

Symbol Item Pin Name Conditions Min. Typ. Max. Unit

VIH “H” Input Voltage 0.8x

SCL,SDA

VCC

VIL “L” Input Voltage
IOH “H” Output

CLKOUT VOH=VCC-0.5V -0.5 mA

-0.3 0.2x

Current
IOL1 CLKOUT 0.5
IOL2 *2)

“L” Output

Current

INTR

IOL4 SDA
IOL3 *2)

VDCC

V

OL=0.4V

2.0

3.0

V

DD,VSB,VCC=2.0V

0.5

VOL=0.4V

IIL Input Leakage

SCL VI=5.5V or VSS -1.0 1.0

Current
IOZ1 Output Off-state

SDA VO=5.5V or VSS -1.0 1.0

Current 1
IOZ2 *2) Output Off-state

Current 2
ISB Time Keeping Current

at Backup mode

INTR

,

VDCC

VSB VCC=0V, VSB=3.0V,

O=5.5V or VSS

V

VDD, Output=OPEN

-1.0 1.0

0.4 1.0

Time keeping

ISBL Leakage Current of

Backup pin at

VCC_on
VDETH Supply Voltage

Monitoring Voltage

VSB VCC=3.0V,

VSB=5.5V or 0V,
VDD, Output=OPEN

VDD

Topt=+25°C

-1.00 1.00

1.90 2.10 2.30 V

“H”
VDETL Supply Voltage

Monitoring Voltage “L”

-VDET1 Detector Threshold

VDD
VCC

Topt=+25°C
Topt=+25°C

1.20 1.35 1.50 V

2.34 2.40 2.46 V
Voltage
(falling edge of VCC)

+VDET1 Detector Released

VCC

Topt=+25°C

2.44 2.52 2.60 V
Voltage (rising edge
of VCC)

∆VDET
∆Topt

Detector Threshold
and Released Voltage

VCC,
VSB

Topt=-40 to +85°C

*1)
Temperature
coefficient

VDDOUT1 VDD Output

Voltage 1

VDDOUT2 VDD Output

Voltage 2

CG Internal Oscillation

VDD
VDD

Topt=+25°C, V

CC=3.0V,

Iout=1.0mA

Topt=+25°C, V

CC=2.0V,

VSB=3.0V, Iout=0.1mA

CC

V

-0.12

SB

V

-0.08

OSCIN 10

Capacitance 1

CD Internal Oscillation

OSCOUT 10

Capacitance 2

*1) Guaranteed by design.
*2) Except R2051T01

5.5
V

VCC

mA

µA
µA
µA

µA

µA

±100

ppm

/°C

VCC

V

-0.04

VSB

V

-0.02
pF

6

R2051 Series

• R2051K02, R2051S02

(Unless otherwise specified: VSS=0V,VCC=3.3V, VSB=3.0V, 0.1uF between VDD and VSS, CIN and VSS,
Topt=-40 to +85°C)

Symbol Item Pin Name Conditions Min. Typ. Max. Unit

VIH “H” Input Voltage 0.8x

SCL,SDA

VCC

VIL “L” Input Voltage
IOH “H” Output

CLKOUT VOH=VCC-0.5V -0.5 mA

-0.3 0.2x

Current
IOL1 CLKOUT 0.5
IOL2

“L” Output

Current

INTR

IOL4 SDA
IOL3

VDCC

V

OL=0.4V

2.0

3.0

V

DD,VSB,VCC=2.0V

0.5

VOL=0.4V

IIL Input Leakage

SCL VI=5.5V or VSS -1.0 1.0

Current
IOZ1 Output Off-state

SDA VO=5.5V or VSS -1.0 1.0

Current 1
IOZ2 Output Off-state

Current 2
ISB Time Keeping Current

at Backup mode

INTR

,

VDCC

VSB VCC=0V, VSB=3.0V,

O=5.5V or VSS

V

VDD, Output=OPEN

-1.0 1.0

0.4 1.0

Time keeping

ISBL Leakage Current of

Backup pin at

VCC_on
VDETH Supply Voltage

Monitoring Voltage

VSB VCC=3.3V,

VSB=5.5V or 0V,
VDD, Output=OPEN

VDD

Topt=+25°C

-1.00 1.00

1.90 2.10 2.30 V

“H”
VDETL Supply Voltage

Monitoring Voltage “L”

-VDET1 Detector Threshold

VDD
VCC

Topt=+25°C
Topt=+25°C

1.20 1.35 1.50 V

2.73 2.80 2.87 V
Voltage
(falling edge of VCC)

+VDET1 Detector Released

VCC

Topt=+25°C

2.85 2.94 3.03 V
Voltage (rising edge
of VCC)

∆VDET
∆Topt

Detector Threshold
and Released Voltage

VCC,
VSB

Topt=-40 to +85°C

*1)
Temperature
coefficient

VDDOUT1 VDD Output

Voltage 1

VDDOUT2 VDD Output

Voltage 2

CG Internal Oscillation

VDD
VDD

Topt=+25°C, V

CC=3.3V,

Iout=1.0mA

Topt=+25°C, V

CC=2.0V,

VSB=3.3V, Iout=0.1mA

CC

V

-0.12

SB

V

-0.08

OSCIN 10

Capacitance 1

CD Internal Oscillation

OSCOUT 10

Capacitance 2

*1) Guaranteed by design.

5.5
V

VCC

mA

µA
µA
µA

µA

µA

±100

ppm

/°C

VCC

V

-0.04

VSB

V

-0.02
pF

7

R2051 Series

• R2051S03

(Unless otherwise specified: VSS=0V, VCC=5.0V, VSB=3.0V, 0.1uF between VDD and VSS, CIN and VSS,
Topt=-40 to +85°C)

Symbol Item Pin Name Conditions Min. Typ. Max. Unit

VIH “H” Input Voltage 0.8x

SCL,SDA

VCC

VIL “L” Input Voltage
IOH “H” Output

CLKOUT VOH=VCC-0.5V -0.5 mA

-0.3 0.2x

Current
IOL1 CLKOUT 0.5
IOL2

“L” Output

Current

INTR

IOL4 SDA
IOL3

VDCC

V

OL=0.4V

2.0

3.0

V

DD,VSB,VCC=2.0V

0.5

VOL=0.4V

IIL Input Leakage

SCL VI=5.5V or VSS -1.0 1.0

Current
IOZ1 Output Off-state

SDA VO=5.5V or VSS -1.0 1.0

Current 1
IOZ2 Output Off-state

Current 2
ISB Time Keeping Current

at Backup mode

INTR

,

VDCC

VSB VCC=0V, VSB=3.0V,

O=5.5V or VSS

V

VDD, Output=OPEN

-1.0 1.0

0.4 1.0

Time keeping

ISBL Leakage Current of

Backup pin at

VCC_on
VDETH Supply Voltage

Monitoring Voltage

VSB VCC=5.0V,

VSB=5.5V or 0V,
VDD, Output=OPEN

VDD

Topt=+25°C

-1.00 1.00

1.90 2.10 2.30 V

“H”
VDETL Supply Voltage

Monitoring Voltage “L”

-VDET1 Detector Threshold

VDD
VCC

Topt=+25°C
Topt=+25°C

1.20 1.35 1.50 V

3.90 4.00 4.10 V
Voltage
(falling edge of VCC)

+VDET1 Detector Released

VCC

Topt=+25°C

4.07 4.20 4.33 V
Voltage (rising edge
of VCC)

∆VDET
∆Topt

Detector Threshold
and Released Voltage

VCC,
VSB

Topt=-40 to +85°C

*1)
Temperature
coefficient

VDDOUT1 VDD Output

Voltage 1

VDDOUT2 VDD Output

Voltage 2

CG Internal Oscillation

VDD
VDD

Topt=+25°C, V

CC=5.0V,

Iout=1.0mA

Topt=+25°C, V

CC=2.0V,

VSB=3.0V, Iout=0.1mA

CC

V

-0.12

SB

V

-0.08

OSCIN 10

Capacitance 1

CD Internal Oscillation

OSCOUT 10

Capacitance 2

*1) Guaranteed by design.

5.5
V

VCC

mA

µA
µA
µA

µA

µA

±100

ppm

/°C

VCC

V

-0.04

VSB

V

-0.02
pF

8

R2051 Series

AC ELECTRICAL CHARACTERISTICS

Unless otherwise specified: VSS=0V,Topt=-40 to +85°C
Input and Output Conditions: V

Sym

Item Condi-

-bol

f

SCL Clock Frequency 100 400 kHz

SCL

t

SCL Clock Low Time 4.7 1.3

LOW

t

SCL Clock High Time 4.0 0.6

HIGH

t

Start Condition Hold

HD;STA

Time

t

SU;ST

O

t

SU;STA

Stop Condition Set Up
Time

Start Condition Set Up

Time

t

Data Set Up Time 250 200 ns

SU;DAT

t

HD;DA

T

t

PL;DAT

Data Hold Time 0 0 ns

SDA “L” Stable Time

After Falling of SCL

t

SDA off Stable Time

PZ;DAT

After Falling of SCL

tR Rising Time of SCL

and SDA (input)

tF Falling Time of SCL

and SDA (input)

tSP Spike Width that can

be removed with Input
Filter

t

Recovery Time from

RCV

Stop Condition to Start
Condition

t

DELAY

*2)

Output Delay Time of

Voltage Detector
*1) VCC voltage interfacing with CPU is defined by Vaccess (P.5 RECOMMENDED OPERATING CONDITIONS)
*2) Except R2051Txx
*) For reading/writing timing, see “P.34 Interfacing with the CPU •Data Transmission under Special Condition”.

IH=0.8×VCC,VIL=0.2×VCC,VOH=0.8×VCC,VOL=0.2×VCC,CL=50pF

CC≥1.7V *1) VCC≥2.5V *1)

V

Tions

Min. Typ. Max. Min. Typ. Max.

4.0 0.6

4.0 0.6

4.7 0.6

2.0 0.9

2.0 0.9
1000 300 ns
300 300 ns
50 50 ns

62 62

Time
Keeping

100 105 110 100 105 110 ms

Unit

µs
µs
µs

µs
µs

µs
µs

µs

9

R2051 Series

T

T

A

A

A

T

T

SCL

S

Sr P

SDA(IN)

SDA(OUT)

S

Sr

VCC

VDCC

t

LOW

t

PL;DA

t

SU;DA

t

HD;ST

Start Condition

Repeated Start Condition

+V

DET1

t

DELAY

Stop Condition

P

t

HIGH

t

HD;DA

t

PZ;DA

t

t

SU;ST

HD;ST

t

SP

t

SU;STO

10

PACKAGE DIMENSIONS

• R2051Kxx

9 7

R2051 Series

10

12

0.103

0.5

0.5

1PIN INDEX

2PIN INDEX

0.15

±

0.3

0.2±0.15

(BOTTOM VIEW)

6

0.05

4

3 1

0.35

0.1

±

2.0

0.35

0.25

1.0Max

0.17±0.1

0.27±0.15

2.0±0.1

unit: mm

11

R2051 Series

• R2051Sxx

5.0±0.3

0 to 10°

16

1

0.225typ

0.65

9

8

4.4±0.2

6.4±0.3

0.5±0.3

+0.1

0.15

-0.05

1.15±0.1

0.22

+0.1

-0.05

0.10

M

0.15

0.1±0.1

unit: mm

12

M

• R2051Txx

R2051 Series

2.9±0.2

10

1

0.2±0.1

0.5

6

5

0.1

0.15

0 to 10

2.8±0.2

4.0±0.2

°

0.55±0.2

+0.1

0.13

-0.05

(0.75)

-0.05

+0.1

0.85±0.15

0.1

unit: mm

13

R2051 Series

GENERAL DESCRIPTION

• Battery Backup Switchover Function

The R2051 has two power supply input, or VCC and VSB. With monitoring input voltage of VCC pin by internal

Voltage Detector, it is selected which power supply of VCC or VSB is used for the internal power source.

Refer to the next table to see the state of the backup battery and internal power supply’s state of the IC by each

condition.

V

CC≥VDET1 VCC<VDET1

VCC→RTC, VDD

VDCC

=OFF(H) (except R2051Txx)

As a backup battery, not only a primary battery such as CR2025, LR44, or a secondary battery such as ML614,

TC616, but also an electric double layered capacitor or an aluminum capacitor can be used. Switchover point is
judged with the voltage of the main power (VCC), therefore, if the backup voltage is higher than main supply
voltage, switchover can be realized without extra load to the backup power supply.

The case of back-up by
primary battery

The case of back-up by
capacitor or secondary battery
(Charging voltage is equal to CPU
power supply v oltage)

VSB→RTC, VDD

VDCC

=L (except R2051Txx)

The case of back - up by
capacitor or secondary battery
(Charging voltage is not equal to
CPU power supply v o ltage)

VCC

VSB

VDD

VSS

CPU Power
Supply

0.1µF

CR2025
etc.

VCC

VSB

VDD

VSS

CPU power
supply

0.1µF

ML614
etc.

VCC

VSB

VDD

VSS

CPU power
supply
(3V)

0.1µF

5V

Double layer
capacitor
etc.

• Interface with CPU

The R2051 is connected to the CPU by two signal lines SCL and SDA, through which it reads and writes data
from and to the CPU. Since the output of the I/O pin of SDA is open drain, data interfacing with a CPU different
supply voltage is possible by applying pull-up resistors on the circuit board. The maximum clock frequency of
400kHz (at V

DD=3V) of SCL enables data transfer in I2C-Bus fast mode. VCC falls down under -VDET1, the R2051

stops accessing with CPU.

• Clock and Calendar Function

The R2051 reads and writes time data from and to the CPU in units ranging from seconds to the last two digits of
the calendar year. The calendar year will automatically be identified as a leap year when its last two digits are a
multiple of 4. Consequently, leap years up to the year 2099 can automatically be identified as such.

*) The year 2000 is a leap year while the year 2100 is not a leap year.

14

R2051 Series

• Alarm Function

The R2051 incorporates the alarm interrupt circuit configured to generate interrupt signals to the CPU at preset
times. The alarm interrupt circuit allows two types of alarm settings specified by the Alarm_W registers and the
Alarm_D registers. The Alarm_W registers allow week, hour, and minute alarm settings including combinations of
multiple day-of-week settings such as "Monday, Wednesday, and Friday" and "Saturday and Sunday". The
Alarm_D registers allow hour and minute alarm settings. The Alarm_W outputs from

INTR

outputs also from
R2051Txx has Alarm_D and Alarm_W registers, but does not have

pin. Each alarm function can be checked from the CPU by using a polling function.

INTR

output pin.

INTR

pin, and the Alarm_D

• High-precision Oscillation Adjustment Function

The R2051 has built-in oscillation stabilization capacitors (CG and CD), that can be connected to an quartz
crystal unit to configure an oscillation circuit. Two kinds of accuracy for this function are alternatives. To correct
deviations in the oscillator frequency of the crystal, the oscillation adjustment circuit is configured to allow
correction of a time count gain or loss (up to ±1.5ppm or ±0.5ppm at 25°C) from the CPU. The maximum range is
approximately ±189ppm (or ±63ppm) in increments of approximately 3ppm (or 1ppm). Such oscillation frequency
adjustment in each system has the following advantages:

* Allows timekeeping with much higher precision than conventional RTCs while using a quartz crystal unit with
a wide range of precision variations.

* Corrects seasonal frequency deviations through seasonal oscillation adjustment.

* Allows timekeeping with higher precision particularly with a temperature sensing function out of RTC, through
oscillation adjustment in tune with temperature fluctuations.

• Power-on Reset, Oscillation Halt Sensing Function and Supply Voltage Monitoring Function

The R2051 has 3 power supply pins (VCC, VSB, VDD), among them, VCC pin and VDD pin have monitoring
function of supply voltage. VCC power supply monitoring circuit makes
pin becomes equal or lower than –V
after the delay time, tDELAY from when the VCC power supply pin becomes equal or more than +V
R2051Txx does not have

The R2051 incorporates an oscillation halt sensing circuit equipped with internal registers configured to record
any past oscillation halt, the oscillation halt sensing circuit, VDD monitoring flag, and power-on reset flag are useful
for judging the validity of time data.

Power on reset function reset the control resisters when the system is powered on from 0V. At the same time,
the fact is memorized to the resister as a flag, thereby identifying whether they are powered on from 0V or battery
backed-up.

The R2051 also incorporates a supply voltage monitoring circuit equipped with internal registers configured to
record any drop in supply voltage below a certain threshold value. Supply voltage monitoring threshold settings can
be selected between 2.1V and 1.35V through internal register settings. The sampling rate is normally 1s. The
oscillation halt sensing circuit is configured to confirm the established invalidation of time data in contrast to the
supply voltage monitoring circuit intended to confirm the potential invalidation of time data. Further, the supply
voltage monitoring circuit can be applied to battery supply voltage monitoring.

VDCC

DET1. At the power-on of VCC, this circuit makes

output pin.

VDCC

pin “L” when VCC power supply

VDCC

pin turn off, or “H”

DET1.

• Periodic Interrupt Function

The R2051 incorporates the periodic interrupt circuit configured to generate periodic interrupt signals aside from
interrupt signals generated by the periodic interrupt circuit for output from the
have five selectable frequency settings of 2 Hz (once per 0.5 seconds), 1 Hz (once per 1 second), 1/60 Hz (once
per 1 minute), 1/3600 Hz (once per 1 hour), and monthly (the first day of every month). Further, periodic interrupt
signals also have two selectable waveforms, a normal pulse form (with a frequency of 2 Hz or 1 Hz) and special

INTR

pin. Periodic interrupt signals

15

R2051 Series

form adapted to interruption from the CPU in the level mode (with second, minute, hour, and month interrupts). The
condition of periodic interrupt signals can be monitored with using a polling function. R2051Txx has the periodic

INTR

interrupt registers, but does not have

output pin.

• 32kHz Clock Output

The R2051 incorporates a 32-kHz clock circuit configured to generate clock pulses with the oscillation frequency
of a 32.768kHz quartz crystal unit for output from the CLKOUT pin (CMOS push-pull output). The 32-kHz clock
output is always enabled and the “H” level of the CLKOUT pin is same as VCC power supply.

16

R2051 Series

A

A

A

Address Mapping

Address Register Name D a t a
A3A2A1A0 D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 0 Second Counter -

*2)
1 0 0 0 1 Minute Counter - M40 M20 M10 M8 M4 M2 M1
2 0 0 1 0 Hour Counter - - H20

3 0 0 1 1 Day-of-week

Counter

4 0 1 0 0 Day-of-month

Counter

5 0 1 0 1 Month Counter and

Century Bit
6 0 1 1 0 Year Counter Y80 Y40 Y20 Y10 Y8 Y4 Y2 Y1
7 0 1 1 1 Oscillation

Adjustment

Register *3)
8 1 0 0 0 Alarm_W

(Minute Register)
9 1 0 0 1 Alarm_W

(Hour Register)
A 1 0 1 0 Alarm_W

(Day-of-week

Register)
B 1 0 1 1 Alarm_D

(Minute Register)
C 1 1 0 0 Alarm_D

(Hour Register)
D 1 1 0 1 - - - - - - - -

E 1 1 1 0 Control Register 1

*3)
F 1 1 1 1 Control Register 2

*3)

Notes:
* 1) All the data listed above accept both reading and writing.
* 2) The data marked with "-" is invalid for writing and reset to 0 for reading.
* 3) When the PON bit is set to 1 in Control Register 2, all the bits are reset to 0 in Oscillation Adjustment
Register, Control Register 1 and Control Register 2 excluding the
* 4) When DEV=0, the oscillation adjustment circuit is configured to allow correction of a time count gain or

loss up to ±1.5ppm. When DEV=1, the oscillation adjustment circuit is configured to allow correction
of a time count gain or loss up to or ±0.5ppm.

* 5) PON is a power-on-reset flag.

- - - - - W4 W2 W1

- - D20 D10 D8 D4 D2 D1

19

DEV
*4)

- WM40 WM20 WM10 WM8 WM4 WM2 WM1

- - WH20

- WW6 WW5 WW4 WW3 WW2 WW1 WW0

- DM40 DM20 DM10 DM8 DM4 DM2 DM1

- - DH20

WALE DALE
VDSL VDET

S40 S20 S10 S8 S4 S2 S1

H10 H8 H4 H2 H1

P/

- - MO10 MO8 MO4 MO2 MO1

/20

F6 F5 F4 F3 F2 F1 F0

WH10 WH8 WH4 WH2 WH1

WP/

DH10 DH8 DH4 DH2 DH1

DP/

12

XST

/24

SCRA

TCH2
PON
*5)

XST

TEST CT2 CT1 CT0

SCRA
TCH1

bit.

CTFG WAFG DAFG

17

R2051 Series

Register Settings

• Control Register 1 (Address Eh)

D7 D6 D5 D4 D3 D2 D1 D0

WALE DALE
WALE DALE

0 0 0 0 0 0 0 0 Default Settings *)
*) Default settings: Default value means read / written values when the PON bit is set to “1” due to VDD
power-on from 0 volts.

12
12

/24
/24

(1) WALE, DALE Alarm_W Enable Bit, Alarm_D Enable Bit

WALE,DALE Description

0 Disabling the alarm interrupt circuit (under the control of the settings

of the Alarm_W registers and the Alarm_D registers).

1 Enabling the alarm interrupt circuit (under the control of the settings

of the Alarm_W registers and the Alarm_D registers)

12

(2)

Setting the

Setting the

/24

12

/24 Description

0 Selecting the 12-hour mode with a.m. and p.m. indications. (Default)
1 Selecting the 24-hour mode

12

/24 bit to 0 and 1 specifies the 12-hour mode and the 24-hour mode, respectively.

24-hour mode 12-hour mode 24-hour mode 12-hour mode

00 12 (AM12) 12 32 (PM12)
01 01 (AM 1) 13 21 (PM 1)
02 02 (AM 2) 14 22 (PM 2)
03 03 (AM 3) 15 23 (PM 3)
04 04 (AM 4) 16 24 (PM 4)
05 05 (AM 5) 17 25 (PM 5)
06 06 (AM 6) 18 26 (PM 6)
07 07 (AM 7) 19 27 (PM 7)
08 08 (AM 8) 20 28 (PM 8)
09 09 (AM 9) 21 29 (PM 9)
10 10 (AM10) 22 30 (PM10)
11 11 (AM11) 23 31 (PM11)

12

/24 bit should precede writing time data

12

/24-hour Mode Selection Bit

(3) SCRATCH2 Scratch Bit 2

SCRATCH2 Description

0 (Default)

1
The SCRATCH2 bit is intended for scratching and accepts the reading and writing of 0 and 1.
The SCRATCH2 bit will be set to 0 when the PON bit is set to 1 in the Control Register 1.

(4) TEST Test Bit

TEST Description

0 Normal operation mode. (Default)

1 Test mode.
The TEST bit is used only for testing in the factory and should normally be set to 0.

SCRA

TCH2

SCRA

TCH2

TEST CT2 CT1 CT0 (For Writing)
TEST CT2 CT1 CT0 (For Reading)

(Default)

18