richtek RT9992 Datasheet

Preliminary

5+2 Channel DC/DC Converters for DV

RT9992

General Description

This is a 5+2CH integrated PMIC for DV a pplication. There
are 5 DC/DC converters : one synchronous step-up, one
selectable synchronous step-up/step-down, two
synchronous step-downs, and one WLED driver in either
asynchronous ste p-up or current source mode, selectable
by VOUT6 initial voltage. In addition, there are 2 LDO
regulators : one RTC LDO and one generic LDO. The
generic LDO can choose internal feedba ck loop for fixed
output 2.5V or external feedback loop for customized
output voltage. Both low voltage synchronous step-up
converters are with load disconnect function. All power
MOSFETs and compensation networks are integrated.
There is a power good indicator to monitor FB2, FB3, and
FB4 voltage status. CH1 to CH5 enabling ca n be controlled
flexibly : enabled independently or in preset sequences.

Ordering Information

RT9992

Package Type

QW : WQFN-32L 4x4 (W-Type)

Operating Temperature Range

G : Green (Halogen Free with Commer­ cial Standard)
Z : Cu wire and Green (Halogen Free
with Commer-cial Standard)

Note :
Richtek Green products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

Pin Configurations

(TOP VIEW)

Features

zz

All Power MOSFETs Integrated

z

zz

zz

z 5 Channels with Internal Compensation

zz

zz

z Flexible Enabling Control

zz

``

` Enabled Independently or in Preset Power On/

``

Off Sequences

zz

z CH2 Synchronous Converter in Step-Up or Step-

zz

Down Mode Selectable by SEL Pin

zz

z Synchronous Step-Down DC/DC Converter

zz

``

` Up to 95% Efficiency

``

``

` 100% (max) Duty Cycle

``

zz

z Synchronous Step-Up DC/DC Converter

zz

``

` Adjustable Output Voltage

``

``

` Up to 95% Efficiency

``

zz

z Asynchronous Step-Up Converter to Drive WLED,

zz

Selectable Between Step-Up or Current Source

``

` LED Open Protection (OVP6) in Step-Up Mode

``

``

` PWM Dimming Control

``

zz

z Load Disconnect Function for CH1 and CH2

zz

Synchronous Step-Up Converter

zz

z Fixed 2MHz Switching Frequency for CH1, CH2,

zz

CH3, and CH4

zz

z Fixed 1MHz Switching Frequency for CH6

zz

zz

z Generic LDO (CH5)

zz

``

` Output Voltage : Fixed 2.5V or Set by External

``

Feedback Network, Determined by FB5 Initial
Voltage

zz

z RTC LDO : Fixed Output Voltage 3.1V

zz

zz

z Power Good Indicator to Monitor Output Voltage

zz

Status of CH2, CH3, and CH4

zz

z 32-Lead Package

zz

zz

z RoHS Compliant and Halogen Free

zz

Applications

LX1

PVDD1

BAT

32

1

FB1

PGOOD

VOUT5
PVDD5

2
3

FB5

4
5
6

EN5

7

SEQ FB3

8

LX2 FB4

9

PVDD2 EN1

GND

10 11 12 13

EN2

VIN2

FB2

27

33

14

SEL

PVDD4 PVDD6

25

152616

LX4 VDDM

EN4 FB6

24
23
22
21
20
19
18
17

VOUT6
LX6
EN6
PVDD3
LX3
EN3

RTCPWR

31 30 29 28

WQFN-32L 4x4

DS9992-P04 May 2010 www.richtek.com

z CMOS D V
z Gaming

Marking Information

ES= : Product Code

ES=YM

DNN

YMDNN : Date Code

1

RT9992

Typical Application Circuit

For 2AA :

R10

BAT

R11

R12

100k

L6

10µH

V

EN1234

C15

0.1µF

C16

1µF

C18

4.7pF

V
V

V

V

C1

1µF

C2

1µF

BAT

BAT
EN5

BAT

5V

D4

1µF

3V

3.3V

V

BAT

R13

10

Chip Enable

3.1V

3.3V

C17

1µF

C14

1µF

D1
D2
D3

V

909k

180k

2

PGOOD

23

LX6

24

VOUT6

25

FB6

29

BAT

26

VDDM

32

EN1

11

EN2

19

EN3

16

EN4

6

EN5

22

EN6

7

SEQ

27

PVDD6

13

SEL

28

RTCPWR

5

PVDD5

4

VOUT5

3

FB5

Preliminary

RT9992

LX1

PVDD1

FB1

PVDD2

FB2

VIN2

LX2

PVDD3

LX3

FB3

PVDD4

LX4

FB4

GND

L1

2.2µH

31

C5

C3

10µF

R3
470k

R4

150k

C7
10µF

C8
10µF

C9
10µF

C11
10µF

C12
10µF

30

10µF x 2

1

9

12

10

L2

2.2µH

8

21

L3

2.2µH

20

18

14

L4

2.2µH

15

17

33 (Exposed Pad)

R1
470k

R2

88.7k

C6
10µF*2

C18

4.7pF

R5
470k

R6
374k

R7
187k

R8
374k

C4

4.7pF

C10
33pF

C13
82pF

V

BAT

5V

3.3V

V

BAT

5V/3.3V

1.8V

V

BAT

1.2V

For above circuit, the power sequence is CH1 CH3 CH4 CH2, while CH5 remains independent.

→ → →

For other power sequence combinations, refer to the power on/ff sequence section in a pplication information.

DS9992-P04 May 2010www.richtek.com

2

For Li+ :

3.3V

V

BAT

V

BAT

C1

1µF

5V

Chip Enable

V

BAT

3.1V

0.1µF

3.3V

2.5V

1µF

C15

C16

1µF

C17

1µF

R10

100k

D5

C2

V

EN1

V

EN2

V

EN3

V

EN4

V

EN5

2

PGOOD

13

SEL

29

BAT

27

PVDD6

25

FB6

26

VDDM

32

EN1

11

EN2

19

EN3

14

EN4

6

EN5

22

EN6

23

LX6

24

VOUT6

7

SEQ

3

FB5

28

RTCPWR

5

PVDD5

4

VOUT5

Preliminary

RT9992

LX1

PVDD1

FB1

PVDD2

LX2

FB2

VIN2

PVDD3

LX3

FB3

PVDD4

LX4

FB4

GND

L1

2.2µH

31

C3

10µF

C7
10µF

C9
10µF

C12
10µF

30

10µF x 2

1

9

L2

2.2µH

8

12

R9

470k

10

21

L3

2.2µH

20

18

14

L4

2.2µH

15

17

33 (Exposed Pad)

C5

C6
10µF

C8
10µF

C11
10µF

R1
470k

R2

88.7k

R3
470k

R4
150k

R5
470k

R6
374k

R7
187k

R8
374k

C4

4.7pF

C18
10pF

C10
33pF

C13
82pF

RT9992

V

BAT

5V

V

BAT

3.3V

V

BAT

1.8V

V

BAT

1.2V

For above circuit, all channels are independently ena ble/disable.
For other power sequence combinations, refer to the power on/ff sequence section in a pplication information.

DS9992-P04 May 2010 www.richtek.com

3

RT9992

Table 1. Recommended Components for the Typical Application Circuit

Channel CH3

Calculation V

V

(V) 2.5 1.8 1.5 1.3 1.2 1

OUT

L3 (μH) 2.2 2.2 2.2 2.2 2.2 2.2
R5 (kΩ) 768 470 330 237 187 23.2
R6 (kΩ) 360 374 374 374 374 93.1
C9 (μF) 10 10 10 10 10 10

C10 (pF) 22 33 47 68 82 47

Preliminary

OUT_CH3

= (1+R5/R6) x 0.8V

Channel CH4

Calculation V

V

(V) 2.5 1.8 1.5 1.3 1.2 1

OUT

L4 (μH) 2.2 2.2 2.2 2.2 2.2 2.2
R7 (kΩ) 768 470 330 237 187 23.2

R8 (kΩ) 360 374 374 374 374 93.1
C12 (μF) 10 10 10 10 10 10
C13 (pF) 22 33 47 68 82 47

OUT_CH4

= (1+R7/R8) x 0.8V

Where C9, C12 are C
C10, C13 are feedforward ca p between output and FB
R5, R7 are the feedback resistor between output and FB
R6, R8 are the feedback resistor between GND and FB

OUT

,

DS9992-P04 May 2010www.richtek.com

4

Preliminary

Functional Pin Description

Pi n N o . Pi n N a m e Pi n Fun cti on

1 FB1 Feedback In put Pin of CH1. High impedance in shutdown.
2 PG OOD Power Good Indicator Output Pin (Open Drain).
3 FB5 Feedback In put Pin of CH5. High Impedance in Shutdow n.
4 VO UT5 Output Pin f or CH5. High Impedance in Shutdown.
5 PVD D5 Po we r Input Pin of CH5.
6 EN5 E nab le Pin of CH5.

7 SEQ
8 LX2 Switch Node of CH2. Hig h Impedance in Shutdown .
9 PVDD2

10 VIN2 Powe r Input N ode of CH2 in Step- Up.
11 EN2 Enable Pin of CH2 or Enable Pi n of Preset On/Off Seq uence.
12 FB2 Fee dback In put Pin of CH2. High Impedance in Shut dow n.

13 SEL
14 PVD D4 Po we r Input Pin of CH4.

15 LX4 Switch Node of CH4. Hig h Impedance in Shu td own.
16 EN4 Enable Pin of CH4 or Select which P re set On/O f f Sequenc e.
17 FB4 Fee dback In put Pin of CH4. High Impedance in Shut dow n.
18 FB3 Fee dback In put Pin of CH3. High Impedance in Shut dow n.
19 EN3 Enable Pin of CH3 or Select which P re set On/O f f Sequenc e.
20 LX3 Switch Node of CH3. Hig h Impedance in Shu td own.
21 PVD D3 Po we r Input Pin of CH3.
22 EN6 Enable Pin of CH6 and PWM Di mming Input Signal Pin.
23 LX6 Switch Node of CH6 in St ep- Up Mode. High Impedance in Shutdown.

24 VOUT6
25 FB6
26 VDDM

27 PVD D6 Po we r Input Pin of CH6 NMO S D river.
28 RTCPWR RTC Power Output Pin.
29 BAT Battery Power Input Pin and CH1 Step-Up Power Input Node.
30 PVD D1 Po we r Output Pin of CH1.
31 LX1 Switch Node of CH1. Hig h Impedance in Shu td own.
32 EN1 Enable Pin of CH 1.
33

(Exposed pad)

GND

SEQ = H to use preset power on/off sequence. SEQ = L to independently
enable CH1 to 5. Logic state can’t be chang ed dur ing opera tion.

Power Input Pin of CH2 in Step-Down or Power Output Pin of CH2 in
Step-Up.

Select Pin to Define CH2 in Step-Down (SEL = H) or Step-Up (SEL = L)
Mode. Logic state can’t be chang ed during oper at io n.

Sense Pi n fo r CH6 Output V o l tag e in Step- U p M ode and CH6 Mod e Sel ect ion
Pin.
Feedback Input Pin of CH6 in Step-Up Mode or Current Sink Pin of CH6 in
Current Source Mode.
Internal Control Circuit Power Pin. That must connect to a bypass capacitor
for better noise r ejection.

Ground. The exposed pa d must be soldered to a larg e PC B and connected to
GND for maxi mum po wer dissipation.

RT9992

DS9992-P04 May 2010 www.richtek.com

5

RT9992

Function Block Diagram

Preliminary

BATPVDD6 VDDM

PGOOD

LX6

VOUT6

FB6

EN6

EN1
EN2
EN3
EN4
EN5
SEL

SEQ

FB2

VDDM

Power

Good

FB3 FB4

30mA

CH6

Step-Up

+

Current Source

+

PWM Dimming

0.25V
REF

Power ON/Off

Sequence Control

Logic Block

-

VDDM

+

VDDM

VDDI

UVLO

VDDI

VDDM

CH1
C-Mode
Step-Up

VDDM

CH2
C-Mode
Step-Up

or

Step-Down

VDDM

PVDD1

Body

Diode

Control

-

0.8V

+

REF

Body

Diode

Control

-

0.8V

+

REF

BAT

LX1

FB1

PVDD2

VIN2

LX2

FB2

PVDD3

RTCPWR

PVDD5
VOUT5

int

ext

FB5

CH5
SEL

GND

RTC_LDO

w/Body Diode Control

CH5
LDO

-

0.5V
REF

+

CH3
C-Mode

Step-Down

VDDM

CH4
C-Mode

Step-Down

LX3

-

0.8V

+

REF

-

0.8V

+

REF

FB3

PVDD4

LX4

FB4

DS9992-P04 May 2010www.richtek.com

6

Preliminary

RT9992

Absolute Maximum Ratings (Note 1)

z Supply V oltage, VDDM--------------------------------------------------------------------------------------------------- −0.3V to 7V
z LX1, LX2,LX3,LX4 ---------------------------------------------------------------------------------------------------------- −0.3V to 7V

< 20ns------------------------------------------------------------------------------------------------------------------------ −0.3V to 10V

z LX6, VOUT6 ---------------------------------------------------------------------------------------------------------------- −0.3V to 21V

< 20ns------------------------------------------------------------------------------------------------------------------------ −8V to 24V

z Other Pins------------------------------------------------------------------------------------------------------------------- −0.3V to 7V
z Power Dissipation, P

D

WQFN−32L 4x4------------------------------------------------------------------------------------------------------------ 1.923W

z Package Thermal Resistance (Note 2)

WQFN−32L 4x4, θJA------------------------------------------------------------------------------------------------------ 52°C/W
WQFN−32L 4x4, θJC------------------------------------------------------------------------------------------------------ 7°C/W

z Junction T emperature----------------------------------------------------------------------------------------------------- 150°C
z Lead T e mperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 2 60 °C
z Storage T emperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 3)

HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Ma chine Mode)------------------------------------------------------------------------------------------------------ 200V

@ T

= 25°C

A

Recommended Operating Conditions (Note 4)

z Supply V oltage VDDM---------------------------------------------------------------------------------------------------- 2.7V to 5.5V
z Junction T emperature Range-------------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient T emperature Range-------------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics

(V

= 3.3V, TA = 25°C, unless otherwise specified)

DDM

Parameter Symbol Test Conditions Min Typ Max Unit

Supply Voltage

VDD M Startu p Voltage VST For Bootstrap, First Rising 1.5 -- -- V

Supply C urr ent

Shutdown Supply Current into
BAT (including RTC LDO
quiescent current)

Shutdown Supply Current into
PVDD6

Shutdown Supply Current into
VDDM

CH1 (Syn chronous Step-Up)
Supply Current into VDDM

CH2 (Syn chronous Step-Up or
Step -Down) Su pply Current
into VDDM

CH3 (Syn chronous
Step-Down)
Supply Current into VDDM

V

V

I

ENx = 0, V

OFF

I

Q1

I

Q2

I

Q3

= 4.2V, V

BAT

= 4.2V, V

BAT

SEQ

Non Switching, V
V

= 0.9V, V

FB1

Non Switching, V

= 0.9V, V

V

FB2

Non Switching, V
V

= 0.9V, V

FB3

= 3V -- 7 20 μA

PVDD6

PVDD6

< V

-- -- 1 μA

BAT

= 0V, SEL = 0V -- 1 10 μA

= 3.3V,

SEQ

SEQ

SEQ

EN1

= 0V

EN2

= 0V

EN3

= 0V

= 3.3V,

= 3.3V,

-- -- 800 μA

-- -- 800 μA

-- -- 800 μA

To be continued

DS9992-P04 May 2010 www.richtek.com

7

RT9992

Preliminary

Parameter Symbol Test Conditions Min Typ Max Unit

CH4 (Synchronous Step-Down)
Supply Current into VDDM

CH6 (WLED) in Current Source Mode
Supply Current into VDDM

I

Q4

V

I

Q6c

CH6 (WLED) in Asynchronous
Step-Up Mode Supply Current into

I

Q6b

VDDM

Oscillator

CH1, 2, 3, 4 O perat ion Frequency f
CH6 Operation Frequency f

1800 2000 2200 kHz

OSC

900 1000 1100 kHz

OSC6

CH1 Maximum Duty Cy cle (Step-Up) V
CH2 Maximum Duty Cy cle (Step-Up) V

CH2 Maximum Duty Cy cle
(Step-Down)
CH3 Maximum Duty Cy cle
(Step-Down)
CH4 Maximum Duty Cy cle
(Step-Down)

V

V

V

CH6 Maximum Duty Cy cle (Step-Up) V

Feedback and output Regulation Voltage

Feedback Regulation Voltage @ FB1,
FB2, FB3, and FB4

0.788 0.8 0.812 V

Sink Current into FB6 (CS mode) V
Dropout Voltage @ FB6 (CS mode)
Feedback Regulation Voltage @ FB6 V

V

FB6

Power Switch

SEQ

OUT6

EN4

= 0V

= 0V

= 3. 3V,

-- -- 800 μA

-- -- 600 μΑ

Non Switching, V

= 0.9V, V

V

FB4

= 3.3V, V

EN6

Non switching,
V

= 3.3V, V

EN6

= 0.35V,

FB6

-- -- 800 μΑ

VOUT6 = 1V

= 0.7V 80 83.5 87 %

FB1

= 0.7V 80 83.5 87 %

FB2

= 0.7V -- -- 100 %

FB2

= 0.7V -- -- 100 %

FB3

= 0.7V -- -- 100 %

FB4

= 0.15 V, V

FB6

= 0V, Current Source 28.5 30 31.5 mA

OUT6

V

OUT6

= 0V, V

DDM

Current Source

= 1V. Step-Up 0.237 0.25 0.263 V

OUT6

= 1V 91 93 97 %

OUT6

= 3.3V,

-- -- 0.6 V

CH1 On Resistance of MOSFET R

CH1 Current Limitation (Step-Up) I

CH2 On Resistance of MOSFET R

CH2 Current Limitation (Step-Down) I
CH2 Current Limitation (Step-Up) I

CH3 On Resistance of MOSFET R

CH3 Current Limitation (Step-Down) I

CH4 On Resistance of MOSFET R

CH4 Current Limitation (Step-Down) I
CH6 On Resistance of MOSFET R

CH6 Current Limitation I

8

P-MOSFET, V

DS(ON)

2.2 3 4 A

LIM1

N-MOSFET,
V

PVDD1

= 3. 3V

P-MOSFET, V

DS(ON)

LIM2_D
LIM2_U

N-MOSFET,

PVDD2

= 3. 3V

V

1 1.5 2 A

1.5 2.1 3.0 A
P-MOSFET, V

DS(ON)

1 1.5 2 A

LIM3

N-MOSFET,

PVDD3

= 3.3V

V

P-MOSFET, V

DS(ON)

1.5 2 2.4 A

LIM4

DS(ON)

N-MOSFET 0.6 0.8 1 A

LIM6

N-MOSFET, V

N-MOSFET -- 0.75 1.1 Ω

= 3.3V -- 200 300 mΩ

PVDD1

-- 130 250 mΩ

= 3.3V -- 400 550 mΩ

PVDD2

-- 260 400 mΩ

= 3.3V -- 370 500 mΩ

PVDD3

-- 300 400 mΩ

= 3.3V -- 240 400 mΩ

PVDD4

= 3.3V -- 140 250 mΩ

PVDD4

To be continued

DS9992-P04 May 2010www.richtek.com

Preliminary

RT9992

Parameter Symbol Test Conditions Min Typ Max Unit

Protection

Over Voltage Protection
PVDD1,PVDD2 (CH2 in Step-Up)

Over Voltage Protection @ VOUT6 V
Under Voltage Protection @ FB1,

FB2, FB3, FB4
Under Voltage Protection @ FB5 V

5.9 6.15 6.4 V
Step-Up 17 19 21 V

OVP6

V

UVP1234

UVP5

-- 0.4 -- V

-- 0.3 -- V

VDDM Over Voltage Protection 5.9 6.15 6.4 V

VDDM UVLO Threshold

BAT UVLO Threshold

VDDM Rising 2.4 2.7 V
VDDM Falling 1.7 2.1 2.4 V
BAT Rising 1.3 1.4 1.5 V
BAT Falling 1.2 1.3 1.4 V

Protection Fault Delay Except OVP1/2 -- 100 -- ms

Control

EN1 to 6,
SEL,SEQ
Threshold Voltage

Logic-High VIH 1.3 -- -- V
Logi c-Low V

-- -- 0.4 V

IL

EN1 to 5, SEL, SEQ Sink Current -- 1 6 μA
EN6 Sink Current -- 4 20 μA
EN6 Low Time for Shutdown t

-- 32.7 -- ms

SHDN

EN6 High Time for CH6 Enable -- 1.2 5 μs

Thermal Protection

Thermal Shutdown TSD 125 160 -- °C
Thermal Shutdown Hysteresis ΔTSD -- 20 -- °C

CH5 LDO (C

Input Voltage Range (PVDD5) V
Output Voltage Range V

Fe edb ac k Regulatio n Volta ge @
FB5
Regulated Output Voltage @
VOUT5

FB5 Thresh old to Sele ct Int er na l
Feedback Network

Max Cu rr ent Lim it I
Drop out Volt age I
Soft-Start Time t

PSRR+

= 1μF for Better Stability)

OUT

2.7 -- 5.5 V

PVDD5

By external feedback 1.5 -- 3.3 V

OUT5

V

Using external feedback loop 0.493 0.5 0.507 V

FB5

Using internal feedback loop 2.45 2.5 2.55 V

V

REG5

(Note : before enabled, V
0 .8V. Then CH5 uses internal

FB5

>

0.8 -- -- V

feedback)

V

LIM5

OUT

V

SS5

I

OUT

V

= 3.3V 200 300 400 mA

PVDD5

= 100mA 60 100 120 mV
= 0 to 0.5V -- 2.4 -- ms

FB5

= 10mA, V

= 2.5V , 1kHz

OUT

PVDD5

= 3.3V,

-- −55 -- db

To be continued

DS9992-P04 May 2010 www.richtek.com

9

RT9992

Preliminary

Parameter Symbol Test Conditions Min Typ Max Unit

RTC LDO for RTCPWR (Keep On Once Bat Connect)

Input Voltage Range V
Quiescent Current IQ V
Regulated Output Voltage @
RTCPWR
Max Outpu t Current
(Current Limit)

Drop out Volt age V

Max of BAT and PVDD6 -- -- 5.5 V

DDI

= 4.2V -- 5 8 μA

DDI

I

V

DROP

= 0mA 3.0 3.1 3.2 V

OUT

= 4.2V 60 105 200 mA

DDI

I

= 50mA -- -- 700 mV

OUT

I

= 10mA -- 40 120 mV

OUT

= 3mA -- -- 40 mV

I

OUT

Power Good In dicator

FB2 Regulation Threshold For PGOOD Go Low 0.64 0.68 0.72 V
FB2 Hysteresis -- 40 -- mV
FB3 Regulation Threshold For PGOOD Go Low 0.64 0.68 0.72 V
FB3 Hysteresis -- 40 -- mV
FB4 Regulation Threshold For PGOOD Go Low 0.64 0.68 0.72 V
FB4 Hysteresis -- 40 -- mV
PGOOD Rising Delay Time -- 10 -- ms
PGOOD Sink Capability V

DDM

= 3. 3V, V

PGOOD

= 0.5V 4 -- -- mA

Soft-St art Time

CH1 Soft-Start Time t
CH2 Soft-Start Time t

CH3 Soft-Start Time t

V

SS1

V

SS2

V

SS3

= 0 t o 0.8 V 2. 8 3 .5 4. 2 m s

FB1

= 0 t o 0.8 V 2. 8 3 .5 4. 2 m s

FB2

= 0 t o 0.8 V 2. 8 3 .5 4. 2 m s

FB3

CH4 Soft-Start Time t

Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.

Note 2. θJA is measured in natural convection at T

JEDEC 51-7 thermal measurement standard. The measurement case position of θ
package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

V

SS4

= 25°C on a high-effective thermal conductivity four-layer test board of

A

= 0 t o 0.8 V 2. 8 3 .5 4. 2 m s

FB4

is on the exposed pad of the

JC

10

DS9992-P04 May 2010www.richtek.com

Preliminary

Application Information

The RT9992 includes the following four DC/DC converter
channels, two LDOs, and one WLED driver to build a
multiple-output power-supply system.

CH1 : Step-up synchronous current mode DC/DC converter
with internal power MOSFET s and compen sation network.
The P-MOSFET body can be controlled to disconnect the
load.

CH2 : Selectable step-up or step-down synchronous
current mode DC/DC converter with internal power
MOSFETs and compensation network. The P-MOSFET
body can be controlled to disconnect the load.

CH3 : Step-down synchronous current mode DC/DC
converter with internal power MOSFETs and internal
compensation network.

CH4 : Step-down synchronous current mode DC/DC
converter with internal power MOSFETs and internal
compensation network.

CH5 : Generic LDO that provides either fixed 2.5V output
or adjustable output voltage via external feedba ck network,
depending on initial by FB5 voltage prior to becoming
enabled.

CH6 : WLED driver operable in either current source mode
or asynchronous step-up mode with internal power
MOSFET and compensation network.

CH1 to CH4 operate in PWM mode with 2MHz, while
CH6 operates in step-up mode with 1MHz switching
frequency under moderate to heavy loading.

RTC_LDO : 3.1V output LDO with low quiescent current
and high output voltage a ccuracy .

Power Good Indicator : Monitors FB2, FB3, and FB4
status.

CH1 : Synchronous Step-Up DC/DC Converter

CH1 is a synchronous step-up converter for motor driver
power in DSC system. The converter operates at fixed
frequency and under PWM Current Mode. The converter
integrates internal MOSFET s, compensation network a nd

synchronous rectifier for up to 95% efficiency. It also
disconnects the load when CH1 is turned off. Connect
BA T to the power input node in front of CH1 inductor.

RT9992

The output voltage can be set by the following equation :
V

OUT_CH1

where V

CH2 : Synchronous Step-Up / Step-Down
Selectable DC/DC Converter

CH2 is a synchronous step-up / step-down selectable
converter for system I/O power .

Mode setting

CH2 of the RT9992 features flexible step-up/step-down
topology setting for 2AA / Li-ion battery. If CH2 operates
in step-up mode, the SEL pin should be connected to
GND. If CH2 operates in step-down mode, the SEL pin
should be connected to V
the logic state can not be cha nged during operation.

Step-Up

The converter operates in fixed frequency PWM Mode,
continuous current mode (CCM), and discontinuous current
mode (DCM) with internal MOSFETs, compensation
network and synchronous rectifier f or up to 95% efficiency .
In step-up mode, CH2 also disconnects the load when it
is turned off. Connect VIN2 to the power input node in
front of CH2 inductor.

Step-Down

The converter operates in fixed frequency PWM mode
and continuous current mode (CCM) with internal
MOSFET s, compensation network a nd synchronous

rectifier for up to 95% efficiency. The CH2 step-down
converter can be operated at 100% maximum duty cycle
to extend the input operating voltage range. When the
input voltage is close to the output voltage, the converter
enters low dropout mode. In step-down mode, connect
the VIN2 pin to G ND via a 470kΩ pull-down resistor .

The output voltage can be set by the following equation :

= (1+R1/R2) x V

is 0.8V typically.

FB1

Table 2. CH2 Mode Stting

CH2 Operating

Mode

Step-Up Connect the SEL pin to GND.

Step-Down Connect the SEL pin to V

FB1

. In addition, plea se note that

BAT

Connection

BAT

.

DS9992-P04 May 2010 www.richtek.com

11

RT9992

Preliminary

V

OUT_CH2

where V

= (1+R3/R4) x V

is 0.8V typically

FB2

FB2

CH3 : Synchronous Step-Down DC/DC Converter

CH3 is suitable for DRAM power in DSC system. The
converter operates in fixed frequency PWM mode and
CCM with integrated internal MOSFET s and compensation
network. The CH3 step-down converter can be operated
at 100% maximum duty cycle to extend battery operating
voltage range. When the input voltage is close to the output
voltage, the converter enters low dropout mode with low
output ripple.

The output voltage can be set by the following equation :
V

OUT_CH3

where V

= (1+R5/R6) x V

is 0.8V typically.

FB3

FB3

CH4 : Synchronous Step-Down DC/DC Converter

CH4 is suitable for processor core power in DSC system.
The converter operates in fixed frequency PWM mode
and CCM with integrated internal MOSFETs and
compensation network. The CH4 step-down converter can
be operated at 100% maximum duty cycle to extend
battery operating voltage range. When the input voltage
is close to the output voltage, the converter enters low
dropout mode with low output ripple.

The output voltage can be set by the following equation :
V

OUT_CH4

= (1+R7/R8) x V

FB4

start does not finish, CH6 can not be turned on.

Table 3. CH6 WLED Setting

CH6 Operating Mode VOUT6

Current Source <0.3V

Asynchronous

Step-Up

>0.7V

When CH6 works in current source mode, it sinks an
accurate LED current modulated by EN6 high duty such
that it is ea sily dimmed from 0mA to 30mA. If CH6 works
in asynchronous step-up mode, it integrates a synchronous
step-up mode with an internal MOSFET and internal
compensation, and requires an external schottky diode
to output a voltage up to 19V . The LED current is set via
an external resistor and controlled via the PWM duty on
the EN6 pin. Kegardless of the mode, holding EN6 low
for more than 32.7ms will turn of f CH6.

CH6 WLED Current Dimming Control

If CH6 is in asynchronous step-up mode, the WLED current
is set by an external resistor. And the dimming is
controlled by the duty of pulse width modulated signal on
the EN6 pin.

The average current through WLED can be set by the
following equations :

I

(mA) = [250mV/R(Ω)] x Duty (%) ......f or step-up mode

LED

Or I

(mA) = 30mA x Duty (%)....... for current source

LED

mode

Where V

is 0.8V typically.

FB4

CH5 : Generic LDO

The RT9992 provides a generic LDO with high output voltage
accura cy . The LDO outputs either a fixed 2.5V voltage or
an adjustable voltage with external feedback network,
depending on the initial FB5 voltage. The CH5 adjustable
output voltage can be set by the following equation :

V

OUT_CH5

Where V

= (1+R1 1/R12) x V

is 0.5V typically.

FB5

FB5

CH6: WLED Driver

CH6 is a WLED driver that can operate in either current
source mode or asynchronous step-up mode, depending
on the initial VOUT6 voltage level. In addition, if CH4 soft-

12

R : Current sense resistor from FB6 to GND.
Duty : PWM dimming via the EN6 pin. Dimming frequency

range is from 1kHz to 100kHz but 2kHz to 20kHz should
be avoided to prevent audio noise distraction.

VDDM Power Path

To support bootstrap function, the RT9992 includes a
power selection circuit which selects between BAT and
PVDD6 for the higher voltage to be used as the internal
node, VDDI, that connects to the external decoupling
capacitor at the VDDM pin. VDDM is the main power for
the RT9992 control circuit. V DDI is the power input for the
RTC LDO. To bootstrap VDDM, PVDD6 must connect to
the output of the first enabled low voltage synchronous
step-up channel (CH1 or CH2). Furthermore, PV DD6 also

DS9992-P04 May 2010www.richtek.com

Preliminary

RT9992

provides power to the N-MOSFET driver in CH6. The
RT9992 includes UVLO circuits to check V DDM a nd BAT
voltage status.

RTC LDO

The RT9992 provides a 3.1V output LDO for real time clock.
The LDO features low quiescent current (5μA) and high
output voltage accura cy. The R TC LDO is always on, even
when the system is shut down. For better stability, it is
recommended to connect a 0.1μF capacitor to the
RTCPW R pin. The RTC LDO includes pa ss transistor body

Power On/Off Sequence

SEQ = 0 : CH1 to 5 are independently enabled by EN1 to EN5
SEQ = 1 : CH2 to 5, or CH1 to 4 is enabled in preset on/off sequence. The order is chosen by EN3 and EN4

SEQ EN2 EN3 EN4 EN5 EN1 Power On Sequence

0 indept indept indept indept indept independent
1 EN2345 1 0 X indept CH2 CH3 CH4 CH5
1 EN2345 0 0 0 indept CH2 CH5 CH3 CH4

diode control to avoid the RTCPWR node from back
charging into the input node V DDI.

Power Good

The RT9992 provides a power good indicator to monitor
FB2, FB3, and FB4 voltage status. After CH2, CH3, and
CH4 are turned on, if any one of them becomes lower
than 0.68V (typically), PGOOD will be pulled low . If all are
higher than 0.72V, PGOOD will be released and pulled
high after 10ms.

1 EN1234 1 1 indept x CH1 CH3 CH4 CH2
1 EN1234 0 1 indept x CH1 CH4 CH3 CH2

X : don't care but suggested to be LOW (0).

Power On/Off Sequence Example for CH2 to CH5

Sequence 1: SEQ is high, EN3 is high, EN4 is low.
EN2 will turn on/off CH2 to CH5 in preset sequence. CH1

will be turned on by EN1 independently .
CH2 to CH5 Power On Sequence is :
When EN2 goes high, CH2 will be turned on . 7ms after

CH2 is turned on, CH3 will be turned on. 7ms after CH3 is
turned on, CH4 will be turned on. 7ms after CH4 is turned
on, CH5 will be turned on.

CH2 to CH5 Power-Off Sequence is :
When EN2 goes low, CH5 will be turned off and VOUT5

will be internally discharged. when VOUT5 discharging
finishes, CH4 will turn off a nd internally discharge output
via LX4 pin. When FB4 < 0.1V, CH3 will turn off and
internally discharge output via LX3 pin. Likewise when
FB3 < 0.1V , CH2 will turn off a nd discharge output via LX2
pin. After FB2 < 0.1V, CH2 to 5 shutdown sequence will
be completed.

Sequence 2 : SEQ is high, EN3 is low, EN4 is low, EN5
is low.

EN2 will turn on/off CH2 to CH5 in preset sequence. CH1
will be turned on by EN1 independently .

CH2 to CH5 Power On Sequence is :
When EN2 goes high, CH2 will be turned on . 7ms after

CH2 is turned on, CH5 will be turned on. About 1ms after
Ch5 is turned on, CH3 will be turned on. 7ms after CH3 is
turned on, CH4 will be turned on.

CH2 to CH5 Power-Off Sequence is :
When EN2 goes low, CH4 will turn of f first a nd intern ally

discharge output via LX4 pin. When FB4 < 0.1V, CH3 will
turn off and internally discharge output vi a LX3 pin. Likewise,
when FB3 < 0.1V, CH5 will turn off and VOUT5 will be
internally discharged. When VOUT5 discharging finishes,
CH2 will turn off and discharge output vi a LX2 pin. After
FB2 < 0.1V, CH2 to 5 shut down sequence will be
completed.

DS9992-P04 May 2010 www.richtek.com

13

RT9992

Preliminary

Table 4. CH2 to CH5 Power On/Off Sequence

EN3 to EN5 Setting Power On Seque nce

EN3 = H, EN4 = L, EN5 = X CH2→CH3→CH4→CH5
EN3 = L, EN4 = L, EN5 = L CH2→CH5→CH3→CH4

EN3 to EN5 Setting Power Off Sequence

EN3 = H, EN4 = L, EN5 = X CH5→CH4→CH3→CH2
EN3 = L, EN4 = L, EN5 = L CH4→CH3→CH5→CH2

Timing Diagram for CH2 to CH5

Power On Sequence : CH2 Step-Down 3.3V CH3 Step-Down 1.8V CH4 Step-Down 1.2V CH5 LDO 2.5V

→ → →

Power Off Sequence : CH5 LDO 2.5V CH4 Step-Down 1.2V CH3 Step-Down 1.8V CH2 Step-Down 3.3V

→ →

→

SEL = H, SEQ = H, EN3 = H, EN4 = L

VDDM

EN2

OUT

OUT

OUT

OUT

3.3V

1.8V

1.2V

2.5V

CH2 V

CH3 V

CH4 V

CH5 V

Power On Sequence : CH2 Step-Down 3.3V CH5 LDO 2.5V CH3 Step-Down 1.8V CH4 Step-Down 1.2V
Power Off Sequence : CH4 Step-Down 1.2V CH3 Step-Down 1.8V CH5 LDO 2.5V CH2 Step-Down 3.3V

User Define

3.5ms

7ms

3.5ms

7ms

→

→

3.5ms

7ms

2.4ms

→ →

→

→

Wait until
FB2 < 0.1V

Wait until FB3 < 0.1V

Wait until FB4 < 0.1V

Wait until FB5 < 0.1V

SEL = H, SEQ = H, EN3 = H, EN4 = L, EN5 = L

14

VDDM

EN2

CH2 V

CH5 LDO 2.5V

CH3 V

CH4 V

OUT

OUT

OUT

3.3V

1.8V

1.2V

User Define

3.5ms

2.4ms

7ms

8ms

3.5ms

7ms

3.5ms

Wait until
FB2 < 0.1V

Wait until FB5 < 0.1V

Wait until FB3 < 0.1V

Wait until FB4 < 0.1V

DS9992-P04 May 2010www.richtek.com

Preliminary

RT9992

Power on/off sequence for CH1 to CH4

Sequence 3 : SEQ is high, EN3 is high, EN4 is high.
EN2 will turn on/off CH1 to CH4 in preset sequence. CH5

will be turned on by EN5 independently .
CH1 to CH4 Power On Sequence is :
When EN2 goes high, CH1 will be turned on. 7ms after

CH1 is turned on, CH3 will be turned on. 7ms after CH3 is
turned on, CH4 will be turned on. 7ms after CH4 is turned
on, CH2 will be turned on.

CH1 to CH4 Power-Off Sequence is :
When EN2 goes low, CH2 will turn of f first a nd intern ally

discharge output. When FB2 < 0.1V , CH4 will turn off a nd
also internally discharge output via LX4 pin. When FB4 <

0.1V , CH3 will turn off a nd internally discharge output via
LX3 pin. Likewise, when FB3 < 0.1V , CH1 will turn off a nd
discharge output via LX1 pin. After FB1 < 0.1V, CH1 to 4

Sequence 4 : SEQ is high, EN3 is low, EN4 is high.
EN2 will turn on/off CH1 to CH4 in preset sequence. CH5

will be turned on by EN5 independently .
CH1 to CH4 Power On Sequence is :
When EN2 goes high, CH1 will be turned on first. 7ms

after CH1 is turned on, CH4 will be turned on. 7ms after
CH4 is turned on, CH3 will be turned on. 7ms after CH3 is
turned on, CH2 will be turned on.

CH1 to CH4 Power Off Sequence is :
When EN2 goes low, CH2 will turn off f irst a nd internally

discharge output. When FB2 < 0.1V , CH3 will turn off a nd
internally discharge output via LX3 pin. When FB3 < 0.1V,
CH4 will turn off and internally discharge output vi a LX4
pin. Likewise when FB4 < 0.1V, CH1 will turn off and
internally discharge output via LX1 pin. After FB1 < 0.1V ,
Ch1 to 4 shutdown sequence is completed.

shutdown sequence will be completed.

Table 5. CH1 to CH4 Power On/Off Sequence

Enable Setting Power On Sequence

EN3 = H, EN4 = H, EN1 = X CH1→CH3→CH4→CH2
EN3 = L, EN4 = H, EN5 = X CH1→CH4→ CH3→CH2

Enable Setting Power Off Sequence

EN3 = H, EN4 = H, EN5 = X CH2→CH4→CH3→CH1
EN3 = L, EN4 = H, EN5 = X CH2→CH3→ CH4→CH1

Timing Diagram for CH1 to CH4

Power On Sequence : CH1 Step-Up 5V CH3 Step-Down 1.8V CH4 Step-Down 1.2V CH2 Step-Up 3.3V
Power Off Sequence : CH2 Step-Up 3.3V CH4 Step-Down 1.2V CH3 Step-Down 1.8V CH1 Step-Up 5V

→ → →

→ →

→

SEL = L, SEQ = H, EN3 = H, EN4 = H

CH1 V

CH3 V

CH4 V

CH2 V

VDDM

EN2

OUT

OUT

OUT

OUT

5V

1.8V

1.2V

3.3V

User Define

3.5ms

7ms

3.5ms

7ms

3.5ms

7ms

3.5ms

Wait until
FB1 < 0.1V

Wait until FB3 < 0.1V

Wait until FB4 < 0.1V

Wait until FB2 < 0.1V

DS9992-P04 May 2010 www.richtek.com

15

RT9992

Preliminary

Power On Sequence : CH1 Step-Up 5V CH4 Step-Down 1.2V CH3 Step-Down 1.8V CH2 Step-Up 3.3V
Power Off Sequence : CH2 Step-Up 3.3V CH3 Step-Down 1.8V CH4 Step-Down 1.2V CH1 Step-Up 5V

→ → →

→

→ →

SEL = L, SEQ = H, EN3 = L, EN4 = H

VDDM

EN2

OUT

OUT

OUT

OUT

5V

1.2V

1.8V

3.3V

CH1 V

CH4 V

CH3 V

CH2 V

Thermal Considerations

For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and a mbient temperature. The
maximum power dissipation can be calculated by the
following formula :

P
where T

D(MAX)

= (T

J(MAX)

− TA) / θ

J(MAX)

is the maximum junction temperature, T
the ambient temperature, a nd θ
thermal resistance.

For recommended operating condition specifications of
the RT9992, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θJA, is layout dependent. For WQF N­32L 4x4 packages, the thermal resistance, θJA, is 52°C/

User Define

JA

JA

3.5ms

7ms

is the junction to ambient

3.5ms

3.5ms

7ms

7ms

A

Wait until
FB1 < 0.1V

Wait until FB4 < 0.1V

3.5ms

Wait until FB3 < 0.1V

Wait until FB2 < 0.1V

resistance, θJA. For the RT9992 package, the derating
curve in Figure 1 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.

2.0

1.8

1.6

1.4

1.2

is

1.0

0.8

0.6

0.4

0.2

Maximum Power Dissipation (W) 1

0.0
0 25 50 75 100 125

Ambient Tempera ture (°C)

Four Layer PCB

(°C)

Figure 1. Derating Curve f or the RT9992 Package

W on a standard JEDEC 51-7 f our-layer thermal test board.
The maximum power dissipation at TA=25°C can be
calculated by the following formula :

P

= (125°C − 25°C ) / (52°C/W) = 1.923W for

D(MAX)

WQF N-32L 4x4 pa ckage
The maximum power dissipation depends on the operating

ambient temperature for fixed T

16

and thermal

J(MAX)

DS9992-P04 May 2010www.richtek.com

Table 6. Protection Action

Protection Type

V

DDM

UVLO VDDM < 2.1V No delay Disable all channels
OVP VDDM > 6.15V 100ms IC shutdown

BAT UVLO V

Thre shold (typic al) Refer

to Electrical spec

< 1.3V No del ay Disable all c hannels

BAT

Current Limit N-MOSFET current > 3A 100ms IC shutdown

V

< 0.4V, or

CH1 :
Boost

PVDD1 UVP

PVDD1 OVP V

FB1

V

PVDD1

V

PVDD1
PVDD1

< V

< 1.3V

> 6.15V No delay IC shu tdown

Current Limit N-MOSFET current > 2.1A 100ms IC shutdown

V

< 0.4V, or

CH2 :
Boost

CH2 : Buck

CH3 : Buck

CH4 : Buck

CH5

CH6 Asyn
Boost

Thermal

PVDD2 UVP

PVDD2 OVP V
OCP P-MOSFET current > 1.5A 100ms IC shut down
UVP V
OCP P-MOSFET current > 1.5A 100ms IC shut down
UVP V
OCP P-MOSFET current > 2A 100ms IC shutdown
UVP V
Current Limit P-MOSFET current > 0.3A 100ms IC shutdown
UVP V
Current Limit N-MOSFET current > 0.8A Reset each cycl e
OVP V

Thermal
shutdown

FB2

V
V

< V

PVDD2

< 1.3V

PVDD2

> 6.15V No delay IC sh utdown

PVDD2

< 0.4V 100ms IC shutdown

FB2

< 0.4V 100ms IC shutdown

FB3

< 0.4V 100ms IC shutdown

FB4

< 0.3V 100ms IC shutdown

FB5

> 19V 10 0m s IC shutd own

OUT6

Temperature > 160°C No delay

Preliminary

−0.8V or

BAT

− 0.8V or

IN2

RT9992

Delay Time

100ms IC shutdown

100ms IC shutdown

Protection

Methods

All channels stop
switching

DS9992-P04 May 2010 www.richtek.com

17

RT9992

Outline Dimension

Preliminary

1
2

DETAIL A

Pin #1 ID a nd T ie Bar Mark Option s

Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol

Min Max Min Max

A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010

b 0.150 0.250 0.006 0.010

D 3.900 4.100 0.154 0.161
D2 2.650 2.750 0.104 0.108

E 3.900 4.100 0.154 0.161

1
2

E2 2.650 2.750 0.104 0.108

e 0.400 0.020
L 0.300 0.400

0.012 0.016

W-Type 32L QFN 4x4 Package

Richtek Technology Corporation

Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: [phone] Fax: [phone]

Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.

18

Richtek Technology Corporation

Taipei Office (Marketing)
8F, No. 137, Lane 235, Paochiao Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: [phone] Fax: [phone]
Email: [e-mail]

DS9992-P04 May 2010www.richtek.com

Preliminary

RT9992

Datasheet Revision History

Version Data Page No. Item Description

P00 2010/2/1 First Edition

Typical Application Circuit

P01 2010/3/2

P02 2010/3/19

P03 2010/4/2 Outline Dimension Modify

P04 2010/5/20

Function Block Diagram
Electrical Characteristics
Genera l Description
Typical Application Circuit.
Fu nct ion al Pin De sc ript ion
Absolute Maximum Ratings
Application Information

Or der ing Inform at io n
Typical Application Circuit
Electrical Characteristics
Application Information

Modify

Modify and add Application Information

Modify

DS9992-P04 May 2010 www.richtek.com

19