Richtek RT9913APQV, RT9913BPQV, RT9913CPQV, RT9913DPQV Schematic [ru]

Preliminary

RT9913A/B

Integrated Multi-Channel DC-DC Converter for

TFT LCD Panels

General Description

The RT9913A/B includes a high-performance boost

regulator, one linear-regulator controller for VGL, one low

dropout linear regulator, a gate pulse modulator (GPM), a

voltage detector and a V

active-matrix thin-film transistor (TFT) liquid-crystal displays

(LCDs).

The boost converter provides the regulated supply voltage

for the panel source driver ICs. With integrated 16V

N-Channel 0.2Ω MOSFET it allows the use of ultra-small

inductors and ceramic capacitors and provides fast transient

response to pulsed loads. The VGL linear-regulator

controller provides regulated TFT Gate-Off . The low-dropout

linear regulator (LDO) using an internal PMOS as the pass

device can supply up to 350mA current is suitable for the

supply voltage to the T-CON ASIC. And the GPM is

controlled by frame signals from timing controller to

modulate the Gate-On voltage. Voltage detector monitors

the supply voltage to issue a reset signal while the

detected voltage is too low. The V

high-performance operation amplifier) can drive the LCD

backplane (V

) and features high short-circuit current

COM

(140mA), fast slew rate (12V/μs), wide bandwidth (12MHz)

and rail-to-rail input and output.

Buffer (Unity- gain OPA) for

COM

Buffer (Unity-gain)

COM

Features

zz

2.5V to 5.5V Input Supply Voltage

z

zz

zz

z 640kHz/1.2MHz (A/B version) Current-Mode Step-Up

zz

Boost Regulator
Fast Transient Response to Pulsed Load
High Accuracy Output Voltage (
Built-In 16V, 2.0A, 0.2

ΩΩ

Ω N-Channel MOSFET

ΩΩ

High Efficiency Up to 90%
Programmable Soft-Start
Programmable Over-Current Protection

zz

z Linear-Regulator Controller for VGL

zz

zz

z Low Drop-Out Voltage Linear Regulator

zz

Adjustable Output Voltage (2.5V to 3.3V)
350mA Maximum Output Current

zz

z On-Chip GPM Controller with Adjustable Falling

zz

Time
Flicker Compensator
Power-On Sequence Control

zz

z Low Voltage Detector

zz

Programmable Detecting Voltage and Delay Time

zz

z Unity-Gain Operation Amplifier for V

zz

zz

z Over-Temperature Protection

zz

zz

z Thin 24-Lead VQFN Package

zz

zz

z RoHS Compliant and 100% Lead (Pb)-Free

zz

±±

±2%)

±±

COM

Buffer

Marking Information

Ordering Information

RT9913A/B

Package Type
QV : VQFN-24L 4x4 (V-Type)

Operating Temperature Range
P : Pb Free with Commercial Standard

Switching Frequency
A : 640kHz
B : 1.2MHz

Note :

RichTek Pb-free products are :

`RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

`Suitable for use in SnPb or Pb-free soldering processes.

`100% matte tin (Sn) plating.

DS9913A/B-00 February 2006 www.richtek.com

For marking information, contact our sales representative

directly or through a RichTek distributor located in your

area, otherwise visit our website for detail.

1

RT9913A/B

Pin Configurations

VFLK

VGH

VGHM

RE

VREF

FBN

Preliminary

(TOP VIEW)

OPAI

OPAO

AVDD

24 2223

1

2

3

4

5

6

7

21 20 19

GND

8 9 10 12

PGND

EN

FB

18

LX

17

VIN

16

COMP

15

SS

14

LDOI

13

LDOO

11

Typical Application Circuit

V

GL

-6V

C13

0.22uF

V

Q1

MMBT3904

R9
240k

R10
50k

C14

0.22uF

DIN

R6
65k

R7

110k

R8

6.8k

V

FLK

V

LDO

RESET

V

AVDD

Chip Enable

BAT54S

C12

0.1uF

D4

R14

100k

C4
27nF

C10

0.1uF

R

C1

10uF

SET

19

7

6

15

5

8

1

9

22

10

DRVN

VQFN-24L 4x4

C11

0.1uF

EN

DRVN

FBN

SS

VREF

CD

VFLK

RESET

AVDD

VDIV

AGND

CD

RESET

V

IN

3.3V

17

VIN

RT9913

11

VDIV

COMP

VGHM

OPAO

OPAI
LDOI

LDOO

PGND

21

AGND

4.7uH

LX

FB

VGH

RE

ADJ

L1

ADJ

C7

0.1uF

V

AVDD

8.5V

C2

4.7uF x 3

C6

0.1uF
D3

BAT54S

C8

0.1uF

R
30k

GH

18

20

16

C

COMP

NC

D2

BAT54S

SS12

D1

R3

56k

C3

1nF

C5

0.1uF

R1

330k

R2
56k

2

C15

1.5nF

C9

1uF

V

GHM

25V

V

COM_OUT

C16
1uF

V

LDO

2.5V

V

IN

3.3V

V

COM_IN

V

AVDD

R12

56k

R13
56k

3

4

23

24

14

13

12

R11

1.2k

R5
56k

R4

56k

DS9913A/B-00 February 2006www.richtek.com

2

Preliminary

RT9913A/B

Functional Pin Description

Pin Number Pin Name Pin Function

1 VFLK VFLK is produced by timing controller for charging or discharging VGHM.

2 VGH Switch input for charge VGHM

3 VGHM VGHM is the supply voltage for the gate driver ICs.

4 RE Switch input for discharge VGHM

5 VREF

6 FBN

7 DRVN

8 CD Pin for external capacitor setting the delay time for voltage detector reset delay time.

9 RESET Voltage Detector open-drain Output for Reset.

10 VDIV

11 AGND Analog Ground.

12 ADJ

13 LDOO Voltage Output of the LDO.

14 LDOI Voltage Input of the LDO.

15 SS

16 COMP Compensation Error Amplifier Pin. Connect a compensation network to ground.

17 VIN

18 LX Switching pin. Drain of the internal power NMOS for the main step-up regulator.

19 EN Active-High Enable Control Input and OCP level setting.

20 FB

21 PGND Power Ground. PGND is the source of the power NMOS.

22 AVDD VDD for Source Driver Power. It also supplies OP power and GPM level shift voltage.

23 OPAO Unit-Gain OPA Output Pin.

24 OPAI Unit-Gain OPA Input Pin.

Exposed Pad GND Exposed pad should be soldered to PCB board and connected to GND.

Internal Reference Bypass Terminal. Connect a 0.22uF ceramic capacitor from the VREF

to analog ground (AGND). The source capability is 100uA.

Negative Linear-Regulator Feedback Input. Connect FBN to the center of a resistive

voltage-divider between the negative output voltage VGL and the VREF to set the

negative linear-regulator output voltage. Place the resistive voltage-divider close to the

pin.

Negative Linear-Regulator Base Drive. Open drain of an internal PMOS. Connect DRVN

to the base of the external linear-regulator NPN pass transistor.

Voltage Detector Divider Input. Connect VDIV to the center of a resistive voltage-divider

between the detected voltage input (VDIN) and analog ground (AGND).

Low-Dropout Linear Regulator (LDO) Feedback Input. ADJ regulates to 1.24V nominal.

Connect ADJ to the center of a resistive voltage-divider between the LDO output voltage

LDOO and the analog ground (AGND) the LDO output voltage. Place the resistive

voltage-divider close to the pin.

Soft-Start Control Pin. Connect a soft-start capacitor (C

capacitor is charged with a constant current 4uA.

Supply Input. The supply voltage powers all the control circuits including the boost

converter, negative linear-regulator, gate pulse regulator and voltage detector.

Main Boost Regulator Feedback Input. FB regulates to 1.24V nominal. Connect FB to the

center of a resistive voltage-divider between the main output AVDD and the analog

ground (AGND) the boost regulator output voltage. Place the resistive voltage-divider

close to the pin.

) to this pin. The soft-start

SS

DS9913A/B-00 February 2006 www.richtek.com

3

RT9913A/B

Function Block Diagram

Preliminary

EN

SS

V

IN

VIN

VDIV

RESET

LDOI

LDOO

ADJ

VREF

FBN

AGND

Boost Regulator Block Diagram

CD

Voltage

Detector

LDO

1.24V

Voltage

Reference

+

-

DRVN

Boost

Regulator

GPM

LX

PGND

FB

COMP

V

IN

VGHM

RE

AVDD

VGH
VFLK

OPAO

+

-

OPAI

VIN

4uA

EN

COMP

FB

Oscillator

1.24V

Protection

­+

Error

Amplifier

Slope

Compensation

Summing

Comparator

+

-

Clock

Soft­Start

Control

and

Driver

Logic

Current

Sense

SS

LX

PGND

DS9913A/B-00 February 2006www.richtek.com

4

Preliminary

Absolute Maximum Ratings (Note 1)

RT9913A/B

z Supply Input Voltage, V

z VGH-AVDD, VGHM-AVDD ---------------------------------------------------------------------------------- 18V

z LX ---------------------------------------------------------------------------------------------------------------- −0.3V to 16V
z VGH, VGHM RE ---------------------------------------------------------------------------------------------- −0.3V to 30V
z AVDD ------------------------------------------------------------------------------------------------------------ −0.3V to 16V
z OPAI, OPAO --------------------------------------------------------------------------------------------------- −0.3V to (AVDD + 0.3V)

z DRVN ------------------------------------------------------------------------------------------------------------ (V
z VFLK, VREF, FBN, CD, RESET_, VDIV, SS, COMP, EN, FB ------------------------------------ −0.3V to (V
z LDOI ------------------------------------------------------------------------------------------------------------- −0.3V to 7V
z ADJ, LDOO ---------------------------------------------------------------------------------------------------- −0.3V to (LDOI + 0.3V)

z Power Dissipation, P

----------------------------------------------------------------------------------- −0.3V to 7V

IN

@ T

D

= 25°C

A

− 16V) to (VIN + 0.3V)

IN

+ 0.3V)

IN

VQFN-24L 4x4 ------------------------------------------------------------------------------------------------ 1.786W

z Package Thermal Resistance (Note 4)

VQFN-24L 4x4, θJA------------------------------------------------------------------------------------------- 56°C/W

z Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------ 260°C
z Storage Temperature Range ------------------------------------------------------------------------------- −65°C to 150°C

z Junction Temperature ---------------------------------------------------------------------------------------- 150°C

z ESD Susceptibility (Note 2)

HBM (Human Body Mode) --------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ----------------------------------------------------------------------------------------- 200V

Recommended Operating Conditions (Note 3)

z Ambient Temperature Range ------------------------------------------------------------------------------- −40°C to 85°C
z Junction Temperature Range ------------------------------------------------------------------------------- −40°C to 125°C

Electrical Characteristics

(VIN = 3.3V, V

System Supply

Input Supply Voltage

VIN Under Voltage Lockout Threshold V

VIN Quiescent Current IQ

Shut Down Current

EN Threshold

Main Boost Regulator

Operation Frequency

= 8.5V, TA = 25°C, unless otherwise specification)

OUT

Parameter Symbol Test Condition Min Typ Max Units

2.5 -- 5.5 V

V

rising

IN

1.8 2.0 2.2

Hysteresis 0.05 0.1 0.15

V

= 1.3V, LX no switching

FB

= 1.1V, LX switching

V

FB

VIN = 3.3V

-- -- 1.5

0.8 -- --

0.15 0.4 1 mA

1 2 3.5 mA

-- 1 5

Logic-High Voltage

Logic-Low Voltage

V

I

IN

V

V

IN

UVLO

IH

IL

RT9913 A -- 640 -- kHz

F

OSC

RT9913 B 0.9 1.2 1.4 MHz

V

μA

V

Maximum Duty Cycle 86 90 94 %

To be continued

DS9913A/B-00 February 2006 www.richtek.com

5

RT9913A/B

Parameter Symbol Test Condition Min Typ Max Units

Preliminary

Feedback Voltage

V

FB

FB Input Bias Current

Transconductance of Error Amplifier Gm

Voltage Gain of Error Amplifier

A

V

Feedback Voltage Line Regulation

Output Voltage Load Regulation

LX ON-Resistance

R

LX(ON)

No load, TA = 25°C

V

= 1.5V

FB

I

= 5μA

COMP

-- 700 -- V/V

V

= 2.5V to 5.5V

IN

V

= 3.3V,

IN

I

= 20 to 200mA

LOAD

50 200 500

1.22 1.24 1.26 V

-40 -- +40 nA

-- 160 --

μA/V

-- 0.1 0.15 %/V

−1

-- 0 %

mΩ

Current Sense Transresistance -- 0.5 -- A/V

Soft-Start Charge Current

Thermal Shutdown Temperature

Thermal Shutdown Hysteresis

Current Limit

I

SS

T

ΔT

I

LIM

SD

2 4 6

-- 170 --

-- 20 --

SD

-- 2 -- A

μA

°C

°C

Gate-Off Regulation Controller

V

source current capability I

REF

FBN Regulation Voltage

FBN Effective Load Regulation Error

FBN Line Regulation Error

DRVN Source Current

Power-On-Delay Time

REF

V

FBN

I

DRVN

T

Refer to V

VGL

-- 100 1000

V

= −10V,

DRVN

I

= 50uA to 1mA

DRVN

I

= 0.1mA, 2.5V<VIN<5.5V

DRVN

−20

−30 −5

-- 1 6 mV

0 20 mV

0 mV

1 4 6 mA

FB

> 1V

25 32 39 ms

μA

Low Drop-Out Linear Regulator (LDO)

Input Voltage

Dropout Voltage

Feedback Voltage

Current Limit

Quiescent Current

Line Regulation

Load Regulation

Gate Pulse Modulator

VFLK Input High Voltage

VFLK Input Low Voltage

Power-On-Delay Time (Note 5)

6

V

LDOI

V

DROP

V

ADJ

I

LIM

I

LDO

V

IH_FLK

V

IL FLK

T

VGHM

2.5 -- 5.5 V

V

= 3.3V, I

IN

1.22 1.24 1.26 V

OUT

= 350mA

200 300 500 mV

350 500 650 mA

-- 60 100

V

= 2.8V to 5.5V,

IN

I

= 100mA, V

OUT

I

= 1mA to 300mA

OUT

1.5 -- -- V

-- -- 0.6 V

Refer to V

FB

> 1V

LDO

= 2.5V

-- 0.1 0.3 %/V

0 0.2 0.5 %

50 64 78 ms

μA

To be continued

DS9913A/B-00 February 2006www.richtek.com