®
High Voltage Multi-Topology LED Driver
RT8463
General Description
The RT8463 is a current mode PWM regulator for LED
driving applications. With a 2A power switch, wide input
voltage (4.5V to 50V) and output voltage (up to 50V)
ranges, the RT8463 can operate in any of the three
common topologies : Buck, Boost or Buck-Boost.
With 470kHz operating frequency, the size of the external
PWM inductor and input/output capacitors can be
minimized. High efficiency is achieved by a 100mV current
sensing control.
Brightness dimming can be controlled from either analog
or PWM signal. A unique built-in clamping comparator
and filtering resistor allow easy low noise analog dimming
conversion from PWM signal with only one external
capacitor.
The RT8463 is available in the TSSOP-14 (Exposed pad)
and WDFN-12L 3x3 packages.
Ordering Information
RT8463
Package Type
CP : TSSOP-14 (Exposed Pad)
QW : WDFN-12L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Features
zz
z High Voltage : V
zz
zz
z Buck, Boost or Buck-Boost Operation
zz
zz
z Built-In 2A Power Switch
zz
zz
z Current Mode PWM Control
zz
zz
z 470kHz Fixed Switching Frequency
zz
zz
z Easy Dimming : Analog, PWM Digital or PWM
zz
Up to 50V, V
IN
Up to 50V
OUT
Converting to Analog with One External Capacitor
zz
z Adjustable Soft-Start to Avoid Inrush Current
zz
zz
z Adjustable Over V oltage Protection to Limit Output
zz
Voltage
zz
z Thermal Shutdown
zz
zz
z Under Voltage Lockout
zz
zz
z RoHS Compliant and Halogen Free
zz
Applications
z GPS, Portable DVD Backlight
z Desk Lights and Room Lighting
z Industrial Display Backlight
Marking Information
RT8463GCP
RT8463GCP : Product Number
RT8463
GCPYMDNN
RT8463GQW
98=YM
DNN
YMDNN : Date Code
98 = : Product Code
YMDNN : Date Code
Simplified Application Circuit
V
IN
5V
PWM
Dimming Control
R1
C2
Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
©
C3
C1
VCC
EN
DCTL
VC
SS
ACTL
C4
L
RT8463
SW
ISP
ISN
OVP
CREG
GND
DS8463-00 January 2013 www.richtek.com
D1
C5
R4
R2
R3
V
C6
V
OUT
OUT
1
RT8463
Pin Configurations
ISP
ISN
VC
ACTL
DCTL
EN
GND
2
3
4
GND
5
6
7
(TOP VIEW)
14
VCC
13
CREG
12
SW
11
GND
10
SS
9
15
OVP
8
GND
1
ISP
2
ISN
3
VC
4
ACTL
5
DCTL
67
EN
GND
12
VCC
11
CREG
10
SW
9
GND
8
SS
13
OVP
TSSOP-14 (Exposed Pad)
Functional Pin Description
Pin No.
TSSOP-14
(Exposed Pad)
WDFN-12L 3x3
1 1 ISP Positive Current Sense Input.
2 2 ISN
3 3 VC Compensation Node for PWM Boost Converter Loop.
4 4 ACTL
5 5 DCTL
6 6 EN
7, 8, 11, 15
(Exposed Pad)
13 (Exposed Pad)
9,
9 7 OVP
10 8 SS
12 10 SW Switch Node of PWM Boost Converter.
13 11 CREG
14 12 VCC
Pin Name Pin Function
GND
WDFN-12L 3x3
Negative Current Sense Input. Voltage threshold between ISP and
ISN is 100mV.
Analog Dimming Control Input. Effective programming range is
between 0.2V and 1.2V.
Digital Dimming Control Input. By adding a 0.47μ F filtering
capacitor on the ACTL pin, the PWM dimming signal on DCTL pin
will be averaged and converted into analog dimming signal on the
ACTL pin. V
= 1.2V x PWM dimming duty cycle.
ACTL
Enable Control Input (Active High). When this pin is low, the chip is
in shutdown mode.
Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
Over Voltage Protection Sense Input. The PWM Boost converter
turns off when V
goes higher than 1.2V.
OVP
Soft-Start Time Setting. A minimum 10nF capacitor is required for
soft-start.
Regulator Output for Internal Circuit. Placed a 1μ F capacitor to
stabilize the 5V output regulator.
Power Supply Voltage Input. For good bypass, a low ESR
capacitor is required.
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Function Block Diagram
RT8463
SW
VCC
OVP
EN
VC
SS
DCTL
4.5V
1.2V
1.4V
V
ISP
100
+
+
-
+
-
1.2V
+
-
– V
(mV)
ISN
Shutdown
5µA
OSC
ACTL
5V
S
R
R
+
-
-
GM
+
+
-
LDO
CREG
ISN
ISP
GND
V
(V)
0
0.2 1.2
ACTL
Figure 1
Operation
The RT8463 is specifically designed to be operated in
Buck, Boost and Buck-Boost converter applications. This
device uses a fixed frequency, current mode control
scheme to provide excellent line and load regulations. The
control loop has a current sense amplifier to sense the
voltage between the ISP and ISN pins and provides an
output voltage at the VC pin. A PWM comparator then
turns off the internal power switch when the sensed power
switch current exceeds the compensated VC pin voltage.
The power switch will not reset by the oscillator clock in
each cycle. If the comparator does not turn off the switch
in a cycle, the power switch is on for more than a full
Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
DS8463-00 January 2013 www.richtek.com
©
switching period until the comparator is tripped. In this
manner, the programmed voltage across the sense
resistor is regulated by the control loop.
The current through the sense resistor is set by the
programmed voltage and the sense resistance. The voltage
across the sense resistor can be programmed by either
the analog or PWM signals at the ACTL pin, or the PWM
signal at the DCTL pin.
The RT8463 provides protection functions which include
over temperature, input voltage under voltage, output
voltage over voltage, and switch current limit.
3
RT8463
Absolute Maximum Ratings (Note 1)
z Supply Input Voltage, VCC ------------------------------------------------------------------------------------ − 0.3V to 60V
z SW Pin Voltage at Switching Off, ISP, ISN ---------------------------------------------------------------- − 0.3V to 60V
z DCTL, ACTL, CREG, OVP Pin Voltage -------------------------------------------------------------------- − 0.3V to 5.5V (Note 2)
z EN Pin Voltage --------------------------------------------------------------------------------------------------- − 0.3V to 20V
z Power Dissipation, P
TSSOP-14 (Exposed Pad) ------------------------------------------------------------------------------------ 3.32W
WDFN-12L 3x3 --------------------------------------------------------------------------------------------------- 3.28W
z Package Thermal Resistance (Note 3)
TSSOP-14 (Exposed Pad), θ JA------------------------------------------------------------------------------ 30.1° C/W
TSSOP-14 (Exposed Pad), θ JC------------------------------------------------------------------------------ 7.5° C/W
WDFN-12L 3x3, θ JA--------------------------------------------------------------------------------------------- 30.5° C/W
WDFN-12L 3x3, θ JC--------------------------------------------------------------------------------------------- 7.5° C/W
z Junction Temperature ------------------------------------------------------------------------------------------- 150°C
z Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------- 260°C
z Storage Temperature Range ---------------------------------------------------------------------------------- − 65° C to 150°C
z ESD Susceptibility (Note 4)
HBM (Human Body Model)------------------------------------------------------------------------------------ 2kV
MM (Machine Model) ------------------------------------------------------------------------------------------- 200V
@ TA = 25°C
D
Recommended Operating Conditions (Note 5)
z Supply Input Voltage, VCC ------------------------------------------------------------------------------------ 4.5V to 50V
z Junction Temperature Range---------------------------------------------------------------------------------- − 40° C to 125°C
z Ambient Temperature Range ---------------------------------------------------------------------------------- − 40° C to 85°C
Electrical Characteristics
(VCC = 12V, No Load on any Output, T
Parameter Symbol Test Conditions Min Typ Max Unit
Overall
Regulator Output Voltage V
Supply Current I
VIN Under Voltage Lockout
Threshold
Shutdown Current I
Logic-High V
EN Input Voltage
Logic-Low V
EN Input Current VEN > 2V -- -- 1 μA
Current Sens e Amplifier
= 25° C, unless otherwise specified)
A
I
CREG
VC ≤ 0.2V (Not Switching ) -- -- 5 mA
VCC
= 20mA 4.5 5 5.5 V
CREG
VIN Rising -- 4.2 --
V
UVLO
VEN < 0.5V -- -- 15 μA
SHDN
2 -- --
EN_H
-- -- 0.5
EN_L
Falling -- 3.8 --
V
IN
V
V
V
≥ 1.25V 96 100 102
Input Threshold (V
ISP
− V
)
ISN
ACTL
= 1.2V 95 98 101
V
ACTL
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mV
RT8463
Parameter Symbol Test Conditions Min Typ Max Unit
Input Current I
Input Current I
Output Current IVC 2V > VC > 0. 2V -- ± 10 -- μA
VC Threshold for PWM Switch Off -- 0.2 -- V
LED Dimming
Analog Dimming ACTL Pin Input
Current
LED C ur rent On Threshold at
ACTL
LED C ur rent Off Threshold at
ACTL
DCTL Input Current I
DCTL Input
Voltage
Logic-High V
Logic-Low V
PWM Boost Converter
Switching Frequency fSW 420 470 520 kHz
V
ISP
V
ISN
I
0 ≤ V
ACTL
V
ACTL_ON
V
ACTL_OFF
DCTL
DCTL_H
DCTL_L
(V
-- 0.2 0.25 V
0.3V ≤ V
2 -- --
-- -- 0.1
= 24V -- 200 -- μA
ISP
= 24V -- 20 -- μA
ISN
≤ 3V, DCTL Floating -- -- 2 μA
ACTL
ISP
− V
) = 100mV -- 1.2 1.33 V
ISN
≤ 5V -- 0.5 2 μ A
DCTL
V
Maximum Duty Cycle D
-- -- 100 %
MAX
Minimum On-Time (Note 6) -- 150 250 ns
SW R
SW Current Limit I
-- 0.3 0.5 Ω
DS(ON)
LIM_SW
2 2.5 -- A
OVP and Soft-Start
OVP Threshold V
OVP Input Current I
Soft-Start SS Pin Current ISS V
1.15 1.2 1.25 V
OVP
V
OVP
≤ 1.5V -- -- 50 nA
OVP
≤ 2.5V -- 5 8 μA
SS
Temperature Protection
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Note 1. Stresses beyond those listed “ Absolute Maximum Ratings ” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. If connected with a 20kΩ serial resistor, ACTL and DCTL can go up to 40V.
Note 3. θ
Note 4. Devices are ESD sensitive. Handling precaution is recommended.
Note 5. The device is not guaranteed to function outside its operating conditions.
Note 6. Guaranteed by design, not subjected to production test.
is measured at T
JA
measured at the exposed pad of the package.
= 25° C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θ JC is
A
T
SD
Δ T
SD
-- 150 -- °C
-- 20 -- °C
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5
RT8463
Typical Application Circuit
V
4.5V to 50V
PWM
Dimming control
4.5V to 50V
IN
5V
R1
10k
C2
3.3nF
V
IN
Analog
Dimming
5V
R1
10k
C2
3.3nF
D1
C1
R2
100mV
C5
1µF
L
22µH
C3
10nF
C4
0.47µF
VCC
EN
DCTL
VC
SS
ACTL
RT8463
ISP
ISN
OVP
GND
CREG
SW
Figure 2. PWM to Analog Dimming Buck Configuration
D1
C1
R2
100mV
C5
1µF
L
15µH
C3
10nF
VCC
ACTL
DCTL
EN
VC
SS
RT8463
ISP
ISN
OVP
GND
CREG
SW
R3 R4
C6
R3 R4
C6
Figure 3. Analog Dimming Buck Configuration
V
4.5V to 50V
IN
PWM
Dimming control
5V
R1
10k
C2
3.3nF
C3
10nF
C1
VCC
ACTL
DCTL
EN
VC
SS
RT8463
ISP
ISN
OVP
GND
CREG
SW
R2
100mV
C5
1µF
15µH
D1
R3 R4
C6
L
Figure 4. PWM Dimming Buck Configuration Through ACTL Pin
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