Richtek RT8223PZQW Schematic [ru]

High Efficiency, Main Power Supply Controller for Notebook Computer
RT8223P
General Description
The RT8223P is a dual step-down, switch-mode power supply controller generating logic-supply voltages in battery-powered systems. It includes two Pulse Width Modulation (PWM) controllers adjustable from 2V to 5.5V, and also features fixed 5V/3.3V linear regulators. Each linear regulator provides up to 100mA output current with automatic linear regulator bootstrapping to the PWM outputs. The RT8223P includes on-board power up sequencing, a power good output, internal soft-start, and soft-discharge output that prevents negative voltage during shutdown.
The constant on-time PWM sche me can operate without sense resistors a nd provide 100ns load tran sient response while maintaining nearly constant switching frequency . To eliminate noise in audio a pplications, a n ultra sonic mode is included, which maintains the switching frequency above 25kHz. Moreover, the diode-emulation mode maximizes efficiency for light load applications. The RT8223P is available in a WQF N-24L 4x4 pa ck age.
Features
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z Constant On-time Control with 100ns Load Step
zz
Response
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z Wide Input Voltage Range : 6V to 25V
zz
zz
z Dual Adjustable Outputs from 2V to 5.5V
zz
zz
z Fixed 3.3V and 5V LDO Output : 100mA
zz
zz
z 2V Reference Voltage
zz
zz
z Frequency Selectable via TONSEL Setting
zz
zz
z 4700ppm/
zz
zz
z Programmable Current Limit Combined with
zz
°°
°C R
°°
Current Sensing
DS(ON)
Enable Control
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z Selectable PWM, DEM, or Ultrasonic Mode
zz
zz
z Internal Soft-Start and Soft-Discharge
zz
zz
z High Efficiency up to 97%
zz
zz
z 5mW Quiescent Power Dissipation
zz
zz
z Thermal Shutdown
zz
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z RoHS Compliant and Halogen Free
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Applications
z Notebook and Sub-Notebook Computers z 3-Cell and 4-Cell Li+ Battery-Powered Devices
Ordering Information
RT8223P
Package Type QW : WQFN-24L 4x4 (W-Type)
Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free)
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Marking Information
20 : Product Code
20 YM
DNN
YMDNN : Date Code
Pin Configurations
(TOP VIEW)
VOUT1
PGOOD
BOOT1
FB1
REF
FB2
1 2 3
GND
4 5 6
78910 1211
VOUT2
VREG3
BOOT2
WQFN-24L 4x4
ENTRIP1
TONSEL
ENTRIP2
UGATE1
LGATE1
PHASE1
21 20 1924 2223
18
ENC
17
VREG5
16
VIN
15
25
UGATE2
GND
14
SKIPSEL
13
EN
LGATE2
PHASE2
DS8223P-01 June 2011 www.richtek.com
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RT8223P
Typical Application Circuit
1
C
0
µ
F
1
Q1
BSC119
N03S
L
1 µ
H
.
8
V
1
T
U
O
5
V
C
2
µ
2
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1
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1
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6
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D
Q3
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V
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/
U
OFF
REF
2V
C
t
r
o
a
3 F
1
C
8
9
µ
F
5
R
4
C
1
2
R
5
1
k
1
3
R
0
1
k
W
P
R
R
2
C
.
0
1
µ
F
1
C
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0
2
µ
2
t
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ON
ON
OFF
V
I
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V
6
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2
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8
R
.
9
3
16
0
1
C
.
0
1
µ
F
4
0
21
0
22
O
1
B
T
O
20 19
24
5 F
14 13
18
VIN
UGATE1
BOOT1
PHASE1 LGATE1
VOUT1
2
FB1
3
REF
4
TONSEL SKIPSEL EN
ENC
RT8223P
UGATE2
BOOT2
PHASE2 LGATE2
GND
VOUT2
FB2
ENTRIP1
ENTRIP2
GND
VREG5
PGOOD
VREG3
R
1
0
0
10
0
9
R
2
T
B
O
O
11 12 15
7 5
R
1
L
M
I
I
1
5
0
1
6 25 (Exposed Pad)
17
23 8
k
R
M
2
I
L
I
5
0
1
k
C
9
µ
.
7
4
6
C
1
7
µ
.
4
Q2 BSC119
N03S
C
1
1
0
.
1
F
µ
Q4 BSC119
N03S
5
R
6
F
0
0
1
k
P 3
F
3
C
1
1
0
F
µ
2
L
µ
7
4
.
H
R
1
1
C
1
4
R
.
6
R
0
1
V
G
3
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1
2
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1
F
V
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T
O
2
3
3
.
V
C
1
7
2
F
µ
2
0
1
2
C
1
4
k
5
1
5
k
0
2
C
F
µ
.
1
0
Functional Pin Description
P in No. Pin Name Pin Function
Chan nel 1 Ena ble an d Curre nt Li mi t Sett ing Inp ut. Co nnec t a r esisto r to GND to set the threshold for channel 1 synchronous R
1 ENTRIP1
2 FB1
3 REF
4 TONSEL
5 FB2
6 ENTRIP2
7 VOUT2 8 VREG3 3.3V Linear Regulator Output.
current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.515V to 3V range. There is an internal 10μA c urren t sou r ce from V REG5 to ENT R IP1. Lea ve ENTRIP1 floating or short ENTRIP1 to GND to shut down channel 1.
SMPS 1 Feedbac k Input. Connect FB1 t o a re sisti ve v olt a ge div ide r fr om VOU T1 to GND to adjust output from 2V to 5.5V.
2V Reference Output. Bypass to GND with a minimum 0.22μF c apac i to r. RE F can so urce up to 10 0μA for exte rnal loa ds. Loadin g REF d egrades FBx and output accuracy according to the REF load-regulation error .
Frequency Selectable Input for VOUT1/VOUT2 respectively. 400kHz/500kHz : Connect to VREG5 or VREG3 300kHz/375kHz : Connect to REF 200kHz/250kHz : Connect to GND
SMPS 2 Feedbac k Input. Connect FB2 t o a re sisti ve v olt a ge div ide r fr om VOU T2 to GND to adjust output voltage from 2V to 5.5V.
Chan nel 2 Ena ble an d Curre nt Li mi t Sett ing Inp ut. Co nnec t a r esisto r to GND to set the threshold for channel 2 synchronous R current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.515V to 3V range. There is an internal 10μA curr ent sourc e from VREG5 to ENT RIP2. Lea ve ENTRIP2 floating or short ENTRIP2 to GND to shut down channel 2.
Byp ass Pi n for SMP S2. Co nn ect to t h e SM P S2 o ut p ut to bypas s effici ent pow er for VREG3 pin. VOUT2 is also for the SMPS2 output soft-discharge.
sense. The GND PHASE1
DS(ON)
sense. The GND PHASE2
DS(ON)
T o be continued
DS8223P-01 June 2011www.richtek.com
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Pin No. Pin Name Pin Function
9 BOOT2
10 UGATE2
11 PHASE2
12 LGATE2
13 EN
14 SKIPSEL
16 VIN Supply Input for 5V/3.3V LDO and Feed Forward On-Time circuitry. 17 VREG5
18 ENC 19 LGATE1
20 PHASE1
21 UGATE1
22 BOOT1 23 PGOOD Power Good Output for Channel 1 and Channel 2. (Logical AND). 24 VOUT1
15, 25
(Exposed Pad)
GND
Boos t Flyin g C ap aci t or C on nec tio n f o r SM PS 2. Conne ct to an ex te r nal cap ac itor ac co rding to the typic al ap p lic ati on cir c ui ts. Upper Gate Dri ver Output for S MPS 2. U GAT E2 swings between PHASE2 and BOOT2. Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the UGAT E2 hi gh s ide gate driv er. PH ASE2 is also the cur rent -sense inp ut for the SMPS2. Lower Gate Driver Output for SMPS2. LGATE2 swings between GND and VREG5. Ma ster E nabl e In put. The REF/V REG 5/VR EG3 ar e e na bled if it is wit hin l ogic high level and disabled if it is less than the logic low level. Operation Mode Selectable Input. Conn ec t to VREG5 or VRE G3 : Ultras on ic Mod e Connect to REF : PWM Mode Connect to GND : DEM Mode
5V Linear Regulator Output. VREG5 is also the supply voltage for the lower gate driver and analog supply voltage for the device. SMPS Enable Input. Pull up to VREG3 or VREG5 to turn on both switch channels. Short to GND to shutdown them. Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and VREG5. Switch Node for SMPS1. PHASE1 is the internal lower supply rail for the UGAT E1 hi gh s ide gate driv er. PH ASE1 is also the cur rent -sense inp ut for the SMPS1.
Upper Gate Dri ver Output for S MPS 1. U GAT E1 swings between PHASE1 and BOOT1.
Boos t Flyin g C ap aci t or C on nec tio n f o r SM PS 1. Conne ct to an ex te r nal cap ac itor ac co rding to the typic al ap p lic ati on cir c ui ts.
Byp ass Pin f or SMPS 1. Co nn ect t o th e SM P S1 outp ut to by pas s effici ent pow er for VREG5 pin. VOUT1 is also for the SMPS1 output soft-discharge.
Gr ound for SMP S C ont rol l er. The exp os ed pad mu st be s olde r ed to a lar ge PCB and con nected to GND for maxi mum power dissipati on.
RT8223P
DS8223P-01 June 2011 www.richtek.com
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RT8223P
Function Block Diagram
BOOT1
UGATE1 PHASE1
LGATE1
FB1
ENTRIP1
EN
ENC
VOUT1
VREG5
VREG5
10µA
SW5 Threshold
TONSEL SKIPSEL
SMPS1
PWM Buck
Controller
Power-On Sequence
Clear Fault Latch
SMPS2
PWM Buck
Controller
SW3 Threshold
VREG5
BOOT2
UGATE2 PHASE2
VREG5
LGATE2
10µA
VOUT2 FB2
ENTRIP2 PGOOD
GND
VREG5
VIN
VREG5
Thermal
Shutdown
REF
REF
VREG3
VREG3
DS8223P-01 June 2011www.richtek.com
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RT8223P
Absolute Maximum Ratings (Note 1)
z VIN, EN to GND ----------------------------------------------------------------------------------------------- 0.3V to 30V z PHASEx to GND
D C---------------------------------------------------------------------------------------------------------------- 0.3V to 30V < 20ns----------------------------------------------------------------------------------------------------------- 8V to 38V
z BOOTx to PHASEx ------------------------------------------------------------------------------------------ 0.3V to 6V z ENTRIPx, SKIPSEL, TONSEL, PGOOD to GND------------------------------------------------------ 0.3V to 6V z VREG5, VREG3, FBx, VOUTx, ENC, REF to GND -------------------------------------------------- 0.3V to 6V z UGA TEx to PHASEx
D C---------------------------------------------------------------------------------------------------------------- 0.3V to (VREG5 + 0.3V) < 20ns----------------------------------------------------------------------------------------------------------- 5V to 7.5V
z LGA TEx to GND
D C---------------------------------------------------------------------------------------------------------------- 0.3V to (VREG5 + 0.3V) < 20ns----------------------------------------------------------------------------------------------------------- 2.5V to 7.5V
z Power Dissipation, P
WQFN-24L 4x4------------------------------------------------------------------------------------------------ 1.923W
z Package Thermal Resistance (Note 2)
WQF N-24L 4x4, θJA------------------------------------------------------------------------------------------ 52°C/W WQF N-24L 4x4, θJC------------------------------------------------------------------------------------------ 7°C/W
z Lead T emperature (Soldering, 10 sec.) ------------------------------------------------------------------ 260°C z Junction T emperature ---------------------------------------------------------------------------------------- 150°C z Storage T emperature Range -------------------------------------------------------------------------------- 65°C to 150°C z ESD Susceptibility (Note 3)
HBM (Human Body Mode)---------------------------------------------------------------------------------- 2kV MM (Machine Mode) ----------------------------------------------------------------------------------------- 200V
@ TA = 25°C
D
Recommended Operating Conditions (Note 4)
z Supply V oltage, V
z Junction T emperature Range ------------------------------------------------------------------------------- 40°C to 125°C z Ambient T emperature Range ------------------------------------------------------------------------------- 40°C to 85°C
------------------------------------------------------------------------------------------ 6V to 25V
IN
DS8223P-01 June 2011 www.richtek.com
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RT8223P
Electrical Characteristics
(V
= 12V, V
IN
Parameter Symbol Test Conditions Min Typ Max Unit
Input Supply
VIN Standby Current I VIN Shutdown Supply
Current Quiesce nt Power
Consumption
SMPS Output and FB Voltage
EN
= V
ENC
= 5V, V
VIN_SBY
I
VIN_SHDN
P +P
ENTRIP1
= V
= 2V, No Load, TA = 25°C, unless otherwise specified)
ENTRIP2
VIN = 6V to 25V, ENTRIPx = GND -- 200 -- μA
= 6V to 25V,
V
VIN
PVCC
IN
ENTRIPx = EN = GND Both SMPS On, V
SKIPSEL = GND, V (Note 5)
= 2. 1V,
FBx
OUT1
= 5V, V
OUT2
= 3. 3 V
-- 20 40 μA
-- 5 7 mW
DEM Mod e 1 .97 5 2 2.02 5
FBx Voltage V
Out p ut Vol ta ge Ad ju st Range
V
Discharge
OUTx
Current
V
V
On-Time
On-Time Pulse Width tON
Minimum Off-Time t Ultrasonic Mode
Frequency
SKIPSEL = VREG5 or VREG3 22 33 -- kHz
Soft-Start
Soft-S t art Time t
Cur r ent S ens e
ENTRIPx Source Current
I
ENTRIPx Current Temperature
TC Coefficient ENT RIP x Ad ju stme n t Range Current Limit Threshold Zero-Current Threshold
V
GND − PHASEx, V
GND − PHASEx in DEM -- 3 -- mV
FBx
PWM Mode (Note 6) -- 2 --
V
Ultrasonic Mode -- 2.032 --
SMPS1, SMPS2 2 -- 5.5 V
OUTx
= 0.5V, V
OUTx
ENTRIPx
TONSEL = GND
TONSEL = REF
TONSEL = REG5
V
OFF
Internal Soft-Start -- 2 -- ms
SSx
ENTRIPx
V
IENTRIPx
= 1.9V 200 300 4 00 ns
FBx
ENTRIPx
= 0.9V 9.4 10 10.6 μA
In Comparison with 25°C (Note 6) -- 4700 -- ppm/°C
ENTRIPx
= I
ENTRIPx
= 0V 10 45 -- mA
V
= 5.05 V (200k H z) 189 5 2105 2 315
OUT1
= 3.33V (250kH z ) 9 99 1110 1221
V
OUT2
V
= 5.05 V (300k H z) 122 7 1403 1 579
OUT1
= 3.33 V (375k H z) 647 740 8 33
V
OUT2
V
= 5.05 V (400k H z) 895 1052 1 209
OUT1
V
= 3.33 V (500k H z) 475 555 6 35
OUT2
x R
ENTRIPx
ENTRIPx
0.515 -- 3 V
= 2V 180 200 220 mV
ns
T o be continued
DS8223P-01 June 2011www.richtek.com
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Parameter Symbol Test Conditions Min Typ Max Unit
Internal Regulator and Reference
VREG5 Outpu t Volta g e V
VREG3 Outpu t Volta g e V
VREG5 Outpu t Cu rrent I
VREG5
VREG3
VREG5
V
OUT1
V
OUT1
I
VREG5
V
OUT1
I
VREG5
V
OUT2
V
OUT2
I
VREG3
V
OUT2
I
VREG3
V
VREG5
= GND, I
< 100mA 4.8 5 5.2
VREG5
= GND, 6.5V < VIN < 25V,
< 100mA
= GND, 5.5V < VIN < 25V,
< 50mA
= GND, I = GND, 6.5V < VIN < 25V,
< 100mA
= GND, 5.5V < VIN < 25V,
< 50mA
= 4.5V , V
< 100mA 3.2 3.33 3.46
VREG3
= GND 100 175 250 mA
OUT1
RT8223P
4.75 5 5.25
4.75 5 5.25
3.13 3.33 3.5
3.13 3.33 3.5
V
V
VREG3 Outpu t Cu rrent I VR EG5 Switc h-o v er
Threshold to V
OUT1
VR EG3 Switc h-o v er Threshold to V
OUT2
VREGx Switch-over Equi vale nt Resistance
REF Output Voltage V REF Load Reg ulation 0 < I
V
VREG3
V
V
SW5
V V
V
SW3
VREGx to V
R
SWx
No External Load 1.98 2 2.02 V
REF
V
= 3V, V
VREG3
Rising Edge 4.6 4.75 4.9
OUT1
Falling Edge 4.3 4. 4 4.5
OUT1
Rising Edge 2.975 3.125 3.25
OUT2
Falling Edge 2.775 2.875 2.975
OUT2
OUTx
< 100μA -- 10 -- mV
LOAD
= GND 100 175 250 mA
OUT2
, 10mA -- 1.5 3 Ω
V
V
REF Sink Current REF in Reg ulation 5 -- -- μA
UVLO
VREG5 Under Volt age Lockout Threshol d
VREG3 Under Volt age Lockout Threshol d
SMPSx off -- 2.5 -- V
Rising Edge -- 4.2 4.45
V
Falli ng Edge 3.7 3. 9 4.1
Powe r Go od
PGOO D Detect, FBx falling Edge 82 85 88
PGOOD Threshold
PGOO D Prop agat ion Delay
Hy s tere s is , Rising Edge with SS De lay Time
-- 6 --
Falling Edge, 50mV Overdrive -- 10 -- μs
%
PGOO D Lea kage Current High State, Forc ed to 5.5V -- -- 1 μA PGOOD Output Low
Voltage
I
= 4mA -- -- 0.3 V
SINK
Fault Detection
Over Voltage Protection Tr ip Thresh old
Over Voltage Protection Propagation Delay
Unde r Vol tage Protection Tr ip Thresh old
V
FB_OVP
FBx = 2.35V -- 5 -- μs
V
FB_UVP
OVP Detect, FBx Rising Edg e 109 112 1 16 %
U VP Detect , FBx Fall ing Edge 49 52 56 %
T o be continued
DS8223P-01 June 2011 www.richtek.com
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RT8223P
Parameter Symbol Test Conditions Min Typ Max Unit
UVP Shutdown Blanking Time t
SHDN_UVP
Thermal Shutdown
Thermal Shutdown T
SHDN
Thermal Shutdown Hysteresis -- 10 -- °C
Logic Input
SKIPSEL Input Volt age
ENTR IPx
ENTRIPx Low Level Threshold
EN Threshold Voltage
Logic-High VIH 2.4 -- -­Logic-Low V
-- -- 0.4
IL
EN Voltage VEN Floating, Default Enable 2.4 3. 3 4.2 V EN Current IEN
ENC Threshold Voltage
Logic-High V Logic-Low V
IH_ENC
IL_ENC
From ENTRIPx Enable -- 5 -- ms
-- 150 -- °C
Low Level (DEM Mode) -- -- 0.8 REF Level ( PW M Mode) 1. 8 -- 2.3 High Level (Ultrasonic Mode) 2.7 -- -­Low Level (SMPS Off) -- -- 0.25 On Level (SMPS On) 0.515 -- 3 ENTRIPx Input Voltage V High Level (SMPS Off) 4.5 -- -­Rising Edge -- 0.4 0.515 Falling Edge 0.25 0.36 --
V
= 0.2V , Source 1.5 3 5
EN
= 5V, Sink -- 3 8
V
EN
2 -- --
-- -- 0.6
V
V
V
V
μA
V
Input Leakage Current
Inter nal BOOT Switch
Internal Boost Switch On-Resistance
Power MOSFET Dri vers
UGATE x On-Resistance
LGATE x On-Resistance
Dead Time
V
/ V
OUT1
V
/ V
OUT1
/ V
V
OUT1
V
TONSEL
V
= 0V or 5V 1 -- 1
ENC
VREG5 to BOOTx, 10mA -- 40 80 Ω
UGA TEx, High State, BOOTx to PHASEx F orced to 5V UGATEx, Low St at e, BOOTx to PHASEx F orced to 5V
LGATEx , High St ate -- 4 8
= 200kHz/250kHz -- -- 0.8
OUT2
= 300kHz/375kHz 1.8 -- 2.3 TONSEL Sett i ng Voltage
OUT2
= 400kHz/500kHz 2.7 -- --
OUT2
, V
SKIPSEL
= 0V or 5V 1 -- 1
-- 4 8
-- 1.5 4
V
μA
Ω
Ω
LGATEx , Low State -- 1. 5 4 LGA TEx Ri sing -- 30 --
ns
UGATE x Rising -- 40 --
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