Richtek RT8055GQW, RT8055GSP, RT8055ZQW Schematic [ru]

®
3A, 2MHz, Synchronous Step-Down Converter
RT8055
General Description
The RT8055 is a high efficiency synchronous, step-down DC/DC converter. Its input voltage range is from 2.6V to
5.5V and provides a n adjustable regulated output voltage from 0.8V to 5V while delivering up to 3A of output current.
The internal synchronous low on-resistance power switches increase efficiency and eliminate the need for an exter
set by an external resistor . The 100% duty cycle provides low dropout operation extending battery life in portable systems. Current mode operation with external compensation allows the transient response to be optimized over a wide range of loa ds and output ca pacitors.
The RT8055 is operated in forced continuous PWM Mode which minimizes ripple voltage a nd reduces the noise and RF interference.
The RT8055 is available in the WDFN-10L 3x3 and SOP-8 (Exposed Pad) packages.
nal Schottky diode. The switching frequency is
Features
zz
High Efficiency : Up to 95%
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zz
z Low R
zz
zz
z Programmable Frequency : 300kHz to 2MHz
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z No Schottky Diode Required
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z 0.8V Reference Voltage Allows for Low Output
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Internal Switches : 100m
DS(ON)
ΩΩ
Ω
ΩΩ
Voltage
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z Forced Continuous Mode Operation
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z 100% Duty Cycle Operation
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z Input Over Voltage Protection
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z RoHS Compliant and Halogen Free
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Applications
z Portable Instruments z Battery-Powered Equipment z Notebook Computers z Distributed Power Systems z IP Phones z Digital Camera s z 3G/3.5G Data Card
Ordering Information
RT8055
Package Type QW : WDFN-10L 3x3 (W-Type) SP : SOP-8 (Exposed Pad-Option 2)
Lead Plating System G : Green (Halogen Free and Pb Free) Z : ECO (Ecological Element with Halogen Free and Pb free)
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Pin Configurations
(TOP VIEW)
SHDN/RT
SHDN/RT
GND
PGND
1 2
GND
3
LX
4
LX
5
PGND
WDFN-10L 3x3
2
GND
3
LX
4
SOP-8 (Exposed Pad)
GND
11
10
COMP
9
FB
8
VDD
7
PVDD
6
PVDD
8
COMP
7
FB
6
9
VDD
5
PVDD
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DS8055-05 November 2012 www.richtek.com
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RT8055
Marking Information
RT8055GQW RT8055GSP
JN= : Product Code
JN=YM
YMDNN : Date Code
DNN
RT8055ZQW
JN : Product Code
JN YM
YMDNN : Date Code
DNN
Typical Application Circuit
V
IN
5V
C
IN
22µF
C1
0.1µF
R 180k
OSC
PVDD
RT8055
VDD
SHDN/RT GND
PGND
COMP
RT8055 GSPYMDNN
L1
2µH
LX
FB
R 30k
COMP
C
COMP
470pF
RT8055GSP : Product Number YMDNN : Date Code
V
OUT
3.3V/3A
OUT
R1 75k
R2 24k
C 22µF x 2
Table 1. Recommended Component Selection
V
R1 (kΩ) R2 (kΩ) R
OUT
COMP
(kΩ) C
(nF) L1 (μH) C
COMP
OUT
(μF)
3.3 75 24 30 0.47 2.2 22 x 2
2.5 51 24 27 0.47 2.2 22 x 2
1.8 30 24 22 0.47 2.2 22 x 2
1.5 21 24 18 0.47 2.2 22 x 2
1.2 12 24 15 0.47 1.0 22 x 2
1.0 6 24 13 0.47 1.0 22 x 2
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Functional Pin Description
RT8055
Pin No.
WDFN-10L 3x3 SOP-8
1 1 SHDN/RT
2,
11 (Exposed Pad)
9 (Expos ed Pad)
2,
3, 4 3 LX
5 4 PGND
6, 7 5 PVDD Powe r Supp ly Input. D eco upl e this pin to P G ND with a cap aci tor .
8 6 VDD
9 7 FB
10 8 COMP
Pin Name Pin Function
Shutdown Control or Frequency Setting Input. Connect a resistor to ground from this pin sets the switching frequency. Force t hi s pin to V
or GND caus es the dev ice to be shu t dow n.
DD
Signal Ground. All small-signal components and compensation com pon ent s sh ou ld b e co nn ect ed t o th is g ro und , wh ich in t urn
GND
connects to PGND at one point. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Internal Power MOSFET Switches Output. Connect this pin to the inductor. Powe r Ground. Conne ct this pin cl ose to the neg ativ e termin al of C
and C
IN
OUT
.
Signal Supply Input. Dec ouple this pin to GND with a capac itor. Generally, V
is equal to PVDD.
DD
Feedback Pin. This pin receives the feedback voltage from a resistive d ivider connected acr oss the output. Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Connect external compens ation elem ents to this pin to stabilize the control loop.
Function Block Diagram
SD
COMP
0.8V
FB
EA
Internal ­Soft Star
POR
VDD
SHDN/RT
Output Clamp
0.7V
0.4V
OSC
Slope
Comp.
Control
Logic
OTP
VREF
ISEN
OC
Limit
Driver
NISEN
N-MOSFET I
PVDD
LX
PGND
LIM
GND
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RT8055
Absolute Maximum Ratings (Note 1)
z Supply Input V oltage, V DD, PV DD ----------------------------------------------------------------------------0.3V to 6.5V z LX Pin Switch Voltage --------------------------------------------------------------------------------------------0.3V to (PVDD + 0.3V)
<10ns ----------------------------------------------------------------------------------------------------------------5V to 8.5V
z Other I/O Pin Voltages -------------------------------------------------------------------------------------------0.3V to 6.5V z LX Pin Switch Current -------------------------------------------------------------------------------------------- 4A z Power Dissipation, P
W D FN-10L 3x3-----------------------------------------------------------------------------------------------------1.667W
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------1.333W
z Package Thermal Re sistance (Note 2)
W DFN-10L 3x3, θJA-----------------------------------------------------------------------------------------------6 0 °C/W
WDFN-10L 3x3, θJC-----------------------------------------------------------------------------------------------7.8°C/W SOP-8 (Exposed Pad), θJA-------------------------------------------------------------------------------------7 5 °C/W SOP-8 (Exposed Pad), θJC-------------------------------------------------------------------------------------1 5 °C/W
z Junction T emperature---------------------------------------------------------------------------------------------150°C z Lead Temperature (Soldering, 10 sec.)-----------------------------------------------------------------------260°C z Storage T emperature Range ------------------------------------------------------------------------------------65°C to 150°C z ESD Susceptibility (Note 3)
HBM (Human Body Model)--------------------------------------------------------------------------------------2kV
@ TA = 25°C
D
Recommended Operating Conditions (Note 4)
z Supply Input V oltage----------------------------------------------------------------------------------------------2.6V to 5.5V z Junction T emperature Range------------------------------------------------------------------------------------ z Ambient T emperature Range------------------------------------------------------------------------------------
40°C to 125°C
40°C to 85°C
Electrical Characteristics
(V
= 3.3V, T
DD
Input Voltage Range VDD 2.6 -- 5.5 V Feedback Reference Voltage V Feedback Leakage Current IFB V
DC Bias Current
Output Voltage Line Regulation ΔV Output Voltage Load Regulation ΔV Error Amplifier
Transconductance
= 25°C, unless otherwise specified)
A
Parameter Symbol Test Conditions Min Typ Max Unit
0.784 0.8 0.816 V
REF
= 3.3V -- -- 0.1 μA
FB
Active , VFB = 0.7V, Not Switchin g -- 500 - - μA Shutdown -- -- 1 μA
VIN = 2.6V to 5.5V -- 0.1 -- %/V
LINE
LOAD
= 5V, V
V
IN
I
= 0A to 3A
OUT
= 3.3V,
OUT
-- 0.4 -- %
gm -- 400 -- μA/V
Current Sense Transresistance RS -- 0.4 -- Ω RT Leakage Current SHDN/RT = VIN = 5.5V -- -- 1 μA
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Parameter Symbol Test Conditions Min Typ Max Unit
Switch ing Frequency
RT8055
R
= 180kΩ 1.44 1.8 2.16
OSC
Adjustable Switching Frequency Range
0.3 -- 2
MHz
Switch On Resistance, High R Switch On Resistance, Low R Peak Current Limit I
Under Voltage Lockout Threshold (Note 5)
Shutdown Threshold V
Note 1. Stresses beyond those listed Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.
Note 2. θ
Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guaranteed by design.
is measured at T
JA
measured at the exposed pad of the package.
DS(ON)_P ISW DS(ON)_N ISW
3.5 -- -- A
LIM
V V
V
SHDN
= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
A
= 0.3A -- 100 160 mΩ = 0.3A -- 100 170 mΩ
Rising @Full Temperature 2.33 2.4 2.57
DD
Falling @Full Temperature 1.98 2.2 2.37
DD
Rising -- VIN 0.85 VIN 0. 4 V
SHDN
V
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