Richtek RT8011AGQW, RT8011APQW, RT8011GF, RT8011GQW, RT8011PF Schematic [ru]

2A, 4MHz, Synchronous Step-Down Regulator

RT8011/A

General Description

The RT801 1/A is a high efficiency synchronous, ste p-down
DC/DC converter. Its input voltage range is from

2.6V to

5.5V and provides a n adjustable regulated output voltage
from 0.8V to 5V while delivering up to 2A of output current.

The internal synchronous low on-resistance power

switches increase efficiency and eliminate the need for
an external Schottky diode. Switching frequency is set
by an external resistor or can be synchronized to an
external clock. 100% duty cycle provides low dropout
operation extending battery life in portable systems.
Current mode operation with external compensation
allows the transient response to be opti mized over a wide
range of loads a nd output ca pa citors.

RT801 1/A operation in f orced continuous PWM Mode which

minimizes ripple voltage and reduces the noise and RF
interference.

100% duty cycle in Low Dropout Operation further
maximize battery life.

Ordering Information

RT8011/A

Package Type
F : MSOP-10 (RT8011)
QW : WDFN-10L 3x3 (RT8011)
QW : WDFN-8EL 3x3 (RT8011A)

Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)

Without SYNC and PGOOD Function
With SYNC and PGOOD Function

Note :
Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

Features

zz

High Efficiency : Up to 95%

z

zz

zz

z Low R

zz

zz

z Programmable Frequency : 300kHz to 4MHz

zz

zz

z No Schottky Diode Required

zz

zz

z 0.8V Reference Allows Low Output Voltage

zz

zz

z Forced Continuous Mode Operation

zz

zz

z Low Dropout Operation : 100% Duty Cycle

zz

zz

z Synchronizable Switching Frequency (For RT8011

zz

Internal Switches : 110m

DS(ON)

ΩΩ

Ω

ΩΩ

Only)

zz

z Power Good Output Voltage Monitor (For RT8011

zz

Only)

zz

z RoHS Compliant and 100% Lead (Pb)-Free

zz

Applications

z Portable Instruments
z Battery-Powered Equipment
z Notebook Computers
z Distributed Power Systems
z IP Phones
z Digital Camera s

Pin Configurations

(TOP VIEW)

SHDN/RT

SYNC

GND

LX

PGND

SHDN/RT

SYNC

GND

LX

PGND

1
2
3
4
5

10

9
8
7

WDFN-10L 3x3

2
3
4
5

MSOP-10

COMP
FB
PGOOD
VDD

9

PVDD

10

9
8
7
6

SHDN/RT

GND

LX

PGND

COMP
FB
PGOOD
VDD
PVDD

1
2
3
4

8
7
6
5

WDFN-8EL 3x3

COMP
FB
VDD
PVDD

Marking Information

For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.

DS8011/A-02 March 2011 www.richtek.com

1

RT8011/A

Typical Application Circuit

V

IN

2.6V to 5.5V
R

OSC

332k

Figure 1. T ypical Application Circuit for RT8011

V

IN

2.6V to 5.5V

R

OSC

332k

1

SHDN/RT

2

SYNC

3

GND

4

LX

5

PGND

1

SHDN/RT

2

GND

3

LX

4

PGND

RT8011

PGOOD

L1

2.2uH

RT8011A

L1

2.2uH

COMP

FB

VDD

PVDD

COMP

FB

VDD

PVDD

R1

510k

C
1000pF

C
1000pF

R1
510k

C

OUT

22uF

COMP

R2

C

22uF

COMP

R2

22pF

OUT

240k

C1

240k

V

OUT

2.5V/2A

V

OUT

2.5V/2A

R

COMP

R

C

IN

22uF

C

IN

22uF

PGOOD

100k

R

COMP

13k

13k

10

9

8

7
6

8

7
6

5

Figure 2. T ypical Application Circuit f or RT801 1A

Note : Using all Ceramic Capacitors

Table 1

Component Supplier Series Inductance (μH) DCR (mΩ) Current Rating (mA) Dimensions (mm)

TAIYO YUDEN NR 4018 2.2 60 2700 4x4x1.8

Sumida CDRH4D28 2.2 31.3 2040 4.5x4.5x3

GOTREND GTSD53 2.2 29 2410 5x5x2.8

ABC SR0403 2.2 47 2600 4.5x4x3.2

Table 2

Component Supplier Part No. Capacitance (μF) Case Size

TDK C3225X5R0J226M 22 1210
TDK C3225X5R0J226M 22 1210

TDK C2012X5R0J106M 10 0805
Panasonic ECJ4YB0J226M 22 1210
Panasonic ECJ4YB1A226M 22 1210
Panasonic ECJ4YB1A106M 10 1210

TAIYO YUDEN LMK325BJ226ML 22 1210
TAIYO YUDEN JMK316BJ226ML 22 1206
TAIYO YUDEN JMK212BJ106ML 10 0805

DS8011/A-02 March 2011www.richtek.com

2

Layout Guide

RT8011/A

CIN must be placed between

and GND as closer as

V

DD

possible

V

IN

PGOOD

R1

C

R2

F

V

OUT

Connect the FB pin directly to feedback resistors. The
resistor divider must be connected between V
GND.

PVDD

VDD

COMP

R

COMP

C

COMP

C

IN

RT8011

6
7
8

FB

9

10

GND

5
4
3
2
1

GND

Output capacitor must
be near RT8011

V

OUT

C

OUT

PGND
LX
GND
SYNC
SHDN/RT

and

OUT

LX should be
connected to
Inductor by wide
and short trace,
keep sensitive
compontents away

L1

from this trace

V

IN

R

OSC

C

F

V

OUT

Figure 3. RT801 1 Layout Guide

CIN must be placed between
V

DD

possible

V

IN

R1

R2

Connect the FB pin directly to feedback resistors. The
resistor divider must be connected between V
GND.

Figure 4. RT801 1A Layout Guide

Functional Pin Description

Pin Number Pin Function

RT8011 RT8011A

1 1 SHDN/RT

2 -- SYNC

3 2 GND

Pin Name

Oscillator Res istor Input. Connec ting a resistor to gro und from this pin s ets
the switching frequency. Forcing this pin t o VDD causes the device to be shut
down.
External Clock Synchronization Input. The oscillation frequency can be
synchronized to an external oscillation app lied to this pin. When tied to VDD,
internal oscillator is selected.
Signal Ground. All small-si gnal components and compensation com ponents
should connect to this ground, which in turn connects to PGND at one point.

and GND as closer as

C

IN

RT8011A

PVDD

VDD

COMP

R

COMP

C

COMP

5

63

7

8

GND

Output capacitor must
be near RT8011A

GND

4

2

1

C

OUT

PGND
LX
GNDFB

SHDN/RT

V

OUT

OUT

and

L1

R

OSC

LX should be
connected to
Inductor by wide
and short trace,
keep sensitive
compontents away
from this trace

4 3 LX Internal Power MOSFET Switches Output. Connect this pin to the inductor.
5 4 PGND Power Ground. Connect this pin close to the (−) terminal of CIN and C

OUT

.

6 5 PVDD Po wer Inp ut Sup ply. Decouple this pin to PGND with a capac itor.

7 6 VDD

8 -- PGOOD

9 7 FB

Signal Input Supply. Decouple this pin to GND with a capacitor. Normally V
is equal to PVDD.
Power Good Indicator. Open-drain logic output that is pulled to grou nd when
the output voltage is not within ±12.5% of regulation point.
Feedback Pin. Receives the feedback voltage from a resistive divider
connected across the output.

DD

Error Amplifier Compensation Point. The current comparator threshold

10 8 COMP

increases with this control voltage. Connect external compensation elements
to this pin to stabilize the control loop.

DS8011/A-02 March 2011 www.richtek.com

3

RT8011/A

Function Block Diagram

SHDN/RT

SYNC

COMP

FB

0.8V

POR

VDD

EA

Int-SS

SD

Output
Clamp

0.9V

0.7V

0.4V

OSC

Slope
Com

V

REF

RT801 1

Control

Logic

OTP

ISEN

OC

Limit

Driver

NISEN

NMOS I Limit

PVDD

LX

PGND

PGOOD

GND

COMP

FB

0.8V

POR

VDD

EA

Int-SS

SD

Output
Clamp

SHDN/RT

OSC

0.9V

0.7V

0.4V

Slope
Com

V

REF

RT801 1A

Control

Logic

OTP

ISEN

OC

Limit

Driver

NISEN

NMOS I Limit

PVDD

LX

PGND

GND

DS8011/A-02 March 2011www.richtek.com

4

Operation

RT8011/A

Main Control Loop

The RT801 1/A is a monolithic, consta nt-frequency , current
mode step-down DC/DC converter. During normal
operation, the internal top power switch (P-Channel
MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the peak
inductor current reach the value defined by the voltage on
the COMP pin. The error a mplifier adjusts the voltage on
the COMP pin by comparing the feedback signal from a
resistor divider on the FB pin with an internal 0.8V
reference. When the load current increases, it causes a
reduction in the feedback voltage relative to the reference.
The error amplifier raises the COMP voltage until the
average inductor current matches the new load current.
When the top power MOSFET shuts off, the synchronous
power switch (N-Channel MOSFET) turns on until either
the bottom current limit is rea ched or the beginning of the
next clock cycle.

The operating frequency is set by an external resistor
connected between the RT pin a nd ground. The practical
switching frequency can range from 300kHz to 4MHz.
Power Good comparators will pull the PGOOD output low
if the output voltage comes out of regulation by 12.5%. In
an over-voltage condition, the top power MOSFET is turned
off and the bottom power MOSFET is switched on until
either the over-voltage condition clears or the bottom
MOSFET's current limit is rea ched.

Frequency Synchronization

The internal oscillator of the RT801 1 can be synchronized
to an external clock connected to the SYNC pin. The
frequency of the external clock can be in the range of
300kHz to 4MHz. For this application, the oscillator ti ming
resistor should be chosen to correspond to a frequency
that is about 20% lower than the synchronization
frequency .

The output voltage will then be determined by the input
voltage minus the voltage drop across the internal
P-Channel MOSFET a nd the inductor.

Low Supply Operation

The RT8011/A is designed to operate down to an input
supply voltage of 2.6V. One important consideration at
low input supply voltages is that the R
P-Channel a nd N-Cha nnel power switches increase s. The
user should calculate the power dissipation when the
RT8011/A is used at 100% duty cycle with low input
voltages to ensure that thermal limits are not exceeded.

Slope Compensation and Inductor Peak Current

Slope compensation provides stability in constant
frequency architectures by preventing sub-harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by a dding a compensating ra mp
to the inductor current signal. Normally, the maximum
inductor peak current is reduced when slope compensation
is added. In the RT8011/A, however, separated inductor
current signals are used to monitor over current condition.
This keeps the maximum output current relatively constant
regardless of duty cycle.

Short-Circuit Protection

When the output is shorted to ground, the inductor current
decays very slowly during a single switching cycle. A
current runaway detector is used to monitor inductor
current. As current increa sing beyond the control of current
loop, switching cycles will be skipped to prevent current
runaway from occurring.

DS(ON)

of the

Dropout Operation

When the input supply voltage decrea ses toward the output
voltage, the duty cycle increases toward the maximum
on-time. Further reduction of the supply voltage forces
the main switch to remain on for more than one cycle
eventually reaching 100% duty cycle.

DS8011/A-02 March 2011 www.richtek.com

5

RT8011/A

Absolute Maximum Ratings (Note 1)

z Supply Input V oltage, V DD, PV DD ----------------------------------------------------------------------------−0.3V to 6V

z LX Pin Switch Voltage-------------------------------------------------------------------------------------------- −0.3V to (PV DD + 0.3V)
z Other I/O Pin Voltages -------------------------------------------------------------------------------------------−0.3V to (VDD + 0.3V)
z LX Pin Switch Current -------------------------------------------------------------------------------------------- 4A
z Power Dissipation, P

MSOP-10------------------------------------------------------------------------------------------------------------ 467mW
W D FN-10L 3x3-----------------------------------------------------------------------------------------------------909mW
WDF N-8EL 3x3 ----------------------------------------------------------------------------------------------------909mW

z Package Thermal Re sistance (Note 2)

MSOP-10, θJA------------------------------------------------------------------------------------------------------214°C/W
W DFN-10L 3x3, θJA-----------------------------------------------------------------------------------------------11 0°C/W
W DFN-8EL 3x3, θJA-----------------------------------------------------------------------------------------------11 0°C/W

z Junction T emperature---------------------------------------------------------------------------------------------150°C
z Lead Temperature (Soldering, 10 sec.)----------------------------------------------------------------------- 260°C
z Storage T emperature Range ------------------------------------------------------------------------------------ −65°C to 150°C

z ESD Susceptibility (Note 3)

HBM (Human Body Mode) -------------------------------------------------------------------------------------- 2kV

MM (Ma chine Mode)---------------------------------------------------------------------------------------------- 200V

@ TA = 25°C

D

Recommended Operating Conditions (Note 4)

z Supply Input V oltage----------------------------------------------------------------------------------------------2.6V to 5.5V
z Junction T emperature Range------------------------------------------------------------------------------------
z Ambient T emperature Range------------------------------------------------------------------------------------

−40°C to 125°C

−40°C to 85°C

Electrical Characteristics

(V

= 3.3V, T

DD

Input Voltage Range VDD 2.6 -- 5.5 V
Feedback Voltage VFB 0.784 0.8 0.816 V

DC Bias Current

Output Voltage Line Regulation VIN = 2.7V to 5.5V -- 0.04 -- %/V
Output Voltage Load Regulation 0A < I

Error Amp lifi e r
Transconductance

Current Sense Transresistance RT -- 0.4 -- Ω

= 25°C, unless otherwise specified)

A

Parameter Symbol Test Conditions Min Typ Max Unit

Active , VFB = 0.78V, Not Switching -- 460 -- μA
Shutdown -- -- 1 μA

< 2A -- 0.25 - - %

LOAD

g

-- 800 -- μs

m

Power Good Range -- ±12.5 ±15 %
Power Good Pull-Down

Resistance

-- -- 120 Ω

To be continued

DS8011/A-02 March 2011www.richtek.com

6

RT8011/A

Parameter Symbol Test Conditions Min Typ Max Unit

Switching Frequ ency

R

= 332k 0.8 1 1.2 MHz

OSC

Switching Frequency 0.3 -- 4 MHz

Sync Frequency Range 0 .3 -- 4 M Hz

Switch On Resistance, High R
Switch On Resistance, Low R

Peak Current Limit I
Under Voltage Lockout

Threshold

V
V

ISW = 0.5A -- 110 160 mΩ

PMOS

ISW = 0.5A -- 110 170 mΩ

NMOS

2.2 3.2 -- A

LIM

Rising -- 2.4 -- V

DD

Falling -- 2.3 -- V

DD

Shutdown Threshold -- VIN − 0.7 VIN − 0.4 V

Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.

Note 2. θ

Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

is measured in the natural convection at TA = 25°C on a effective single layer thermal conductivity test board of

JA

JEDEC thermal measurement standard.

DS8011/A-02 March 2011 www.richtek.com

7

RT8011/A

Typical Operating Characteristics

Efficiency vs. Output Current

100

90
80
70
60
50
40

Efficiency (%)

30
20
10

0

0 250 500 750 1000 1250 1500 1750 2000 2250

VIN = 5V, V

VIN = 3.3V, V

OUT

= 1.8V

OUT

= 1.8V

Output Current (mA)

Frequency v s . Temperature

1100

1080

VIN = 3.3V, V
I

= 0A

OUT

OUT

= 1.8V

Output Voltage ( V)

Output Voltage vs. Output Current

1.810

VIN = 3.3V

1.808

1.806

1.804

1.802

1.800

1.798

1.796

1.794

1.792

1.790
0 250 500 750 1000 1250 1500 1750 2000

Output Current (mA)

Peak Current Limited vs. Input Voltage

4.0

V

= 2.5V

OUT

3.5

1060

1040

Frequency ( kH z)

1020

1000

-50 -25 0 25 50 75 100 125

Temperature

(°C)

Quiescent Current vs. Input Voltage

550

530

510

490

470

Quiescent Current (uA)

3.0

2.5

Peak Current Limited ( A)

2.0
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5

Input Voltage ( V )

Quiescent Current vs. Temperature

500

VIN = 3.3V

480

460

440

420

Quiescent C urrent (uA)

450

3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5

Inp ut Voltage (V)

400

-50 -25 0 25 50 75 100 125

Temperature

(°C)

DS8011/A-02 March 2011www.richtek.com

8

RT8011/A

1.820

1.815

1.810

1.805

1.800

1.795

1.790

Output Volt age (V)

1.785

1.780

V

OUT

(50mV/Div)

Output Voltage vs. Temperature

VIN = 3.3V

-50-250 255075100125

Temperature

(°C)

Load Transient Response

VIN = 3.3V, V

= 0A to 2A

I

OUT

OUT

= 2.5V

0.805

0.804

0.803

(V)

REF

0.802

V

0.801

0.800

V

OUT

(50mV/Div)

V

vs. Inpu t Voltage

REF

3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5

Inpu t Volt age (V)

Load Transient Response

VIN = 3.3V, V

= 1A to 2A

I

OUT

OUT

= 2.5V

I

LX

(1A/Div)

V

OUT

(10mV/Div)

V

LX

(5V/Div)

I

LX

(2A/Div)

VIN = 3.3V, V

= 2A

I

OUT

Time (50μs/Div)

Output Ripple

= 2.5V

OUT

Time (250ns/Div)

I

LX

(1A/Div)

V

OUT

(10mV/Div)

V

LX

(5V/Div)

I

LX

(2A/Div)

VIN = 5V, V
I

= 2A

OUT

Time (50μs/Div)

Output Ripple

= 2.5V

OUT

Time (250ns/Div)

DS8011/A-02 March 2011 www.richtek.com

9

RT8011/A

V

IN

(2V/Div)

PGOOD
(2V/Div)

V

OUT

(2V/Div)

I

LX

(2A/Div)

V

IN

(2V/Div)

V

OUT

(2V/Div)

V

LX

(5V/Div)

I

LX

(2A/Div)

Power Good

VIN = 3.3V, V
I

= 2A

OUT

= 2.5V

OUT

Time (1ms/Div)

Power On & Inductor Current

VIN = 5V, V
I

= 2A

OUT

OUT

= 2.5V

V

IN

(2V/Div)

V

OUT

(2V/Div)

V

LX

(5V/Div)

I

LX

(2A/Div)

V

IN

(2V/Div)

V

LX

(5V/Div)

V

OUT

(2V/Div)

I

IN

(2A/Div)

Power On & Inductor Current

VIN = 3.3V, V
I

= 2A

OUT

= 2.5V

OUT

Time (1ms/Div)

Soft Start and Inrush Current

VIN = 3.3V, V
I

= 2A

OUT

OUT

= 2.5V

(2V/Div)

(5V/Div)

(2V/Div)

(2A/Div)

10

V

V

V

OUT

I

Time (1ms/Div)

Time (2.5ms/Div)

Soft Start and Inrush Current

VIN = 5V, V
I

= 2A

OUT

IN

LX

IN

= 2.5V

OUT

Time (2.5ms/Div)

DS8011/A-02 March 2011www.richtek.com

RT8011/A

Application Information

The basic R T8011/A a pplication circuit is shown in T ypical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and C

OUT

.

Operating Frequency

Selection of the operating frequency is a tradeoff between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequency improves efficiency by
reducing internal gate charge and switching losses but
requires larger inductance a nd/or capa citance to maintain
low output ripple voltage.

The operating frequency of the RT801 1/A is determined
by an external resistor that is connected between the R T
pin and ground. The value of the resistor sets the ramp
current that is used to charge and discharge an internal
timing ca pacitor within the oscillator . The RT resistor value
can be determined by examining the frequency vs. RT
curve. Although frequencies a s high a s 4MHz are possible,
the minimum on-time of the RT801 1/A imposes a minimum
limit on the operating duty cycle. The minimum on-time
is typically 110ns. Therefore, the minimum duty cycle is
equal to 100 x 1 10ns x f(Hz).

Inductor Selection

For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increa ses with higher VIN and decrea ses
with higher inductance.

V

⎡

I

=Δ

L

⎢

Lf

×

⎣

V

⎡

⎤

1

−

⎢

⎥

⎣

⎦

⎤

OUTOUT

⎥

V

IN

⎦

Having a lower ripple current reduces the ESR losses in
the output capa citors and the output voltage ri pple. Highest
efficiency operation is a chieved at low frequency with small
ripple current. This, however , requires a large inductor . A
reasonable starting point for selecting the ripple current
is ΔI = 0.4(I

). The largest ripple current occurs at the

MAX

highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :

⎡

L(MAX)

⎤

V

1

−

⎢

⎥

V

IN(MAX)

⎣

⎦

⎡

V

L

=

DS8011/A-02 March 2011 www.richtek.com

OUT

⎢

If

Δ×

⎣

OUT

⎤
⎥

⎦

The transition from low current operation begins when the
peak inductor current falls below the minimum peak
current. Lower inductor values result in higher ripple current
which causes this to occur at lower load currents. This
causes a dip in efficiency in the upper ra nge of low current
operation.

4.5
4

3.5
3

2.5
2

1.5

Frequency (M H z)

1

0.5
0

0 100 200 300 400 500 600 700 800 900 100

RT = 154k for 2MHz

RT = 332k for 1MHz

RRT (kΩ)

RRT (k)

1000

0

Figure 5

Inductor Core Selection

Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and theref ore copper losses
will increa se.

Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design
current is exceeded.

This result in an abrupt increa se in inductor ri pple current
and consequent output voltage ri pple.

Do not allow the core to saturate!

11

RT8011/A

Different core materials a nd sha pes will change the size/
current and price/current relationship of a n inductor. T oroid
or shielded pot cores in ferrite or permalloy materials are
small and don't radiate energy but generally cost more
than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs. size requirements and
any radi ated field/EMI requirements.

CIN and C

Selection

OUT

The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :

V

II

OUT(MAX)RMS

OUT

V

This formula has a maximum at VIN = 2V
I

RMS

= I

/2. This simple worst-case condition is

OUT

V

IN

1

−=

V

IN

OUT

OUT

, where

commonly used for design because even significant
deviations do not offer much relief. Note that ripple current
ratings from cap a citor manufacturers are often based on
only 2000 hours of life which makes it advisa ble to further
derate the capa citor , or choose a capa citor rated at a higher
temperature than required.

use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but ca n be used in cost-sensitive
application s provided that consideration is given to ripple
current ratings and long term relia bility. Cera mic ca pacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric ef fects.
The high Q of ceramic capacitors with trace inductance
can also lead to signif ica nt ringing.

Using Ceramic In put and Output Capacitors

Higher values, lower cost ceramic capacitors are now
becoming available in smaller ca se sizes. Their high ripple
current, high voltage rating and low ESR ma ke them ideal
for switching regulator a pplications. However , care must
be taken when these ca pacitors are used at the in put and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall ad a pter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.

Several cap acitors may also be paralleled to meet size or
height requirements in the design.

The selection of C

is determined by the effective series

OUT

resistance (ESR) that is required to minimize voltage ri pple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient re sponse as described in a later section.
The output ripple, ΔV

⎡

ESRIV

LOUT

⎢

⎣

, is determined by :

OUT

⎤

1

+Δ≤Δ

8fC

OUT

⎥

⎦

The output ripple is highest at maximum input voltage
since ΔIL increas es with input voltage. Multiple ca pacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic a nd cera mic capa citors are
all available in surface mount pa ckages. Speci al polymer
cap acitors offer very low ESR but have lower ca pa citance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only

Output Voltage Programming

The output voltage is set by an external resistive divider
according to the f ollowing equation :

R1

⎞

+×=

1VV

⎟

R2

⎠

where V

⎛
⎜

REFOUT

⎝

equals to 0.8V typical.

REF

The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 6.

V

OUT

R1

V

FB

RT8011/A

GND

R2

Figure 6. Setting the Output Voltage

12

DS8011/A-02 March 2011www.richtek.com

RT8011/A

Efficiency Considerations

The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency ca n be expressed as :

Efficiency = 100% − (L1+ L2+ L3+ ...) where L1, L2, etc.
are the individual losses as a percentage of in put power .
Although all dissipative elements in the circuit produce
losses, two main sources usually account f or most of the
losses: VDD quiescent current and I2R losses.

The VDD quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.

1. The VDD quiescent current is due to two components :
the DC bi as current a s given in the electrical characteristics
and the internal main switch a nd synchronous switch gate
charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each ti me the gate is switched from
high to low to high again, a packet of charge ΔQ moves
from VDD to ground. The resulting ΔQ/Δt is the current out
of VDD that is typically larger than the DC bi as current. In
continuous mode, I

GATECHG

= f(QT+QB) where QT and QB
are the gate charges of the internal top and bottom
switches.

the result by the square of the average output current.
Other losses including CIN and C

ESR dissipative

OUT

losses and inductor core losses generally a ccount for less
than 2% of the total loss.

Thermal Considerations

In most applications, the RT8011/A does not dissipate
much heat due to its high efficiency. But, in applications
where the RT8011/A is running at high ambient
temperature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance. To avoid the RT801 1/A from exceeding
the maximum junction temperature, the user will need to
do some thermal analysis. The goal of the thermal analysis
is to determine whether the power dissipated exceeds
the maximum junction temperature of the part. The
temperature rise is given by : TR = PD x θJA Where PD is
the power dissipated by the regulator and θJA is the thermal
resistance from the junction of the die to the ambient
temperature. The junction temperature, TJ, is given by :
TJ = TA + TR Where TA is the ambient temperature.

As an example, consider the RT8011/A in dropout at an
input voltage of 3.3V , a load current of 2A a nd an a mbient
temperature of 70°C. From the typical performance gra ph
of switch resistance, the R

of the P-Channel switch

DS(ON)

at 70°C is approximately 121mΩ. Therefore, power
dissipated by the part is :

Both the DC bi as a nd gate charge losses are proportional
to VDD and thus their effects will be more pronounced at
higher supply voltages.

2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main switch

PD = (I

LOAD

)2 (R

) = (2A)2 (121mΩ) = 0.484W

DS(ON)

For the DFN3x3 package, the θJA is 110°C/W. Thus the
junction temperature of the regulator is : TJ = 70°C +
(0.484W) (110°C/W) = 123.24°C Which is below the
maximum junction temperature of 125°C. Note that at
higher supply voltages, the junction temperature is lower
due to reduced switch resistance (R

DS(ON)

).

and the synchronous switch. Thus, the serie s resistance
looking into the LX pin is a function of both top and bottom
MOSFET R

RSW = R

DS(ON)

and the duty cycle (D) as follows :

DS(ON)

TOP x D + R

BOT x (1"D) The R

DS(ON)

DS(ON)

for both the top and bottom MOSFETs can be obtained
from the Typical Performa nce Characteristics curves. Thus,
to obtain I2R losses, simply add RSW to RL a nd multi ply

DS8011/A-02 March 2011 www.richtek.com

Checking Tra n sient Re spon se

The regulator loop response can be checked by looking
at the load transient respon se. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ΔI

LOAD(ESR)

immediately shifts by a n amount

OUT

, where ESR is the effective series

13

RT8011/A

resistance of C
discharge C

OUT

by the regulator to return V
During this recovery time, V

OUT

. ΔI

also begins to charge or

LOAD

generating a feedback error signal used

to its steady-state value.

OUT

can be monitored for

OUT

overshoot or ringing that would indicate a stability problem.
The COMP pin external components and output ca pa citor
shown in T ypical Application Circuit will provide adequate
compensation for most a pplication s.

Layout Considerations

Follow the PCB layout guidelines for optimal performa nce
of RT801 1/A.

` A ground plane is recommended. If a ground pla ne layer

is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the GND pin at one point that is then connected to
the PGND pin close to the IC. The exposed pad should
be connected to GND.

` Connect the terminal of the input capacitor(s), CIN, as

close as possible to the PVDD pin. This capacitor
provides the AC current into the internal power
MOSFETs.

` LX node is with high frequency voltage swing and should

be kept small area. Keep all sensitive small-signal nodes
away from LX node to prevent stray capacitive noise
pick-up.

Figure 7. RT801 1 Demo Board

Figure 8. RT801 1A D emo Board (Only W DF N-8EL 3x3)

` Flood all unused areas on all layers with copper.

Flooding with copper will reduce the temperature rise
of powercomponents.

Y ou can connect the copper area s to a ny DC net (PV DD,
V DD, VOUT, PGND, GND, or a ny other DC rail in your
system).

` Connect the FB pin directly to the feedback resistors.

The resistor divider must be connected between V

OUT

and GND.

14

DS8011/A-02 March 2011www.richtek.com

Outline Dimension

RT8011/A

D

E

A

A3

A1

D2

L

E2

SEE DETAIL A

1

e

b

2

1

1

2

DETAIL A

Pin #1 ID a nd T ie Bar Mark Option s

Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol

Min Max Min Max

A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010

b 0.180 0.300 0.007 0.012

D 2.950 3.050 0.116 0.120
D2 2.200 2.700 0.087 0.106

E 2.950 3.050 0.116 0.120
E2 1.450 1.750 0.057 0.069

e 0.500 0.020
L 0.350 0.450

W-Type 8EL DFN 3x3 Package (0.5mm Lead Pitch)

0.014 0.018

DS8011/A-02 March 2011 www.richtek.com

15

RT8011/A

D

E

A

A3

A1

D2

L

E2

SEE DETAIL A

1

e

b

2

1

1

2

DETAIL A

Pin #1 ID a nd T ie Bar Mark Option s

Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol

Min Max Min Max

A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010

b 0.180 0.300 0.007 0.012

D 2.950 3.050 0.116 0.120
D2 2.300 2.650 0.091 0.104

E 2.950 3.050 0.116 0.120
E2 1.500 1.750 0.059 0.069

e 0.500 0.020

L 0.350 0.450

W-Type 10L DFN 3x3 Package

0.014 0.018

16

DS8011/A-02 March 2011www.richtek.com

RT8011/A

D

L

E

A

b

E1

e

A2

A1

Dimensions In Millimeters Dimensions In Inches

Symbol

Min Max Min Max

A 0.810 1.100 0.032 0.043
A1 0.000 0.150 0.000 0.006
A2 0.750 0.950 0.030 0.037

b 0.170 0.270 0.007 0.011

D 2.900 3.100 0.114 0.122

e 0.500 0.020

E 4.800 5.000 0.189 0.197
E1 2.900 3.100 0.114 0.122

L 0.400 0.800

0.016 0.031

10-Lead MSOP Plastic Package

Richtek Technology Corporation

Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: [phone] Fax: [phone]

Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.

Richtek Technology Corporation

Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: [phone] Fax: [phone]
Email: [e-mail]

DS8011/A-02 March 2011 www.richtek.com

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