Richtek RT7247A User Manual

RT7247A

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Design Tools

Sample & Buy

Applications

 Wireless AP/Router  Set-Top-Box  Industrial and Commerci al Low Power Systems  LCD Monitors a nd TVs  Green Electronics/Appliances  Point of Load Regulation of High-Performance DSPs

2A, 18V, 340kHz Synchronous Step-Down Converter

General Description

The RT7247A is a high efficiency , monolithic synchronous step-down DC/DC converter that can deliver up to 2A output current from a 4.5V to 18V input supply. The RT7247A's current mode architecture and external compensation allow the transient response to be optimized over a wide input range and loads. Cycle-bycycle current limit provides protection against shorted outputs, and soft-start eliminate s input current surge during start-up. The RT7247A also provides under voltage protection and thermal shutdown protection. The low current (<3μA) shutdown mode provides output disconnection, enabling easy power management in battery-powered systems. The RT7247A is available in an SOP-8 (Exposed Pad) pa ckage.

Features





±±

±1.5% High Accuracy Reference Voltage



 4.5V to 18V Input Voltage Range



 2A Output Current



 Integrated N-MOSFET Switches



 Current Mode Control



 Fixed Frequency Operation : 340kHz



 Output Adjustable from 0.8V to 15V



 Stable with Low ESR Ceramic Output Capacitors



 Up to 95% Efficiency



 Programmable Soft-Start



 Cycle-by-Cycle Over Current Protection



 Input Under Voltage Lockout



 Output Under Voltage Protection



 Thermal Shutdown Protection



 RoHS Compliant and Halogen Free

Marking Information

RT7247Ax GSPYMDNN

RT7247AxGSP : Product Number x : H or L or N YMDNN : Date Code

Simplified Application Circuit

VIN

GND

BOOT

OUT

RT7247A

COMP

BOOT

OUT

Chip Enable

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Functional Pin Description

Pin No. Pin Name Pin Function

1 BOOT

Bootstrap for High Side Gate Driver. Connect a 0.1F or greater ceramic capacitor from BOOT to SW pins.

2 VIN

Input Supply Voltage, 4.5V to 18V. Must bypass with a suitable large ceramic capacitor.

3 SW Switch Node. Connect this pin to an external L-C filter.

9 (Exposed Pad)

GND

Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation.

5 FB

Feedback Input. It is used to regulate the output of the converter to a set value via an external resistive voltage divider.

6 COMP

Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required.

7 EN

Enable Input. A logic high enables the converter; a logic low forces the IC into shutdown mode reducing the supply current to less than 3A. Attach this pin to VIN with a 100k pull-up resistor for automatic startup.

8 SS

Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. A 0.1F capacitor sets the soft-start period to 13.5ms.

Ordering Information

Note : Richtek products are :

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

Package Type SP : SOP-8 (Exposed Pad-Option 2)

RT7247A

Lead Plating System G : Green (Halogen Free and Pb Free)

H : UVP Hiccup L : UVP Latch-Off N : UVP Disabled

Pin Configurations

(TOP VIEW)

SOP-8 (Exposed Pad)

BOOT

VIN SW

GND

SS EN

COMP

GND

2 3 4

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Function Block Diagram

SENSE

Comparator

Oscillator

Foldback

Control

0.4V

Internal

Regulator

1.8V

Shutdown

Comparator

Current Sense

Amplifier

BOOT

VIN

GND

COMP

VAV

6µA

Slope Comp

Current

Comparator

0.8V

SRQ

1.2V

Lockout

Comparator

150m

5k

130m

Operation

Shutdown Comparator

Activate internal regulator once EN input level is larger than the target level. Force IC to enter shutdown mode when the EN input level is lower tha n 0.4V.

Internal Regulator

Provide internal power for logic control and switch gate drivers.

Lockout Comparator

Activate the Current Comparator, release lock-out logic, and enable the switches as EN input level is larger than lockout voltage. Otherwise, the switches still locks out.

Oscillator

The oscillator provides internal clock and controls the converter's switching frequency.

Foldback Control

Dyna mically adjust the internal clock. It provides a slower frequency as a lower FB voltage.

UV Comparator

As FB voltage is lower than the UV voltage, it will a ctivate a UV protect scheme.

Error Amp

The output voltage COMP of the error a mplifier is adjusted comparing FB signal with the internal reference voltage and SS signal.

Current Sense Amplifier

SENSE

detects the peak current of the high-side switch. This signal is amplified by the Current Sense Amplifier and added with a Slope Compensation. Then, it controls the switches by comparing this signal with the COMP voltage.

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Electrical Characteristics

= 12V, TA = 25°C, unless otherwise specified)

Absolute Maximum Ratings (Note 1)

 Supply Input V oltage, V

------------------------------------------------------------------------------------------ −0.3V to 20V

 Switch Voltage, SW ------------------------------------------------------------------------------------------------ −0.3V to (V

+ 0.3V)

<10ns ------------------------------------------------------------------------------------------------------------------ −5V to 25V

 V

BOOT

− VSW---------------------------------------------------------------------------------------------------------- −0.3V to 6V

 Other Pins Voltage ------------------------------------------------------------------------------------------------- −0.3V to 20V  Power Dissipation, P

@ T

= 25°C

SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------- 1.333W

 Package Thermal Re sistance (Note 2)

SOP-8 (Exposed Pad), θJA---------------------------------------------------------------------------------------- 75°C/W SOP-8 (Exposed Pad), θJC--------------------------------------------------------------------------------------- 15°C/W

 Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------- 260°C  Junction T emperature----------------------------------------------------------------------------------------------- 150°C  Storage T emperature Range -------------------------------------------------------------------------------------- −65°C to 150°C  ESD Susceptibility (Note 3)

HBM (Human Body Model)---------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

 Supply Input V oltage, V

------------------------------------------------------------------------------------------ 4.5V to 18V

 Junction T emperature Range-------------------------------------------------------------------------------------- −40°C to 125°C  Ambient T emperature Range--------------------------------------------------------------------------------------

−40°C to 85°C

Parameter Symbol Test Conditions Min Typ Max Unit

Shutdown Supply Current V

= 0V -- 0.5 3 A

Supply Current V

= 3V, VFB = 0.9V -- 0.8 1.2 mA

Reference Voltage V

REF

4.5V VIN 18V 0.788 0.8 0.812 V

Error Amplifier Transconductance

IC = ±10A -- 940 -- A/V

High Side Switch On-Resistance

DS(ON)1

-- 150 -- m

Low Side Switch On-Resistance

DS(ON)2

-- 130 -- m

High Side Switch Leakage Current

= 0V, VSW = 0V -- 0 10 A

Upper Switch Current Limit Min. Duty Cycle, V

BOOT

VSW = 4.8V -- 4 -- A

COMP to Current Sense Transconductance

-- 3.7 -- A/V

Oscillation Frequency f

OSC1

300 340 380 kHz

Short Circuit Oscillation Frequency

OSC2

VFB = 0V -- 100 -- kHz

Maximum Duty Cycle D

MAX

VFB = 0.7V -- 93 -- %

Minimum On-Time tON -- 100 -- ns

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Parameter Symbol Test Conditions Min Typ Max Unit

Logic-High VIH 2 -- 18

EN Input Voltage

Logic-Low V

-- -- 0.4

Input Under Voltage Lockout Threshold

UVLO

VIN Rising 3.8 4.2 4.5 V

Input Under Voltage Lockout Hysteresis

V

UVLO

-- 320 -- mV

Soft-Start Current ISS V

= 0V -- 6 -- A

Soft-Start Period tSS C

= 0.1F -- 13.5 -- ms

Thermal Shut down TSD -- 150 -- C

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.

Note 2. θ

is measured at T

= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is

measured at the exposed pad of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions.

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Typical Application Circuit

OUT

(V) R1 (k) R2 (k) RC (k) CC (nF) L (H) C

OUT

(F)

8 27 3 27 3.3 22 22 x 2 5 62 11.8 20 3.3 15 22 x 2

3.3 75 24 13 3.3 10 22 x 2

2.5 25.5 12 9.1 3.3 6.8 22 x 2

1.5 10.5 12 4.7 3.3 3.6 22 x 2

1.2 12 24 3.6 3.3 3.6 22 x 2 1 3 12 3 3.3 3.6 22 x 2

Table 1. Suggested Components Selection

VIN

GND

BOOT

10µH

0.1µF

22µF x 2

R1 75k

24k

OUT

3.3V

10µF x 2

4.5V to 18V

RT7247A

COMP

3.3nF

13k

Open

4, 9 (Exposed Pad)

BOOT

0.1µF

OUT

Chip Enable

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Typical Operating Characteristics

Efficiency vs. Output Current

100

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

Output Current (A)

Effici en cy (%)

OUT

= 3.3V

= 4.5V

= 12V

= 17V

Output Voltage v s . Input Voltage

3.27

3.28

3.29

3.30

3.31

3.32

3.33

4 6 8 1012141618

Input Voltage (V)

Output V oltage (V)

OUT

= 3.3V, I

OUT

= 1A

Reference Voltage vs. Temperature

0.75

0.76

0.77

0.78

0.79

0.80

0.81

0.82

0.83

0.84

0.85

-50-25 0 25 50 75100125

Temperatur e (°C)

Refer ence V oltage (V)

OUT

= 3.3V, I

OUT

= 1A

= 4.5V

= 12V

= 17V

Output Voltage vs. Output Current

3.280

3.285

3.290

3.295

3.300

3.305

3.310

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

Output Current (A)

Output Volt age (V)

OUT

= 3.3V

= 4.5V

= 12V

= 17V

Switching Frequency vs. Input Voltage

300

310

320

330

340

350

360

370

380

369121518

Inpu t Volt age (V)

Swit ching Frequency (kHz) 1

OUT

= 3.3V, I

OUT

= 0A

Switching Frequency vs. Temperature

300

310

320

330

340

350

360

370

380

-50-25 0 25 50 75100125

Temperature (°C)

Swit ching Frequency (kHz) 1

OUT

= 3.3V, I

OUT

= 0A

= 4.5V

= 12V

= 17V

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Time (10ms/Div)

Power On from VIN

OUT

(2V/Div)

(5V/Div)

(2A/Div)

= 12V, V

OUT

= 3.3V, I

OUT

= 2A

Time (10ms/Div)

Power Off from VIN

OUT

(2V/Div)

(5V/Div)

(2A/Div)

= 12V, V

OUT

= 3.3V, I

OUT

= 2A

Time (2.5μs/Div)

Output Ripple Voltage

OUT

(5mV/Div)

(5V/Div)

(1A/Div)

= 12V, V

OUT

= 3.3V, I

OUT

= 2A

Time (100μs/Div)

Load Transient Response

OUT

(100mV/Div)

OUT

(1A/Div)

= 12V, V

OUT

= 3.3V, I

OUT

= 1A to 2A

Current Limit vs. Temperature

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

-50-25 0 25 50 75100125

Temperature (°C)

Current Li m it (A)

OUT

= 3.3V

= 12V

= 17V

Time (100μs/Div)

Load Transient Response

OUT

(100mV/Div)

OUT

(1A/Div)

= 12V, V

OUT

= 3.3V, I

OUT

= 0A to 2A

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Time (10ms/Div)

Power On from EN

OUT

(2V/Div)

(5V/Div)

(1A/Div)

= 12V, V

OUT

= 3.3V, I

OUT

= 2A

Time (10ms/Div)

Power Off from EN

OUT

(2V/Div)

(5V/Div)

(1A/Div)

= 12V, V

OUT

= 3.3V, I

OUT

= 2A

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Application Information

Output Voltage Setting

The resistive divider allows the FB pin to sense the output voltage as shown in Figure 1.

Figure 1. Output Voltage Setting

The output voltage is set by an external resistive voltage divider according to the following equation :

OUT REF

V = V 1





 

Where V

REF

is the reference voltage (0.8V typ.).

External Bootstrap Diode

Connect a 0.1μF low ESR ceramic ca pa citor between the BOOT pin and SW pin. This capacitor provides the gate driver voltage for the high side MOSFET .

It is recommended to add an external bootstrap diode between an external 5V and BOOT pin for efficiency improvement when input voltage is lower than 5.5V or duty ratio is higher than 65% .The bootstrap diode can be a low cost one such as IN4148 or BAT54. The external 5V can be a 5V fixed input from syste m or a 5V output of the RT7247A. Note that the external boot voltage must be lower than 5.5V

Figure 2. External Bootstrap Diode

Chip Enable Operation

The EN pin is the chip enable input. Pulling the EN pin low (<0.4V) will shut down the device. During shutdown mode, the RT7247A quiescent current drops to lower than 3μA. Driving the EN pin high (>2V, <18V) will turn on the device again. For external timing control, the EN pin ca n also be externally pulled high by adding a REN resistor and CEN capa citor from the VIN pin (see Figure 3).

Soft-Start

The RT7247A provides soft-start function. The soft-start function is used to prevent large inrush current while converter is being powered-up. The soft-start timing ca n be programmed by the extern al capa citor between SS and GND. An internal current source I

(6μA) charges an external ca pacitor to build a soft-start ra mp voltage. The VFB voltage will track the internal ra mp voltage during softstart interval. The typical soft start time is calculated as follows :

SS SS

0.8 C

Soft-Start time t = , if C capacitor

0.8 0.1

is 0.1 F, then soft-start time = 13.5ms





≒

An external MOSFET can be a dded to implement digital control on the EN pin when no system voltage above 2.5V is available, a s shown in Figure 4. In this case, a 100kΩ pull-up resistor, REN, is connected between VIN and the EN pin. MOSFET Q1 will be under logic control to pull down the EN pin.

Figure 3. Enable Timing Control

Figure 4. Digital Ena ble Control Circuit

RT7247A

GND

OUT

BOOT

RT7247A

100nF

RT7247A

GND

RT7247A

GND

100k

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Under Voltage Protection Hiccup Mode

For the RT7247AH, it provides Hiccup Mode Under V oltage Protection (UVP). When the VFB voltage drops below 0.4V , the UVP function will be triggered to shut down switching operation. If the UVP condition remains for a period, the RT7247AH will retry automatically. When the UVP condition is removed, the converter will resume operation. The UVP is disabled during soft-start period.

Figure 5. Hiccup Mode Under Voltage Protection

Latch-Off Mode

For the RT7247AL, it provides Latch-Off Mode Under Voltage Protection (UVP). When the FB voltage drops below half of the feedback reference voltage, VFB, UVP will be triggered and the RT7247AL will shut down in LatchOff Mode. In shutdown condition, the RT7247AL can be reset by EN pin or power input VIN.

Figure 6. Latch-Off Mode Under Voltage Protection

OUT OUT

I = 1

fL V

 



 



 

Having a lower ripple current reduces not only the ESR losses in the output capa citors but also the output voltage ripple. High frequency with small ripple current ca n achieve the highest efficiency operation. However, it requires a large inductor to achieve this goal.

For the ripple current selection, the value of ΔI

= 0.24(I

MAX

) will be a reasonable starting point. The largest ripple

current occurs at the highest VIN. To guarantee that the

Over Temperature Protection

The RT7247A features an Over Temperature Protection (OTP) circuitry to prevent from overheating due to excessive power dissipation. The OTP will shut down switching operation when junction temperature exceeds 150°C. Once the junction temperature cools down by approxi mately 20°C, the converter will resume operation. T o maintain continuous operation, the maximum junction temperature should be lower than 125°C.

Inductor Selection

The inductor value and operating frequency determine the ripple current according to a specific input and output voltage. The ripple current ΔI

increases with higher V

and decrea ses with higher inducta nce.

Clamp Mode

For the RT7247AN, it provides inductor current clamp mode.

Figure 7. Clamp Mode

Time (1ms/Div)

Clamp Mode

OUT

(2V/Div)

(1A/Div)

OUT

= Short

Time (25ms/Div)

Hiccup Mode

OUT

(2V/Div)

(1A/Div)

OUT

= Short

Time (25μs/Div)

Latch-Off Mode

OUT

(2V/Div)

(2A/Div)

OUT

= Short

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OUT

RMS OUT(MAX)

IN OUT

I = I 1



CIN and C

OUT

Selection

The input capacitance, C

IN,

is needed to filter the trapezoidal current at the source of the high side MOSFET. T o prevent large ripple current, a low ESR in put capa citor sized for the maximum RMS current should be used. The approxi mate RMS current equation is given :

This formula has a maximum at V

= 2V

OUT

, where

RMS

= I

OUT

/ 2. This simple worst case condition is commonly used for design because even significant deviations do not offer much relief.

Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design.

For the input capacitor, two 10μF low ESR ceramic capacitors are suggested. For the suggested capacitor, please refer to Table 3 for more details.

The selection of C

OUT

is determined by the required ESR

to minimize voltage ripple. Moreover, the amount of bulk capacitance is also a key

for C

OUT

selection to ensure that the control loop is stable.

OUT L

OUT

VIESR

8fC



 





The output ripple will be the highest at the maximum input voltage since ΔIL increases with input voltage. Multiple

cap a citors pla ced in parallel may be needed to meet the ESR and RMS current handling require ment. Higher values, lower cost ceramic ca pa citors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal f or switching regulator applications. However, care must be taken when these cap acitors are used at in put and output. When a cera mic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mista ken a s loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at V

large enough to damage the part.

Thermal Considerations

For continuous operation, do not exceed the maximum operation junction temperature 125°C. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to a mbient. The maximum power dissipation can be calculated by following formula :

D(MAX)

= (T

J(MAX)

− TA ) / θ

Where T

J(MAX)

is the maximum operation junction

temperature , T

is the ambient temperature a nd the θ

the junction to ambient thermal resistance. For recommended operating condition specifications, the

maximum junction temperature is 125°C. The junction to ambient thermal re sistance θJA is layout dependent. For SOP-8 (Exposed Pad) package, the thermal resistance

is 75°C/W on the standard JEDEC 51-7 four-layers thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula :

Table 2. Suggested Inductors for Typical

Application Circuit

Component

Supplier

Series

Dimensions

(mm)

TDK VLF10045 10 x 9.7 x 4.5 TDK SLF12565 12.5 x 12.5 x 6.5

TAIYO

YUDEN

NR 8040 8 x 8 x 4

OUT OUT

L(MAX) IN(MAX)

L = 1

fI V

 



 



 

The inductor's current rating (caused a 40°C temperature rising from 25°C ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit pea k current limit. Plea se see Table 2 for the inductor selection reference.

ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation :

Loop stability can be checked by viewing the load tra nsient response as described in a later section.

The output ripple, ΔV

OUT

, is determined by :

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D(MAX)

= (125°C − 25°C) / (75°C/W) = 1.333W

(min.copper area PCB layout) P

D(MAX)

= (125°C − 25°C) / (49° C/W) = 2.04W

(70mm2copper area PCB layout) The thermal resistance θJA of SOP-8 (Exposed Pad) is

determined by the package architecture design and the PCB layout design. However, the package architecture design ha s been designed. If possible, it's useful to increase thermal performance by the PCB layout copper design. The thermal resistance θ

can be decreased by adding copper area under the exposed pad of SOP-8 (Exposed Pad) package.

As shown in Figure 8, the amount of copper area to which the SOP-8 (Exposed Pad) is mounted affects thermal performance. When mounted to the standard SOP-8 (Exposed Pad) pad (Figure 8.a), θ

is 75°C/W. Adding copper area of pad under the SOP-8 (Exposed Pad) (Figure 8.b) reduces the θ

to 64°C/W. Even further , increa sing the copper area of pad to 70mm2 (Figure 8.e) reduces the θ

to 49°C/W.

The maximum power dissipation depends on operating ambient temperature for fixed T

J(MAX)

and thermal resistance θJA. The Figure 9 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed.

Figure 9. Derating Curve of Maxi mum Power Dissi pation

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

0 25 50 75 100 125

Ambient Tem peratu re (°C )

Power Dissipat ion (W)

Copper Area

70mm

50mm

30mm

10mm

Min.Layout

Four-Layer PCB

(a) Copper Area = (2.3 x 2.3) mm2,

= 75°C/W

(b) Copper Area = 10mm2,

= 64°C/W

= 54°C/W

(d) Copper Area = 50mm

= 51°C/W

(e) Copper Area = 70mm

= 49°C/W

Figure 8. Thermal Resistance vs. Copper Area Layout

Design

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Layout Consideration

Follow the PCB layout guidelines for optimal performa nce of the RT7247A.

 Keep the traces of the main current paths as short and

wide as possible.

 Put the input ca pacitor a s close a s possible to the device

pins (VIN a nd GND).

 SW node is with high frequency voltage swing and

should be kept at small area. Keep analog components away from the SW node to prevent stray ca pacitive noise pick-up.

 Connect feedback network behind the output ca pacitors.

Keep the loop area small. Place the feedback components near the RT7247A.

 An example of PCB layout guide is shown in Figure 10

for reference.

Figure 10. PCB Layout Guide

Table 3. Suggested Capacitors for CIN and C

OUT

Location Component Supplier Part No. Capacitance (F) Case Size

CIN MURATA GRM31CR61E106K 10 1206 CIN TDK C3225X5R1E106K 10 1206 CIN TAIYO YUDEN TMK316BJ106ML 10 1206

OUT

MURATA GRM31CR60J476M 47 1206

OUT

TDK C3225X5R0J476M 47 1210

OUT

MURATA GRM32ER71C226M 22 1210

OUT

TDK C3225X5R1C22M 22 1210

OUT

GND

OUT

Input capacitor must be placed as close to the IC as possible.

SW node is with high frequency voltage swing and should be kept at small area. Keep analog components away from the SW node to prevent stray capacitive noise pick-up

The feedback components must be connected as close to the device as possible.

BOOT

VIN

GND

SS EN

COMP

GND

2 3 4

GND

BOOT

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Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

Outline Dimension

EXPOSED THERMAL PAD (Bottom of Package)

8-Lead SOP (Exposed Pad) Plastic Package

Symbol

Dimensions In Millime te r s Dimensions In Inches

Min Max Min Max

A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010

I 0.000 0.152 0.000 0.006

J 5.791 6.200 0.228 0.244

M 0.406 1.270 0.016 0.050

Option 1

X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091

Option 2

X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138

Richtek RT7247A User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual