Renesas Timing Commander User Manual

Timing Commander™ Software for VersaClock® 5 ­5P49V5901

USER GUIDE

Glossary

IDT Timing Commander Software – Executable file that will execute a personality, connect to a timing chip on an evaluation

board, and read or write Settings files.

Personality – Encrypted file with an extension .tcp. Used by IDT Timing Commander Software to determine the characteristics
for a specific family of timing devices. A personality file may refer to a single device or an entire family of similar devices. Please
contact IDT to obtain the most current version of a personality file for the devices of interest.

Settings File – Text file with extension .tcs. Written or read by IDT Timing Commander Software to save or restore a particular
setup for a specific version of a device personality and version of IDT Timing Commander Software. Settings files created with
newer versions of IDT Timing Commander Software or a device personality may not be compatible when read into older version
of IDT Timing Commander Software, or, if an older version of the personality is installed. Forward compatibility (older settings
files read by newer software and/or personality) will be maintained.

Bit Set – A single variable stored within the registers of the device. A bit set may use only part of a register or many span multiple
registers, but is thought of as a single field. For example, a 20-bit output divider ratio may be defined as a single bit set of length
20-bits, but may be stored in Register 0x4A, bits [3:0], Register 0x4B, bits [7:0] and Register 0x4c, bits [7:0].

Metadata – Variable used within the personality, but not stored directly in device registers. For example an input frequency is
generally not stored anywhere in a device's registers, but must be known to calculate register settings for the device.

Tooltip – context-sensitive pop-up that appears briefly as the mouse pointer hovers over an icon or element on the screen. These
are intended to provide useful information about the specific item being pointed to.

Val ue – When referring to any field that the user can edit, Value means the current internally-represented value of that field.

Default Value – When referring to any field that the user can edit, Default Value means the value recommended by the

personality for that field, taking into account the settings in other fields in the device. Changes of other fields may result in a
change to the Default Value. Whenever a field is unlocked, Default Value = Value. Only by locking a field can a user set a field
to a Value other than the Default Value or prevent a field's Value from changing if Default Value changes.

Display Value – A field may be controlled by a personality to display its Value or Default Value in a more meaningful way. For
example, if the Value is defined in MHz, but the actual value is 0.008MHz, the personality may choose to display this to the user
as 8KHz. In another example, if a bit set represents a divider ratio that can only be an even number and so does not implement
the Least Significant bit, the personality may choose to show a divider ratio of 2 when the bit set value is 1 (i.e., 1 increment of
divide-by-2).

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Areas of the Screen

A block diagram is displayed when a Settings File is loaded with a personality of a device. There are differential areas in the block
diagram as shown and explained below.

Figure 1. Areas of Screen when a Settings File is Loaded or New Settings File is Selected

Device ID – This indicates the specific device being selected. Clicking on this will bring up a menu that allows the settings

to be viewed and other file related activity (i.e., Save As) to be performed.

Error/Warning Panel – This section will expand and contract depending number of errors and/or warning messages, if

any. Clicking on the Warning or Error Tab hide or reveal this section. Note the arrow at the end of each error or warning.
Clicking on the arrow will take to the view or popup where the field that flags the error or warning is generated.

View Selection – Clicking on these tabs will bring up the different views of the chip setup.

Search – Any field or diagram element can be highlighted by typing in its name in the Search box.

Input Frequency – the two boxes are where crystal and input clock frequencies are entered, respectively. (Refer to

Figures 5~5b).

Clock Selection – Clicking on it will bring up input reference source selection. Checking it activates the CLKin as a primary

source. Refer to section “4. Input Clock Selection”. (Refer to Figures 5~5b).

Spread Spectrum Control – Clicking on this box will bring up a popup window in which spread spectrum for this output

clock is configured. There is one for each output (except OUT0). Refer to Section “Spread Spectrum”.

Output Signal Type Control – Clicking on this box will bring up a popup window in which the signal type, voltage, slew

rate and phase skew of this output clock is configured. Refer to Figures 8~10 for details.

Output Frequency – The box where intended output frequency in MHz is entered. Once a frequency is entered, click

outside the box for the value to take effect. IDT Timing Commander Software will use the frequency (together with input
frequency) to adjust PLL and output divider to generate the intended output frequency.

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Connect to chip – If an evaluation board is connected through USB port, clicking on the round button will bring up a

window where an I

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C slave address can be selected; then clicking on the chip symbol to read or write the device's

registers. See Figure 10 for details.

Zoom – Clicking on “+” sign will increase the zoom level of the main window. Clicking on “-” sign will zoom out.

OTP Program button – Clicking on this button will allow you to program the device. Note that OTP programming is

one-time only. See “11. OTP Programming” section.

Shutdown and OE polarity – By changing polarity along with the SD/OE pin settings, it affects the OE of the outputs.

Enable Global Shutdown – Puts device in global shutdown mode, if Shutdown and OE polarity is high.

ClkSel Pin – Input clock select, selects the active input reference source in the manual switchover mode.

SD/OE Pin – Enables/disables the outputs (OE) or powers down the chip (SD). The SH bit controls the configuration of

the SD/OE pin.

Select Configuration drop down – Allows user to select between configuration [0:3].

Critical Output box – By checking this button, the output selected will be given priority for best performance based on

using an all integer divider solution.

Device Pinout – This button will open up a pinout diagram for the part selected to program.

Reference divider and VCO blocks – Clicking on these boxes enable customize control by accessing internal

parameters.

User Guide – clicking this button will open this current document

Master Output Control – This new feature will enable the user to enter all output types at once.

Fraction checkbox – the box is intended to use a fraction value for either the input or the output frequency. (Refer to

Figure 5c and Figure 11a).

Optimize button – Clicking on these boxes enable customize control by accessing internal parameters. See section

“Optimization Button”.

Show power box – By checking this box a power consumption estimate will show up under each output and show total

current consumption for the device. See section “Estimated Power Feature”.

Special Option – By checking this box this will bring the new buttons in the view. See Figure 11e for details.

FOD/FB integers – option will appear under the special options using non integer values in the Feedback and Fractional

Output dividers blocks.

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Getting Started

Follow the steps below to start a new setting or open an existing Settings File and configure the device to meet your timing
requirements.

1. Launching Timing Commander GUI software for the first time, you will see the following window:

Figure 2. Launching Timing Commander for the First Time

A settings file (.tcs) is a text file where the device input and output requirements are stored. From this window, an existing
setting file can be opened to restore a configuration, or a new setting file can be created.

2. Clicking on “New Setting File” button, a personality file (.tcp) will be requested and can be opened by browsing to the folder
where a personality file is stored. Once the personality file is opened (click OK), the following page will be displayed, where
the correct VC5 product can be selected (see Figure 3). As soon as the product is selected, then the configuration window for
the selected product will appear as in Figure 4.

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Figure 3. Choose Correct VersaClock 5 Part Number

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Figure 4. Configuration Window for Configuring VC5

In the above configuration window, input source and frequencies can be selected and entered. Output frequencies can be
entered. The GUI will automatically configure the PLL to generate desired outputs, based on the Reference divider and Feedback
Divider settings.

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3. Ref Divider and PLL VCO block diagrams – By clicking on the Ref divide diagram, the user can get access to the ref divider
window and change the divider setting by checking the manual control box (see Figure 4a below). By default, timing
commander bypasses the pre-divider for wider PFD frequency that improves performance.

By clicking on the PLL diagram the user can get access to the VCO frequency and the FB divider value (see Figure 4b below).
By checking the FB control box, the user can change the value of the feedback divider. Another way is to change the VCO
frequency. If VCO frequency is changed then the FB control needs to be unchecked. Min frequency for VCO is 2500MHz and
Max Frequency is 3000MHz.

Note: If input frequency is set to 200MHz, a predivider value needs to be selected after checking manual control in reference
divider window. For outputs higher than 312.5MHz, the VCO frequency needs to be set to 2525 or appropriately higher value.

Figure 4a. Reference Divider Window

Figure 4b. PLL/VCO Window

4. Input Clock Selection

Input source can be selected between a crystal and an external reference clock. The frequency of the crystal or a clock can

be entered in the white boxes on the left side of the diagram window.

Selecting an input reference is done by checking the "Prim SRC" bit box along with the setting of the CLK Sel pin. By default,

Crystal is selected. Please note, when selecting clock source, it's recommended to open XTAL Configuration and CLK Enable
window at the same time by clicking on box "XTAL MHz" and box "Clock MHz", respectively. Figure 5 below shows a
side-by-side view of all 3 windows.

When Crystal is selected, "En Xtal" is checked and "EN_BUFIN" is unchecked. When changing input source from crystal to

CLK, manually uncheck "En Xtal" and check "EN_BUFIN" to complete clock selection process.

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Figure 5. Input Reference Selection

TIMING COMMANDER™ SOFTWARE FOR VERSACLOCK® 5 - 5P49V5901

There are situations where both crystal and CLK are used as input sources. In this case, check both “En Xtal” and
“EN_BUFIN”. Then use CLKSEL pin to select crystal or CLK source to be used as the input reference. The Truth Table is listed
in table 1 below.

Table 1. Input Source Selection by CLKSEL Pin

Primary Source CLKSEL Pin Source Selected

Crystal

CLK

Same frequency should be used for Xtal and CLKin when both are used for the same configuration.

LOW Crystal/XIN

HIGH CLKIN

LOW CLKIN

HIGH Crystal/XIN

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Figure 5a. Primary Source Selection

The CLKSelPol check box needs to be checked if using the CLK is selected as primary source and if CLK sel pin low like in
Figure 5b. The timing commander will display the selected source based on the selection. The En_Buff box will be then enabled.

Figure 5b. Input clock Pin Selection

5. Input Frequency Fraction box – - Input clock can be entered as a fraction if fraction box is checked and Fraction word is

clicked as shown in figured 5c below. The calculation button will give the final frequency that will be entered in the input box.
The fraction can be used for both Xtal and CLKin inputs.

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Figure 5c. Input Fraction Box

6. Internal Capacitance Configuration – The 5P49V5901 has built in capacitance for crystal load capacitance tuning. In XTAL

Configuration window (see Figure 6), X1 and X2 represent the capacitance the device can add to each leg of the crystal
connected to XIN/REF and XOUT pins.

The user can enter the value of the XTAL CL indicated by the Xtal manufacturer. TC will calculate the necessary values for

the internal capacitors. The calculation assumes a Cstray of 1.5pF for external board capacitance. The TC will change the
entered CL value to the closest realized value that the internal caps can achieve based on real measurements.
Example for a XTAL CL of 8pF:

• X1=X2=16pF would be the total value required.

• X1=X2=15.9pF is what consists of 9pF fixed and 6.9pF Xtal load caps.

More details on the register programming can be found in the VC5 Register programming guide.

Figure 6. XTAL CL Value into Timing Commander

The max CL that can be created in the IC is 11.4pF. When entering a larger value, Timing Commander will display a window

advising how much capacitance to add externally to each crystal pin to achieve the desired CL value (see Figure 6a). TC is
rounding the values to a integer value for the advisable external capacitors.
Example for a XTAL CL of 18pF:

• X1=X2=36pF would be the total value required

• X1=X2=22.7pF is achieved internally in the VC5 and externally the amount required is 13.3pF (rounded to 13pF)

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Figure 6a. Xtal Caps Setting Warning Message

The user can still select the caps if the X1=X2 box is not checked. The Xtal CL then will be calculated automatically (Figure 6b.).

Different values of X1 and X2 can be individually selected, although in almost all applications, an equal amount of capacitance

for X1 and X2 (X1 = X2) is recommended.

Figure 6b. Independent Xtal Caps Settings

7. Output Selection and Configuration – There are 5 outputs in 5P49V5901, of which OUT0 is a buffered output of the input

source with a single-ended signal format, OUT1~4 can each be configured as one differential pair, or two individual
single-ended outputs with programmable slew relationships. Output1 is displayed below as an example.

Figure 7. Output Configuration (1)

By clicking “Clk 1 Input” box, a clock source can be selected for Output1 between FOD1 and Ref. By default, this box is
showing “Off” if no output frequency is entered in the output frequency box. Once a frequency is entered, it will be
automatically switched to “FOD1” (FOD stands for Fractional Output Divider) which essentially means the output is sourced
from VCO frequency of the PLL. Input reference frequency (Ref) can also be selected as the source for Output1. This box
works in the same way for other outputs.

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