Renesas RX110, RX113, RX111, RX230, RX231 Application Note

APPLICATION NOTE

R01AN1666EJ0220

RX Family

Rev. 2.20

ADC Module Using Firmware Integration Technology

Introduction

This module provides support for all features of the 12-bit A/D Converter on the RX110, RX111, RX113, RX130, RX210, RX230, RX231, RX631, RX63N, RX64M, RX65N and RX71M.

Target Device

The following is a list of devices that are currently supported by this API:

• RX110, RX111, RX113, RX130 Groups

• RX210 Group

• RX230, RX231 Groups

• RX631, RX63N Groups

• RX64M Group

• RX65N Group

• RX71M Group

When using this application note with other Renesas MCUs, careful evaluation is recommended after making modifications to comply with the alternate MCU.

Dec 01, 2016

1. Overview

This A/D Converter (ADC) driver supports the S12ADa peripheral on the RX63x, the S12ADb peripheral on the RX11x/RX210, the S12ADC peripheral on the RX64M/RX71M, the S12ADE peripheral on the RX130/RX230/RX231 and the S12ADFa peripheral on the RX65x.

Depending on the MCU chosen, some features include, but are not limited to single scans, grouped single scans, and continuous scanning. Peripheral features include register left or right alignment, clearing data after register reads, summation and average of conversion results, and the ability to store data on alternate triggers of a channel. Channel, temperature and internal reference voltage sensor specific features include setting sampling time using state counts, and opting out of summation of samples. There is no dependency on any other software except for the board support package (r_bsp module).

The ADC begins conversion when it receives a trigger. When the conversion is complete, a flag is set and an interrupt issued if enabled. If the ADC is operating in a single scan mode, only one scan takes place per trigger. If the ADC is operating in a continuous mode, scans continue indefinitely after the initial trigger occurs.

The trigger source may be synchronous from an MTU peripheral, Event Link Controller (ELC), or a TPU peripheral (non-RX11x); asynchronous from an external trigger on ADTRG#, or from setting a bit in software. Note that even though a software trigger is an asynchronous action, the hardware manual reserves the term “asynchronous trigger” to refer to asynchronous external hardware triggers. Additionally, although the temperature sensor on the RX210 has its own independent trigger, the driver hides this operation and the application should be written as if the standard software trigger is being used.

The driver provides a Control() command for polled applications which checks to see if a scan completed after a trigger occurs. If interrupts are in use, the interrupt will call a Callback function specified in the Open() function. The only argument to the Callback function specifies whether the default scan has completed or a Group B scan has completed. In general, the peripheral operates on a single trigger source. However, in a group mode, two different trigger sources are used. Each group can contain one or more unique channels and may be scanned at different trigger intervals.

The majority of the driver serves to initialize the A/D peripheral and provide functions to read conversion results. Settings which are common to all channels such as conversion alignment or addition count are set in the Open() call. Specific channel enabling is done via a Control() command. Two Read() functions are provided- one which retrieves a single conversion value and another which retrieves all conversion registers whether the channel is enabled or not.

For the RX11x/RX21x/RX63x there are 13 to 24 channels available for conversion depending upon the MCU chosen. All MCUs include a Temperature and an Internal Reference Voltage sensor. Each has its own conversion register. In addition, in non-RX63x MCUs, a single channel can be designated as a “double trigger”. This means the scan-complete flag/interrupt occurs on every other scan. On an odd scan, the conversion result is placed in its normal data register. On an even scan, the result is placed in a special register. Double trigger cannot be used with sensors or other channels (unless the other channels are in Group B), and a sensor can only be scanned by itself.

For the RX64M/RX71M/RX65x there are 8 channels on Unit 0, 21 channels and two sensors (Temperature and Internal Reference Voltage) on Unit 1. In addition, a single channel on each unit can be designated as a “double trigger” channel. This means that the scan-complete flag/interrupt occurs on every other scan. On an odd scan, the conversion result is placed in its normal data register. On an even scan, the result is placed in a special register. Double trigger cannot be used with sensors or other channels (unless the other channels are in other Groups.). Sensors and channels may be scanned together on Unit 1. A built-in level and window comparator is available for channels and sensors. The sensors are available on unit 1 and a Sample & Hold feature is available on unit 0 for sampling up to 3 channels simultaneously. A virtual channel is available for Self-Diagnosis against various voltages, and a Disconnect Detection Assist feature allows for an initial charging or discharging of the internal capacitor. This 12-bit converter may also be configured for 8 or 10-bit resolution for slightly faster conversion if desired, and an input is available for an external amplifier (positive or negative gain) for up to 8 channels on unit 1.

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2. API Information

This Driver API follows the Renesas API naming standards.

2.1 Hardware Requirements

This driver requires your MCU support the following features:

• S12ADa, S12ADb, S12ADC, S12ADE or S12ADFa peripheral

2.2 Hardware Resource Requirements

This section details the hardware peripherals that this driver requires. Unless explicitly stated, these resources must be reserved for the driver and the user cannot use them.

2.2.1 S12ADa/S12ADb/S12ADC/S12ADE/S12ADFa

This driver makes use of all features available on these peripherals.

2.2.2 GPIO

This driver utilizes port pins corresponding to each individual analog channel. These pins may not be used for GPIO.

2.3 Software Requirements

This driver is dependent upon the following packages:

• Renesas Board Support Package (r_bsp)

2.4 Limitations

Registers, settings, or usage notes vary depending on the mode used in the 12-bit A/D converter. APIs in this application note must be used according to the 12-bit A/D converter chapter in the User's Manual: Hardware for the MCU used.

2.5 Supported Toolchains

This driver is tested and working with the following toolchains:

• Renesas RX Toolchain v2.05.00

2.6 Header Files

Compile time configurable options are located in r_s12ad_rx\ref\r_s12ad_rx_config_reference.h. This file should be copied into the r_config subdirectory of the project and renamed to r_s12ad_rx_config.h. It is this renamed file that should be modified if needed and the original kept as a reference.

All API calls and their supporting interface definitions are located in r_s12ad_rx\r_s12ad_rx_if.h. Both this file and r_s12ad_rx_config.h should be included by the User’s application.

2.7 Integer Types

This project uses ANSI C99 “Exact width integer types” in order to make the code clearer and more portable. These types are defined in stdint.h.

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If this equate is set to 1, parameter checking is included

utilizes the system default setting.

// 1.8V <= AVcc0 < 2.7V

This equate is for the Temperature Sensor gain

2.8 Configuration Overview

All configurable options that can be set at build time are located in the file “r_s12ad_rx_config.h”. A summary of these settings are provided in the following table:

Configuration options in r_s12ad_rx_config.h

#define ADC_CFG_PARAM_CHECKING_ENABLE 1

#define ADC_CFG_PGA_GAIN 0

// 2.7V <= AVcc0 < 3.6V //#define ADC_CFG_PGA_GAIN 1

// 3.6V <= AVcc0 < 4.5V //#define ADC_CFG_PGA_GAIN 2

// 4.5V <= AVcc0 <= 5.5V //#define ADC_CFG_PGA_GAIN 3

Table 1: Info about the configuration

in the build. If the equate is set to 0, the parameter checking is omitted from the build. Setting this equate to BSP_CFG_PARAM_CHECKING_ENABLE

amplifier on the RX210. The default is a value of 0 which is good for all target voltages. For best temperature resolution, the voltage range which most accurately reflects the AVcc0 should have its #define uncommented.

2.9 Code Size

The code size is based on optimization level 2 and optimization type for size for the RXC toolchain in Section 2.5. The ROM (code and constants) and RAM (global data) sizes are determined by the build-time configuration options set in the module configuration header file.

With Parameter Checking Without Parameter Checking

ROM: 1354 bytes ROM: 983 bytes

RX110

RAM: 12 bytes RAM: 12 bytes

ROM: 1234 bytes ROM: 950 bytes

RX111

RAM: 124 bytes RAM: 124 bytes

ROM: 1471 bytes ROM: 1100 bytes

RX113

RAM: 12 bytes RAM: 12 bytes

ROM: 2560 bytes ROM: 1879 bytes

RX130

RAM: 12 bytes RAM: 12 bytes

ROM: 1671 bytes ROM: 1200 bytes

RX210

RAM: 12 bytes RAM: 12 bytes

ROM and RAM code sizes

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ROM: 2327 bytes ROM: 1616 bytes

RX230, RX231

RAM: 12 bytes RAM: 12 bytes

ROM: 1030 bytes ROM: 792 bytes

RX63N

RAM: 12 bytes RAM: 12 bytes

ROM: 3277 bytes ROM: 2464 bytes

RX64M

RAM: 32 bytes RAM: 32 bytes

ROM: 5176 bytes ROM: 4114 bytes

RX65N

RAM: 40 bytes RAM: 40 bytes

ROM: 3277 bytes ROM: 2464 bytes

RX71M

RAM: 32 bytes RAM: 32 bytes

Table 2: ROM and RAM code size

2.10 API Data Structures

This section details the data structures that are used with the driver’s API functions.

To provide strong type checking and reduce errors, many parameters used in API functions require arguments to be passed using the provided type definitions. Allowable values are defined in the public interface files:

r_s12ad_rx_if.h src/targets/rx110/r_s12ad_rx110_if.h src/targets/rx111/r_s12ad_rx111_if.h src/targets/rx113/r_s12ad_rx113_if.h src/targets/rx130/r_s12ad_rx130_if.h src/targets/rx210/r_s12ad_rx210_if.h src/targets/rx230/r_s12ad_rx230_if.h src/targets/rx231/r_s12ad_rx231_if.h src/targets/rx63x/r_s12ad_rx63x_if.h src/targets/rx64m/r_s12ad_rx64m_if.h src/targets/rx65x/r_s12ad_rx65x_if.h src/targets/rx71m/r_s12ad_rx71m_if.h

2.10.1 MCU Common Interface Types (r_s12ad_rx_if.h)

/* CALLBACK FUNCTION ARGUMENT DEFINITIONS */

typedef enum e_adc_cb_evt // callback function events

{

ADC_EVT_SCAN_COMPLETE, // normal/Group A scan complete ADC_EVT_SCAN_COMPLETE_GROUPB, // Group B scan complete

#if (defined(BSP_MCU_RX65_ALL))

ADC_EVT_SCAN_COMPLETE_GROUPC, // Group C scan complete

#endif #if (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M) ||

defined(BSP_MCU_RX65_ALL))

ADC_EVT_CONDITION_MET // 1+ chans/sensors met comparator condition

#endif

defined(BSP_MCU_RX65_ALL))

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ADC_EVT_CONDITION_METB // 1+ chans/sensors met comparator condition

#endif

} adc_cb_evt_t;

typedef struct st_adc_cb_args // callback arguments

{

adc_cb_evt_t event;

#if (defined(BSP_MCU_RX64M) || defined(BSP_MCU_RX71M) ||

defined(BSP_MCU_RX65_ALL))

uint32_t compare_flags; // valid only for compare event

#if (defined(BSP_MCU_RX65_ALL))

uint32_t compare_flagsb; // valid only for compare event b

#endif

uint8_t unit;

#endif

} adc_cb_args_t;

/* INTERFACE FUNCTIONS */ adc_err_t R_ADC_Open(uint8_t const unit, adc_mode_t const mode, adc_cfg_t * const p_cfg, void (* const p_callback)(void *p_args));

adc_err_t R_ADC_Control(uint8_t const unit, adc_cmd_t const cmd, void * const p_args);

adc_err_t R_ADC_Read(uint8_t const unit, adc_reg_t const reg_id, uint16_t * const p_data);

adc_err_t R_ADC_ReadAll(adc_data_t * const p_all_data);

adc_err_t R_ADC_Close(uint8_t const unit);

uint32_t R_ADC_GetVersion(void);

2.10.2 RX110 Interface Types ( r_s12ad_rx110_if.h )

/* ADC_OPEN() ARGUMENT DEFINITIONS */ typedef enum e_adc_mode { ADC_MODE_SS_TEMPERATURE, // single scan temperature sensor ADC_MODE_SS_INT_REF_VOLT, // single scan internal ref voltage sensor ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_SS_ONE_CH_DBLTRIG, // on even trig save to ADDBLDR & interrupt ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument

} adc_mode_t;

typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB bit)

{

ADC_TRIG_ASYNC_ADTRG = 0, // ext asynchronous trigger; not for // Group modes nor double trigger modes ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB ADC_TRIG_SYNC_TRGAN = 3, // MTUx TRGA

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ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF

ADC_TRIG_SOFTWARE = 16 // software trigger; not for Group modes // nor double trigger modes // This is not set to TRSA or TRSB } adc_trig_t;

typedef enum e_adc_add

{

ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, ADC_ADD_THREE_SAMPLES = 2, ADC_ADD_FOUR_SAMPLES = 3

} adc_add_t;

typedef enum e_adc_align

{

ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000

} adc_align_t;

typedef enum e_adc_clear

{

ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020

} adc_clear_t;

typedef enum e_adc_speed

{

ADC_CONVERT_SPEED_NORM = 0x0000, ADC_CONVERT_SPEED_HIGH = 0x0400

} adc_speed_t;

typedef struct st_adc_cfg

{

adc_add_t add_cnt; adc_align_t alignment; // ignored if addition used adc_clear_t clearing; adc_speed_t conv_speed; adc_trig_t trigger; // default and Group A trigger source adc_trig_t trigger_groupb; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb; // GBADI interrupt priority; 0-15

} adc_cfg_t;

/* ADC_CONTROL() ARGUMENT DEFINITIONS */

typedef enum e_adc_cmd

{

// Commands for special hardware configurations ADC_CMD_SET_SAMPLE_STATE_CNT,

// Commands to enable channels or sensors ADC_CMD_ENABLE_CHANS, // enables chans and A & B INT if pri != 0 ADC_CMD_ENABLE_TEMP_SENSOR, // enables sensor and INT if priority != 0 ADC_CMD_ENABLE_VOLT_SENSOR, // enables sensor and INT if priority != 0

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers ADC_CMD_SCAN_NOW, // software trigger start scan

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// Commands to poll for scan completion ADC_CMD_CHECK_SCAN_DONE, // for Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB,

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1

} adc_cmd_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{

ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH6, ADC_SST_CH8_TO_15, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAX = ADC_SST_VOLTAGE

} adc_sst_reg_t;

#define ADC_SST_CNT_MIN (6) // minimum sampling state count #define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (20)

typedef struct st_adc_time

{

adc_sst_reg_t reg_id; uint8_t num_states; // 6-255; default=20; ch8-15 use same value

} adc_time_t;

/* for ADC_CMD_ENABLE_CHANS */ // Bitwise OR these masks together for desired channels

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH8 (1<<8) #define ADC_MASK_CH9 (1<<9) #define ADC_MASK_CH10 (1<<10) #define ADC_MASK_CH11 (1<<11) #define ADC_MASK_CH12 (1<<12) #define ADC_MASK_CH13 (1<<13) #define ADC_MASK_CH14 (1<<14) #define ADC_MASK_CH15 (1<<15)

#define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_ADD_OFF (0)

typedef struct st_adc_ch_cfg // bit 0 is ch0; bit 15 is ch15

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{

uint32_t chan_mask; // channels/bits 0-15 uint32_t chan_mask_groupb; // valid for group modes uint32_t add_mask; // valid if add enabled in Open()

} adc_ch_cfg_t;

/* ADC_READ() ARGUMENT DEFINITIONS */

typedef enum e_adc_reg

{

ADC_REG_CH0 = 0, ADC_REG_CH1 = 1, ADC_REG_CH2 = 2, ADC_REG_CH3 = 3, ADC_REG_CH4 = 4, ADC_REG_CH6 = 6, ADC_REG_CH8 = 8, ADC_REG_CH9 = 9, ADC_REG_CH10 = 10, ADC_REG_CH11 = 11, ADC_REG_CH12 = 12, ADC_REG_CH13 = 13, ADC_REG_CH14 = 14, ADC_REG_CH15 = 15, ADC_REG_TEMP = 16, ADC_REG_VOLT = 17, ADC_REG_DBLTRIG = 18, ADC_REG_MAX = ADC_REG_DBLTRIG

} adc_reg_t;

#define ADC_REG_ARRAY_MAX (16)

/* ADC_READALL() ARGUMENT DEFINITIONS */

typedef struct st_adc_data

{

uint16_t chan[ADC_REG_ARRAY_MAX]; // chns/indexes used depends upon MCU uint16_t temp; uint16_t volt; uint16_t dbltrig;

} adc_data_t;

2.10.3 RX111 Interface Types ( r_s12ad_rx111_if.h )

/* ADC_OPEN() ARGUMENT DEFINITIONS */ typedef enum e_adc_mode { ADC_MODE_SS_TEMPERATURE, // single scan temperature sensor ADC_MODE_SS_INT_REF_VOLT, // single scan internal ref voltage sensor ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_SS_ONE_CH_DBLTRIG, // on even trig save to ADDBLDR & interrupt ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument

} adc_mode_t;

typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB bit) { ADC_TRIG_ASYNC_ADTRG = 0, // ext asynchronous trigger; not for Group modes // nor double trigger modes

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ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB ADC_TRIG_SYNC_TRGAN_OR_UDF4N = 3, // MTUx TRGA or MTU4 underflow

//(complementary PWM mode)

ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF ADC_TRIG_SYNC_TRG4AN = 6, // MTU4 TADCORA ADC_TRIG_SYNC_TRG4BN = 7, // MTU4 TADCORB ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 8, // MTU4 TADCORA and MTU4 TADCORB ADC_TRIG_SYNC_ELC = 9, // ELC

ADC_TRIG_SOFTWARE = 16 // software trigger; not for Group modes // nor double trigger modes // This is not set to TRSA or TRSB

} adc_trig_t;

typedef enum e_adc_add

{

ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, ADC_ADD_THREE_SAMPLES = 2, ADC_ADD_FOUR_SAMPLES = 3

} adc_add_t;

typedef enum e_adc_align

{

ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000

} adc_align_t;

typedef enum e_adc_clear

{

ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020

} adc_clear_t;

typedef enum e_adc_speed

{

ADC_CONVERT_SPEED_NORM = 0x0000, ADC_CONVERT_SPEED_HIGH = 0x0400

} adc_speed_t;

typedef struct st_adc_cfg

{

adc_add_t add_cnt; adc_align_t alignment; // ignored if addition used adc_clear_t clearing; adc_speed_t conv_speed; adc_trig_t trigger; // default and Group A trigger source adc_trig_t trigger_groupb; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb;// GBADI interrupt priority; 0-15

} adc_cfg_t;

/* ADC_CONTROL() ARGUMENT DEFINITIONS */

typedef enum e_adc_cmd

{

// Commands for special hardware configurations ADC_CMD_SET_SAMPLE_STATE_CNT,

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// Commands to enable channels or sensors ADC_CMD_ENABLE_CHANS, // enables chans and A & B INT if pri != 0 ADC_CMD_ENABLE_TEMP_SENSOR, // enables sensor and INT if priority != 0 ADC_CMD_ENABLE_VOLT_SENSOR, // enables sensor and INT if priority != 0

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers ADC_CMD_SCAN_NOW, // software trigger start scan

// Commands to poll for scan completion ADC_CMD_CHECK_SCAN_DONE, // for Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB,

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1

} adc_cmd_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{

ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH6, ADC_SST_CH8_TO_15, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAXX = ADC_SST_VOLTAGE

} adc_sst_reg_t;

#define ADC_SST_CNT_MIN (6) // RX111 #define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (20)

typedef struct st_adc_time

{

adc_sst_reg_t reg_id; uint8_t num_states; // 6-255; default=20; ch8-15 use same value

} adc_time_t;

/* for ADC_CMD_ENABLE_CHANS */ // Bitwise OR these masks together for desired channels

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH8 (1<<8) #define ADC_MASK_CH9 (1<<9) #define ADC_MASK_CH10 (1<<10) #define ADC_MASK_CH11 (1<<11) #define ADC_MASK_CH12 (1<<12)

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#define ADC_MASK_CH13 (1<<13) #define ADC_MASK_CH14 (1<<14) #define ADC_MASK_CH15 (1<<15)

#define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_ADD_OFF (0)

typedef struct st_adc_ch_cfg // bit 0 is ch0; bit 15 is ch15

{

uint32_t chan_mask; // channels/bits 0-15 uint32_t chan_mask_groupb; // valid for group modes uint32_t add_mask; // valid if add enabled in Open()

} adc_ch_cfg_t;

/* ADC_READ() ARGUMENT DEFINITIONS */

typedef enum e_adc_reg

{

ADC_REG_CH0 = 0, ADC_REG_CH1 = 1, ADC_REG_CH2 = 2, ADC_REG_CH3 = 3, ADC_REG_CH4 = 4, ADC_REG_CH6 = 6, ADC_REG_CH8 = 8, ADC_REG_CH9 = 9, ADC_REG_CH10 = 10, ADC_REG_CH11 = 11, ADC_REG_CH12 = 12, ADC_REG_CH13 = 13, ADC_REG_CH14 = 14, ADC_REG_CH15 = 15, ADC_REG_TEMP = 16, ADC_REG_VOLT = 17, ADC_REG_DBLTRIG = 18, ADC_REG_MAX

} adc_reg_t;

#define ADC_REG_ARRAY_MAX (16)

/* ADC_READALL() ARGUMENT DEFINITIONS */

typedef struct st_adc_data

{

uint16_t chan[ADC_REG_ARRAY_MAX]; // chns/indexes used depends upon MCU uint16_t temp; uint16_t volt; uint16_t dbltrig;

} adc_data_t;

2.10.4 RX113 Interface Types (r_s12ad_rx113_if.h)

/* ADC_OPEN() ARGUMENT DEFINITIONS */

typedef enum e_adc_mode

{

ADC_MODE_SS_TEMPERATURE, // single scan temperature sensor ADC_MODE_SS_INT_REF_VOLT, // single scan internal ref voltage sensor ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_SS_ONE_CH_DBLTRIG, // on even trig save to ADDBLDR & interrupt ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels

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ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument

} adc_mode_t;

typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB bit) { ADC_TRIG_ASYNC_ADTRG = 0, // ext asynchronous trigger; not for

// Group modes nor double trigger modes ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB ADC_TRIG_SYNC_TRGAN_OR_UDF4N = 3, // MTUx TRGA or MTU4 underflow

//(complementary PWM mode) ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF ADC_TRIG_SYNC_TRG4AN = 6, // MTU4 TADCORA ADC_TRIG_SYNC_TRG4BN = 7, // MTU4 TADCORB ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 8, // MTU4 TADCORA and MTU4 TADCORB ADC_TRIG_SYNC_ELC = 9, // ELC

ADC_TRIG_SOFTWARE = 16 // software trigger; not for Group modes // nor double trigger modes // This is not set to TRSA or TRSB

} adc_trig_t;

typedef enum e_adc_add

{

ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, ADC_ADD_THREE_SAMPLES = 2, ADC_ADD_FOUR_SAMPLES = 3

} adc_add_t;

typedef enum e_adc_align

{

ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000

} adc_align_t;

typedef enum e_adc_clear

{

ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020

} adc_clear_t;

typedef enum e_adc_speed

{

ADC_CONVERT_SPEED_NORM = 0x0000, ADC_CONVERT_SPEED_HIGH = 0x0400

} adc_speed_t;

typedef struct st_adc_cfg

{

adc_add_t add_cnt; adc_align_t alignment; // ignored if addition used adc_clear_t clearing; adc_speed_t conv_speed; adc_trig_t trigger; // default and Group A trigger source adc_trig_t trigger_groupb; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb; // GBADI interrupt priority; 0-15

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} adc_cfg_t;

/* ADC_CONTROL() ARGUMENT DEFINITIONS */

typedef enum e_adc_cmd

{

// Commands for special hardware configurations ADC_CMD_USE_INT_VOLT_AS_HVREF, ADC_CMD_SET_SAMPLE_STATE_CNT,

// Commands to enable channels or sensors ADC_CMD_ENABLE_CHANS, // enables chans and A & B INT if pri != 0 ADC_CMD_ENABLE_TEMP_SENSOR, // enables sensor and INT if priority != 0 ADC_CMD_ENABLE_VOLT_SENSOR, // enables sensor and INT if priority != 0

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers ADC_CMD_SCAN_NOW, // software trigger start scan

// Commands to poll for scan completion ADC_CMD_CHECK_SCAN_DONE, // for Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB,

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1

} adc_cmd_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{

ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH5, ADC_SST_CH6, ADC_SST_CH7, ADC_SST_CH8_TO_15, ADC_SST_CH21, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAX = ADC_SST_VOLTAGE

} adc_sst_reg_t;

#define ADC_SST_CNT_MIN (6) #define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (20)

typedef struct st_adc_time

{

adc_sst_reg_t reg_id; uint8_t num_states; // ch8-15 use the same value

} adc_time_t;

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/* for ADC_CMD_ENABLE_CHANS */ // Bitwise OR these masks together for desired channels

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH5 (1<<5) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH7 (1<<7) #define ADC_MASK_CH8 (1<<8) #define ADC_MASK_CH9 (1<<9) #define ADC_MASK_CH10 (1<<10) #define ADC_MASK_CH11 (1<<11) #define ADC_MASK_CH12 (1<<12) #define ADC_MASK_CH13 (1<<13) #define ADC_MASK_CH14 (1<<14) #define ADC_MASK_CH15 (1<<15) #define ADC_MASK_CH21 (1<<21)

#define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_ADD_OFF (0)

typedef struct st_adc_ch_cfg // bit 0 is ch0; bit 15 is ch15

{

uint32_t chan_mask; // channels/bits 0-15, 21 uint32_t chan_mask_groupb; // valid for group modes uint32_t add_mask; // valid if add enabled in Open()

} adc_ch_cfg_t;

/* ADC_READ() ARGUMENT DEFINITIONS */

typedef enum e_adc_reg

{

ADC_REG_CH0 = 0, ADC_REG_CH1, ADC_REG_CH2, ADC_REG_CH3, ADC_REG_CH4, ADC_REG_CH5, ADC_REG_CH6, ADC_REG_CH7, ADC_REG_CH8, ADC_REG_CH9, ADC_REG_CH10, ADC_REG_CH11, ADC_REG_CH12, ADC_REG_CH13, ADC_REG_CH14, ADC_REG_CH15, ADC_REG_CH21, ADC_REG_TEMP, ADC_REG_VOLT, ADC_REG_DBLTRIG, ADC_REG_MAX = ADC_REG_DBLTRIG

} adc_reg_t;

#define ADC_REG_ARRAY_MAX (17)

/* ADC_READALL() ARGUMENT DEFINITIONS */

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typedef struct st_adc_data

{

uint16_t chan[ADC_REG_ARRAY_MAX]; // chnls/indexes used depends upon MCU uint16_t temp; uint16_t volt; uint16_t dbltrig; // Not used on RX63x

} adc_data_t;

2.10.5 RX130 Interface Types (r_s12ad_rx130_if.h)

/***** ADC_OPEN() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_mode

{ ADC_MODE_SS_TEMPERATURE, // single scan temperature sensor ADC_MODE_SS_INT_REF_VOLT, // single scan internal ref voltage sensor ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_SS_ONE_CH_DBLTRIG, // on even triggers save to ADDBLDR &

interrupt

ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_MAX } adc_mode_t;

typedef enum e_adc_align

{ ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000 } adc_align_t;

typedef enum e_adc_add // Addition and averaging of sampled data.

{ ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, // Two samples are added,Register

ADADC.ADC[1,0]

ADC_ADD_THREE_SAMPLES = 2, // Three samples are added ADC_ADD_FOUR_SAMPLES = 3, // Four samples are added ADC_ADD_SIXTEEN_SAMPLES = 5, // Sixteen samples are added ADC_ADD_AVG_2_SAMPLES = 0x81, // average 2 samples ADC_ADD_AVG_4_SAMPLES = 0x83, // average 4 samples } adc_add_t;

typedef enum e_adc_clear

{ ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020 } adc_clear_t;

typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB bit)

{ ADC_TRIG_ASYNC_ADTRG = 0, // external asynchronous trigger; not for Group // modes nor double trigger modes ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB ADC_TRIG_SYNC_TRGAN_OR_UDF4N = 3, // MTUx TRGA or MTU4 underflow

//(complementary PWM mode)

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ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF ADC_TRIG_SYNC_TRG4AN = 6, // MTU4 TADCORA ADC_TRIG_SYNC_TRG4BN = 7, // MTU4 TADCORB ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 8, // MTU4 TADCORA and MTU4 TADCORB ADC_TRIG_SYNC_ELC = 9, // ELC

ADC_TRIG_SOFTWARE = 10, // software trigger; not for Group modes // nor double trigger modes // This is not set to TRSA or TRSB ADC_TRIG_NONE = 0x3F } adc_trig_t;

typedef enum e_adc_speed

{ ADC_CONVERT_SPEED_DEFAULT = 0, ADC_CONVERT_SPEED_HIGH = 0, ADC_CONVERT_CURRENT_LOW = 1 } adc_speed_t;

typedef struct st_adc_cfg

{ adc_speed_t conv_speed; // ADCSR.ADHSC, rx130 has two conversion

speeds

adc_align_t alignment; // ADCER.ADRFMT, Left or Right

alignment,ignored if addition used

adc_add_t add_cnt; // ADADC.ADC, Addition/average count

select.

adc_clear_t clearing; // ADCER.ACE, Automatic clearing

enable/disable after read

adc_trig_t trigger; // ADSTRGR.TRSA, default and Group A

trigger source

adc_trig_t trigger_groupb; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb; // S12GBADI interrupt priority; 0-15 } adc_cfg_t;

/***** ADC_CONTROL() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_cmd

{ // Commands for special hardware configurations ADC_CMD_USE_VREFL0, // Low reference. Default is to use AVSS0. ADC_CMD_USE_VREFH0, // High reference. Default is to use AVCC0. ADC_CMD_SET_DDA_STATE_CNT, // For Disconnect Detection Assist ADC_CMD_SET_SAMPLE_STATE_CNT, // Set the conversion time

// Command to configure channels, sensors, and comparator ADC_CMD_ENABLE_CHANS, // Configure channels to scan ADC_CMD_ENABLE_TEMP_SENSOR, // "configure" temperature sensor ADC_CMD_ENABLE_VOLT_SENSOR, // "configure" internal ref voltage sensor ADC_CMD_EN_COMPARATOR_LEVEL, // Enable comparator for threshold compare ADC_CMD_EN_COMPARATOR_WINDOW, // Enable comparator for range compare

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/asynchronous

triggers

ADC_CMD_SCAN_NOW, // Software trigger start scan

// Commands to poll for scan completion and comparator results

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ADC_CMD_CHECK_SCAN_DONE, // For Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB, ADC_CMD_CHECK_CONDITION_MET, // comparator condition

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1 } adc_cmd_t;

/* for ADC_CMD_SET_DDA_STATE_CNT */

typedef enum e_adc_charge // Disconnection Detection Assist (DDA)

{ ADC_DDA_DISCHARGE = 0x00, ADC_DDA_PRECHARGE = 0x01, ADC_DDA_OFF = 0x02, } adc_charge_t;

#define ADC_DDA_STATE_CNT_MIN (2) //ADDISCR.ADNDIS[0..3] bits. #define ADC_DDA_STATE_CNT_MAX (15)

typedef struct st_adc_dda

{ adc_charge_t method; // Discharge or Precharge uint8_t num_states; // 2-15 (0 = DISABLED, 1 is invalid) } adc_dda_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{ ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH5, ADC_SST_CH6, ADC_SST_CH7, ADC_SST_CH16_TO_21_CH24_TO_CH26, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAX = ADC_SST_VOLTAGE } adc_sst_reg_t;

#define ADC_SST_CNT_MIN (5) //For PCLKB:ADCLK = 1:1, 1:2, 1:4, 1:8 #define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (13)

typedef struct st_adc_sst

{ adc_sst_reg_t reg_id; uint8_t num_states; // ch16-21, 24-26 use the same value } adc_sst_t;

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/* for ADC_CMD_CONFIGURE_SCAN */ // Bitwise OR these masks together for desired channels and sensors // Used for all commands containing a "mask" or "flags" field

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH5 (1<<5) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH7 (1<<7) #define ADC_MASK_CH16 (1<<16) #define ADC_MASK_CH17 (1<<17) #define ADC_MASK_CH18 (1<<18) #define ADC_MASK_CH19 (1<<19) #define ADC_MASK_CH20 (1<<20) #define ADC_MASK_CH21 (1<<21) #define ADC_MASK_CH24 (1<<24) #define ADC_MASK_CH25 (1<<25) #define ADC_MASK_CH26 (1<<26) #define ADC_MASK_TEMP (1<<8) // temperature sensor #define ADC_MASK_VOLT (1<<9) // internal reference voltage sensor

#define ADC_MASK_SENSORS (ADC_MASK_TEMP | ADC_MASK_VOLT) #define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_ADD_OFF (0) #define ADC_MASK_SAMPLE_HOLD_OFF (0)

typedef enum e_adc_grpa // action when groupa interrupts groupb

scan

{ ADC_GRPA_PRIORITY_OFF = 0, // groupa ignored and does not interrupt

groupb

ADC_GRPA_GRPB_WAIT_TRIG = 1, // groupb restarts at next trigger ADC_GRPA_GRPB_RESTART_SCAN = 3, // groupb restarts immediately ADC_GRPA_GRPB_CONT_SCAN= 0x8001, // groupb restarts immediately and scans

continuously

} adc_grpa_t;

typedef enum e_adc_diag // Self-Diagnosis Channel

{ ADC_DIAG_OFF = 0x00, ADC_DIAG_0_VOLT = 0x01, ADC_DIAG_HALF_VREFH0 = 0x02, ADC_DIAG_VREFH0 = 0x03, ADC_DIAG_ROTATE_VOLTS = 0x04, } adc_diag_t;

typedef enum e_adc_elc

{ ADC_ELC_SCAN_DONE = 0, // normal scan or Group A scan complete ADC_ELC_GROUPB_SCAN_DONE, ADC_ELC_ALL_SCANS_DONE, } adc_elc_t;

typedef struct st_adc_ch_cfg

{ uint32_t chan_mask; // channels/bits 0-7, 16-21, 24-26 uint32_t chan_mask_groupb; // valid for group modes adc_grpa_t priority_groupa; // valid for group modes

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uint32_t add_mask; // valid if add enabled in Open() adc_diag_t diag_method; // self-diagnosis virtual channel adc_elc_t signal_elc; // } adc_ch_cfg_t;

/* for ADC_CMD_EN_COMPARATOR_LEVEL and ADC_CMD_EN_COMPARATOR_WINDOW */

typedef struct st_adc_cmpwin_cfg // bit-OR ADC_MASK_xxx to

{ // indicate channels/sensors

uint32_t compare_mask; // channels/sensors to compare uint32_t inside_window_mask; // condition met when within range // default=0 met when outside range uint16_t level_lo; // Low-value of window uint16_t level_hi; // High-value of window bool windowa_enable; // comparison window A enable

} adc_cmpwin_t;

/* for ADC_CMD_CHECK_CONDITION_MET use uint32_t */

/***** ADC_READ() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_reg

{ ADC_REG_CH0 = 0, // Channel 0 ADC_REG_CH1, ADC_REG_CH2, ADC_REG_CH3, ADC_REG_CH4, ADC_REG_CH5, ADC_REG_CH6, ADC_REG_CH7, // Channel 7 ADC_REG_CH16, // Channel 16 ADC_REG_CH17, ADC_REG_CH18, ADC_REG_CH19, ADC_REG_CH20, ADC_REG_CH21, ADC_REG_CH24, ADC_REG_CH25, ADC_REG_CH26, ADC_REG_TEMP, // A/D Temperature sensor output ADC_REG_VOLT, // A/D Internal Voltage Reference ADC_REG_DBLTRIG, // Data Duplication register ADC_REG_DBLTRIGA, // loaded when first multi-source trigger was A ADC_REG_DBLTRIGB, // loaded when first multi-source trigger was B ADC_REG_SELF_DIAG, // self-diagnosis register ADC_REG_MAX = ADC_REG_SELF_DIAG } adc_reg_t;

/* ADC_READALL() ARGUMENT DEFINITIONS */

typedef struct st_adc_data

{ uint16_t chan[17]; uint16_t temp; uint16_t volt; uint16_t dbltrig; uint16_t self_diag; } adc_data_t;

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2.10.6 RX210 Interface Types (r_s12ad_rx210_if.h)

/* ADC_OPEN() ARGUMENT DEFINITIONS */

typedef enum e_adc_mode

{

ADC_MODE_SS_TEMPERATURE, // single scan temperature sensor ADC_MODE_SS_INT_REF_VOLT, // single scan internal ref voltage sensor ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_SS_ONE_CH_DBLTRIG, // on even trig save to ADDBLDR & interrupt ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument

} adc_mode_t;

typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB bit)

{ ADC_TRIG_ASYNC_ADTRG = 0, // ext asynchronous trigger; not for Group // modes nor double trigger modes ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB ADC_TRIG_SYNC_TRGAN_OR_UDF4N = 3, // MTUx TRGA or MTU4 underflow

//(complementary PWM mode) ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF ADC_TRIG_SYNC_TRG4AN = 6, // MTU4 TADCORA ADC_TRIG_SYNC_TRG4BN = 7, // MTU4 TADCORB ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 8, // MTU4 TADCORA and MTU4 TADCORB ADC_TRIG_SYNC_ELC = 9, // ELC ADC_TRIG_SYNC_TEMPS = 10, // for temperature sensor, use

// ADC_TRIG_SOFTWARE ADC_TRIG_SYNC_TPUTRGAN = 11, // TPUx TRGA ADC_TRIG_SYNC_TPUTRG0AN = 12, // TPU0 TRGA

ADC_TRIG_SOFTWARE = 16 // software trigger; not for Group modes // nor double trigger modes // This is not set to TRSA or TRSB

} adc_trig_t;

typedef enum e_adc_add

{

ADC_ADD_OFF = 0, // addition is turned off for chans/sensors // add not allowed for temperature sensor ADC_ADD_TWO_SAMPLES = 1, ADC_ADD_THREE_SAMPLES = 2, ADC_ADD_FOUR_SAMPLES = 3

} adc_add_t;

typedef enum e_adc_align

{

ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000

} adc_align_t;

typedef enum e_adc_clear

{

ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020

} adc_clear_t;

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typedef struct st_adc_cfg

{

adc_add_t add_cnt; adc_align_t alignment; // ignored if addition used adc_clear_t clearing; adc_trig_t trigger; // default and Group A trigger source adc_trig_t trigger_groupb; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb; // GBADI interrupt priority; 0-15

} adc_cfg_t;

/* ADC_CONTROL() ARGUMENT DEFINITIONS */

typedef enum e_adc_cmd

{

// Commands for special hardware configurations ADC_CMD_SET_DDA_STATE_CNT, // for Disconnect Detection Assist ADC_CMD_SET_SAMPLE_STATE_CNT,

// Commands to enable channels or sensors ADC_CMD_ENABLE_CHANS, // enables chans and A & B INT if pri != 0 ADC_CMD_ENABLE_TEMP_SENSOR, // enables sensor and INT if priority != 0 ADC_CMD_ENABLE_VOLT_SENSOR, // enables sensor and INT if priority != 0

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers ADC_CMD_SCAN_NOW, // software trigger start scan

// Commands to poll for scan completion ADC_CMD_CHECK_SCAN_DONE, // for Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB,

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1

} adc_cmd_t;

/* for ADC_CMD_SET_DDA_STATE_CNT */

typedef enum e_adc_charge // Disconnection Detection Assist (DDA)

{

ADC_DDA_DISCHARGE = 0x00, ADC_DDA_PRECHARGE = 0x01, ADC_DDA_OFF = 0x02,

} adc_charge_t;

#define ADC_DDA_STATE_CNT_MIN (1) #define ADC_DDA_STATE_CNT_MAX (15)

typedef struct st_adc_dda

{

adc_charge_t method; uint8_t num_states; // 1-15

} adc_dda_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

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typedef enum e_adc_sst_reg // sample state registers

{

ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH5, ADC_SST_CH6, ADC_SST_CH7, ADC_SST_CH8_TO_15, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAX = ADC_SST_VOLTAGE

} adc_sst_reg_t;

#define ADC_SST_CNT_MIN (12) #define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (20)

typedef struct st_adc_time

{

adc_sst_reg_t reg_id; uint8_t num_states; // ch8-15 use the same value

} adc_time_t;

/* for ADC_CMD_ENABLE_CHANS */ // Bitwise OR these masks together for desired channels

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH5 (1<<5) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH7 (1<<7) #define ADC_MASK_CH8 (1<<8) #define ADC_MASK_CH9 (1<<9) #define ADC_MASK_CH10 (1<<10) #define ADC_MASK_CH11 (1<<11) #define ADC_MASK_CH12 (1<<12) #define ADC_MASK_CH13 (1<<13) #define ADC_MASK_CH14 (1<<14) #define ADC_MASK_CH15 (1<<15)

#define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_ADD_OFF (0) #define ADC_MASK_SAMPLE_HOLD_OFF (0)

typedef enum e_adc_diag // Self-Diagnosis Channel

{

ADC_DIAG_OFF = 0x00, ADC_DIAG_0_VOLT = 0x01, ADC_DIAG_HALF_VREFH0 = 0x2, ADC_DIAG_VREFH0 = 0x3, ADC_DIAG_ROTATE_VOLTS = 0x4

} adc_diag_t;

#define ADC_SST_SH_CNT_MIN (4) // minimum sample&hold states #define ADC_SST_SH_CNT_MAX (255) // maximum sample&hold states #define ADC_SST_SH_CNT_DEFAULT (20) // default sample&hold states

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typedef struct st_adc_ch_cfg // bit 0 is ch0; bit 15 is ch15

{

uint32_t chan_mask; // channels/bits 0-15 uint32_t chan_mask_groupb; // valid for group modes uint32_t add_mask; // valid if add enabled in Open() adc_diag_t diag_method; // self-diagnosis virtual channel uint8_t sample_hold_mask; // channels/bits 0-2 uint8_t sample_hold_states; // minimum .4us

} adc_ch_cfg_t;

/* ADC_READ() ARGUMENT DEFINITIONS */

typedef enum e_adc_reg

{

ADC_REG_CH0 = 0, ADC_REG_CH1, ADC_REG_CH2, ADC_REG_CH3, ADC_REG_CH4, ADC_REG_CH5, ADC_REG_CH6, ADC_REG_CH7, ADC_REG_CH8, ADC_REG_CH9, ADC_REG_CH10, ADC_REG_CH11, ADC_REG_CH12, ADC_REG_CH13, ADC_REG_CH14, ADC_REG_CH15, ADC_REG_TEMP, ADC_REG_VOLT, ADC_REG_DBLTRIG, ADC_REG_SELF_DIAG, ADC_REG_MAX = ADC_REG_SELF_DIAG

} adc_reg_t;

#define ADC_REG_ARRAY_MAX (16)

/* ADC_READALL() ARGUMENT DEFINITIONS */

typedef struct st_adc_data

{

uint16_t chan[ADC_REG_ARRAY_MAX]; uint16_t temp; uint16_t volt; uint16_t dbltrig; uint16_t self_diag;

} adc_data_t;

2.10.7 RX230 Interface Types (r_s12ad_rx230_if.h)

/***** ADC_OPEN() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_mode

{ ADC_MODE_SS_TEMPERATURE, // single scan temperature sensor ADC_MODE_SS_INT_REF_VOLT, // single scan internal ref voltage sensor ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels

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ADC_MODE_SS_ONE_CH_DBLTRIG, // on even triggers save to ADDBLDR &

// interrupt

ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument } adc_mode_t;

typedef enum e_adc_align

{ ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000 } adc_align_t;

typedef enum e_adc_add // Addition and averaging of sampled data.

{ ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, // Two samples are added,

// Register ADADC.ADC[1,0]

ADC_ADD_THREE_SAMPLES = 2, // Three samples are added ADC_ADD_FOUR_SAMPLES = 3, // Four samples are added ADC_ADD_SIXTEEN_SAMPLES = 5, // Sixteen samples are added ADC_ADD_AVG_2_SAMPLES = 0x81, // average 2 samples ADC_ADD_AVG_4_SAMPLES = 0x83, // average 4 samples } adc_add_t;

typedef enum e_adc_clear

{ ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020 } adc_clear_t;

typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB bit)

{ ADC_TRIG_ASYNC_ADTRG = 0, // external asynchronous trigger; not for Group // modes nor double trigger modes ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB ADC_TRIG_SYNC_TRGAN_OR_UDF4N = 3, // MTUx TRGA or MTU4 underflow

//(complementary PWM mode) ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF ADC_TRIG_SYNC_TRG4AN = 6, // MTU4 TADCORA ADC_TRIG_SYNC_TRG4BN = 7, // MTU4 TADCORB ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 8, // MTU4 TADCORA and MTU4 TADCORB ADC_TRIG_SYNC_ELC = 9, // ELC ADC_TRIG_SYNC_TPUTRGAN = 13, // TPUx TRGA ADC_TRIG_SYNC_TPUTRG0AN = 14, // TPU0 TRGA

ADC_TRIG_SOFTWARE = 15, // software trigger; not for Group modes // nor double trigger modes // This is not set to TRSA or TRSB ADC_TRIG_NONE = 0x3F } adc_trig_t;

typedef enum e_adc_speed

{ ADC_CONVERT_SPEED_DEFAULT = 0, ADC_CONVERT_SPEED_HIGH = 0, ADC_CONVERT_CURRENT_LOW = 1 } adc_speed_t;

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typedef struct st_adc_cfg

{ adc_speed_t conv_speed; // ADCSR.ADHSC, rx230 has two

// conversion speeds

adc_align_t alignment; // ADCER.ADRFMT, Left or Right

// alignment,ignored if addition used

adc_add_t add_cnt; // ADADC.ADC, Addition/average

// count select.

adc_clear_t clearing; // ADCER.ACE, Automatic clearing

// enable/disable after read

adc_trig_t trigger; // ADSTRGR.TRSA, default and Group A

// trigger source

adc_trig_t trigger_groupb; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb; // S12GBADI interrupt priority; 0-15 } adc_cfg_t;

/***** ADC_CONTROL() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_cmd

{ // Commands for special hardware configurations ADC_CMD_USE_VREFL0, // Low reference. Default is to use AVSS0. ADC_CMD_USE_VREFH0, // High reference. Default is to use AVCC0. ADC_CMD_SET_DDA_STATE_CNT, // For Disconnect Detection Assist ADC_CMD_SET_SAMPLE_STATE_CNT, // Set the conversion time

// Command to configure channels, sensors, and comparator ADC_CMD_ENABLE_CHANS, // Configure channels to scan ADC_CMD_ENABLE_TEMP_SENSOR, // "configure" temperature sensor ADC_CMD_ENABLE_VOLT_SENSOR, // "configure" internal ref voltage sensor ADC_CMD_EN_COMPARATOR_LEVEL, // Enable comparator for threshold compare ADC_CMD_EN_COMPARATOR_WINDOW, // Enable comparator for range compare

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/asynchronous

// triggers

ADC_CMD_SCAN_NOW, // Software trigger start scan

// Commands to poll for scan completion and comparator results ADC_CMD_CHECK_SCAN_DONE, // For Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB, ADC_CMD_CHECK_CONDITION_MET, // comparator condition

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1 } adc_cmd_t;

/* for ADC_CMD_SET_DDA_STATE_CNT */

typedef enum e_adc_charge // Disconnection Detection Assist (DDA)

{ ADC_DDA_DISCHARGE = 0x00,

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ADC_DDA_PRECHARGE = 0x01, ADC_DDA_OFF = 0x02 } adc_charge_t;

#define ADC_DDA_STATE_CNT_MIN (2) //ADDISCR.ADNDIS[0..3] bits. #define ADC_DDA_STATE_CNT_MAX (15)

typedef struct st_adc_dda

{ adc_charge_t method; // Discharge or Precharge uint8_t num_states; // 2-15 (0 = DISABLED, 1 is invalid) } adc_dda_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{ ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH5, ADC_SST_CH6, ADC_SST_CH7, ADC_SST_CH16_TO_31, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAX = ADC_SST_VOLTAGE } adc_sst_reg_t;

#define ADC_SST_CNT_MIN (5) //For PCLKB:ADCLK = 1:1, 1:2, 1:4, 1:8

//#define ADC_SST_CNT_MIN (6) //For PCLKB:ADCLK = 2:1, 4:1

#define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (13)

typedef struct st_adc_sst

{ adc_sst_reg_t reg_id; uint8_t num_states; // ch16-31 use the same value } adc_sst_t;

/* for ADC_CMD_CONFIGURE_SCAN */ // Bitwise OR these masks together for desired channels and sensors // Used for all commands containing a "mask" or "flags" field

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH5 (1<<5) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH7 (1<<7) #define ADC_MASK_CH16 (1<<16) #define ADC_MASK_CH17 (1<<17) #define ADC_MASK_CH18 (1<<18) #define ADC_MASK_CH19 (1<<19) #define ADC_MASK_CH20 (1<<20) #define ADC_MASK_CH21 (1<<21)

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#define ADC_MASK_CH22 (1<<22) #define ADC_MASK_CH23 (1<<23) #define ADC_MASK_CH24 (1<<24) #define ADC_MASK_CH25 (1<<25) #define ADC_MASK_CH26 (1<<26) #define ADC_MASK_CH27 (1<<27) #define ADC_MASK_CH28 (1<<28) #define ADC_MASK_CH29 (1<<29) #define ADC_MASK_CH30 (1<<30) #define ADC_MASK_CH31 (1<<31) #define ADC_MASK_TEMP (1<<8) // temperature sensor #define ADC_MASK_VOLT (1<<9) // internal reference voltage sensor

#define ADC_MASK_SENSORS (ADC_MASK_TEMP | ADC_MASK_VOLT) #define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_ADD_OFF (0) #define ADC_MASK_SAMPLE_HOLD_OFF (0)

typedef enum e_adc_grpa // action when groupa interrupts groupb

// scan

{ ADC_GRPA_PRIORITY_OFF = 0, // groupa ignored and does not interrupt

// groupb

ADC_GRPA_GRPB_WAIT_TRIG = 1, // groupb restarts at next trigger ADC_GRPA_GRPB_RESTART_SCAN = 3, // groupb restarts immediately ADC_GRPA_GRPB_CONT_SCAN= 0x8001, // groupb restarts immediately and scans

// continuously

} adc_grpa_t;

typedef enum e_adc_diag // Self-Diagnosis Channel

{ ADC_DIAG_OFF = 0x00, ADC_DIAG_0_VOLT = 0x01, ADC_DIAG_HALF_VREFH0 = 0x02, ADC_DIAG_VREFH0 = 0x03, ADC_DIAG_ROTATE_VOLTS = 0x04 } adc_diag_t;

typedef enum e_adc_elc

{ ADC_ELC_SCAN_DONE = 0, // normal scan or Group A scan complete ADC_ELC_GROUPB_SCAN_DONE, ADC_ELC_ALL_SCANS_DONE } adc_elc_t;

typedef struct st_adc_ch_cfg

{ uint32_t chan_mask; // channels/bits 0-7, 16-31 uint32_t chan_mask_groupb; // valid for group modes adc_grpa_t priority_groupa; // valid for group modes uint32_t add_mask; // valid if add enabled in Open() adc_diag_t diag_method; // self-diagnosis virtual channel adc_elc_t signal_elc; // } adc_ch_cfg_t;

/* for ADC_CMD_EN_COMPARATOR_LEVEL and ADC_CMD_EN_COMPARATOR_WINDOW */

typedef struct st_adc_cmpwin_cfg // bit-OR ADC_MASK_xxx to

{ // indicate channels/sensors uint32_t compare_mask; // channels/sensors to compare

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uint32_t inside_window_mask; // condition met when within range // default=0 met when outside range uint16_t level_lo; // Low-value of window uint16_t level_hi; // High-value of window bool windowa_enable; // comparison window A enable } adc_cmpwin_t;

/* for ADC_CMD_EN_COMPARATOR_WINDOW */

typedef struct st_adc_cmpwin_cfg // bit-OR ADC_MASK_xxx to

{ // indicate channels/sensors uint32_t compare_mask; // channels/sensors to compare uint32_t inside_window_mask; // condition met when within range // default=0 met when outside range uint16_t level_lo; // Low-value of window uint16_t level_hi; // High-value of window uint8_t int_priority; // S12CMPI priority level // 1=low 15=hi 0=polled } adc_cmpwin_t;

/* for ADC_CMD_CHECK_CONDITION_MET use uint32_t */

/***** ADC_READ() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_reg

{ ADC_REG_CH0 = 0, // Channel 0 ADC_REG_CH1, ADC_REG_CH2, ADC_REG_CH3, ADC_REG_CH4, ADC_REG_CH5, ADC_REG_CH6, ADC_REG_CH7, // Channel 7 ADC_REG_CH16, // Channel 16 ADC_REG_CH17, ADC_REG_CH18, ADC_REG_CH19, ADC_REG_CH20, ADC_REG_CH21, ADC_REG_CH22, ADC_REG_CH23, ADC_REG_CH24, ADC_REG_CH25, ADC_REG_CH26, ADC_REG_CH27, ADC_REG_CH28, ADC_REG_CH29, ADC_REG_CH30, ADC_REG_CH31, // Channel 31 ADC_REG_TEMP, // A/D Temperature sensor output ADC_REG_VOLT, // A/D Internal Voltage Reference ADC_REG_DBLTRIG, // Data Duplication register ADC_REG_DBLTRIGA, // loaded when first multi-source trigger was A ADC_REG_DBLTRIGB, // loaded when first multi-source trigger was B ADC_REG_SELF_DIAG, // self-diagnosis register ADC_REG_MAX = ADC_REG_SELF_DIAG } adc_reg_t;

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/* ADC_READALL() ARGUMENT DEFINITIONS */

typedef struct st_adc_data

{ uint16_t chan[24]; uint16_t temp; uint16_t volt; uint16_t dbltrig; uint16_t self_diag; } adc_data_t;

2.10.8 RX231 Interface Types (r_s12ad_rx231_if.h)

/* ADC_OPEN() ARGUMENT DEFINITIONS */

typedef enum e_adc_mode

{ ADC_MODE_SS_TEMPERATURE, // single scan temperature sensor ADC_MODE_SS_INT_REF_VOLT, // single scan internal ref voltage sensor ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_SS_ONE_CH_DBLTRIG, // on even triggers save to ADDBLDR & int ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument } adc_mode_t;

typedef enum e_adc_align

{

ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000

} adc_align_t;

typedef enum e_adc_add

{

ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, // Two samples are added,Reg ADADC.ADC[1,0] ADC_ADD_THREE_SAMPLES = 2, // Three samples are added ADC_ADD_FOUR_SAMPLES = 3, // Four samples are added ADC_ADD_SIXTEEN_SAMPLES = 5, // Sixteen samples are added ADC_ADD_AVG_2_SAMPLES = 0x81, // average 2 samples ADC_ADD_AVG_4_SAMPLES = 0x83, // average 4 samples

} adc_add_t;

typedef enum e_adc_clear

{

ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020

} adc_clear_t;

typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB bit)

{ ADC_TRIG_ASYNC_ADTRG = 0, // external asynchronous trigger; not for Group // modes nor double trigger modes ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB

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ADC_TRIG_SYNC_TRGAN_OR_UDF4N = 3, // MTUx TRGA or MTU4 underflow

//(complementary PWM mode) ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF ADC_TRIG_SYNC_TRG4AN = 6, // MTU4 TADCORA ADC_TRIG_SYNC_TRG4BN = 7, // MTU4 TADCORB

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 8, // MTU4 TADCORA and MTU4 TADCORB ADC_TRIG_SYNC_ELC = 9, // ELC ADC_TRIG_SYNC_TPUTRGAN = 13, // TPUx TRGA ADC_TRIG_SYNC_TPUTRG0AN = 14, // TPU0 TRGA

ADC_TRIG_SOFTWARE = 15, // software trigger; not for Group modes // nor double trigger modes // This is not set to TRSA or TRSB ADC_TRIG_NONE = 0x3F

} adc_trig_t;

typedef enum e_adc_speed

{ ADC_CONVERT_SPEED_DEFAULT = 0, ADC_CONVERT_SPEED_HIGH = 0, ADC_CONVERT_CURRENT_LOW = 1 } adc_speed_t;

typedef struct st_adc_cfg

{

adc_speed_t conv_speed; // ADCSR.ADHSC, Two conversion speeds adc_align_t alignment; // ADCER.ADRFMT, L or R align adc_add_t add_cnt; // ADADC.ADC, Addition/average cnt select. adc_clear_t clearing; // ADCER.ACE, Auto clearing enable/disable adc_trig_t trigger; // ADSTRGR.TRSA, default & Grp A trig src adc_trig_t trigger_groupb; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb; // S12GBADI interrupt priority; 0-15

} adc_cfg_t;

/* ADC_CONTROL() ARGUMENT DEFINITIONS */

typedef enum e_adc_cmd

{

// Commands for special hardware configurations ADC_CMD_USE_VREFL0, // Low reference. Default is to use AVSS0. ADC_CMD_USE_VREFH0, // High reference. Default is to use AVCC0. ADC_CMD_SET_DDA_STATE_CNT, // For Disconnect Detection Assist ADC_CMD_SET_SAMPLE_STATE_CNT, // Set the conversion time

// Command to configure channels, sensors, and comparator ADC_CMD_ENABLE_CHANS, // Configure channels to scan ADC_CMD_ENABLE_TEMP_SENSOR, // "configure" temperature sensor ADC_CMD_ENABLE_VOLT_SENSOR, // "configure" internal ref voltage sensor ADC_CMD_EN_COMPARATOR_LEVEL, // Enable comparator for threshold compare ADC_CMD_EN_COMPARATOR_WINDOW, // Enable comparator for range compare

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers ADC_CMD_SCAN_NOW, // Software trigger start scan

// Commands to poll for scan completion and comparator results ADC_CMD_CHECK_SCAN_DONE, // For Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB,

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ADC_CMD_CHECK_CONDITION_MET, // comparator condition

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1

} adc_cmd_t;

/* for ADC_CMD_SET_DDA_STATE_CNT */

typedef enum e_adc_charge // Disconnection Detection Assist (DDA)

{

ADC_DDA_DISCHARGE = 0x00, ADC_DDA_PRECHARGE = 0x01, ADC_DDA_OFF = 0x02,

} adc_charge_t;

#define ADC_DDA_STATE_CNT_MIN (2) //ADDISCR.ADNDIS[0..3] bits. #define ADC_DDA_STATE_CNT_MAX (15)

typedef struct st_adc_dda

{

adc_charge_t method; // Discharge or Precharge uint8_t num_states; // 2-15 (0 = DISABLED, 1 is invalid)

} adc_dda_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{

ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH5, ADC_SST_CH6, ADC_SST_CH7, ADC_SST_CH16_TO_31, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAX = ADC_SST_VOLTAGE

} adc_sst_reg_t;

#define ADC_SST_CNT_MIN (5) //For PCLKB:ADCLK = 1:1, 1:2, 1:4, 1:8

//#define ADC_SST_CNT_MIN (6) //For PCLKB:ADCLK = 2:1, 4:1

#define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (13)

typedef struct st_adc_sst

{ adc_sst_reg_t reg_id; uint8_t num_states; // ch16-31 use the same value } adc_sst_t;

/* for ADC_CMD_CONFIGURE_SCAN */ // Bitwise OR these masks together for desired channels and sensors // Used for all commands containing a "mask" or "flags" field

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2)

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#define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH5 (1<<5) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH7 (1<<7) #define ADC_MASK_CH16 (1<<16) #define ADC_MASK_CH17 (1<<17) #define ADC_MASK_CH18 (1<<18) #define ADC_MASK_CH19 (1<<19) #define ADC_MASK_CH20 (1<<20) #define ADC_MASK_CH21 (1<<21) #define ADC_MASK_CH22 (1<<22) #define ADC_MASK_CH23 (1<<23) #define ADC_MASK_CH24 (1<<24) #define ADC_MASK_CH25 (1<<25) #define ADC_MASK_CH26 (1<<26) #define ADC_MASK_CH27 (1<<27) #define ADC_MASK_CH28 (1<<28) #define ADC_MASK_CH29 (1<<29) #define ADC_MASK_CH30 (1<<30) #define ADC_MASK_CH31 (1<<31) #define ADC_MASK_TEMP (1<<8) // temperature sensor #define ADC_MASK_VOLT (1<<9) // internal reference voltage sensor

#define ADC_MASK_SENSORS (ADC_MASK_TEMP | ADC_MASK_VOLT) #define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_ADD_OFF (0) #define ADC_MASK_SAMPLE_HOLD_OFF (0)

typedef enum e_adc_grpa // action when groupa interrupts groupb

scan { ADC_GRPA_PRIORITY_OFF = 0, // groupa ignored and doesn’t int groupb ADC_GRPA_GRPB_WAIT_TRIG = 1, // groupb restarts at next trigger ADC_GRPA_GRPB_RESTART_SCAN= 3, // groupb restarts immediately ADC_GRPA_GRPB_CONT_SCAN = 0x8001, // groupb restarts immed, scans cont } adc_grpa_t;

typedef enum e_adc_diag // Self-Diagnosis Channel

{

ADC_DIAG_OFF = 0x00, ADC_DIAG_0_VOLT = 0x01, ADC_DIAG_HALF_VREFH0 = 0x02, ADC_DIAG_VREFH0 = 0x03, ADC_DIAG_ROTATE_VOLTS = 0x04,

} adc_diag_t;

typedef enum e_adc_elc

{ ADC_ELC_SCAN_DONE = 0, // normal scan or Group A scan complete ADC_ELC_GROUPB_SCAN_DONE, ADC_ELC_ALL_SCANS_DONE, } adc_elc_t;

typedef struct st_adc_ch_cfg

{ uint32_t chan_mask; // channels/bits 0-7, 16-31 uint32_t chan_mask_groupb; // valid for group modes adc_grpa_t priority_groupa; // valid for group modes uint32_t add_mask; // valid if add enabled in Open() adc_diag_t diag_method; // self-diagnosis virtual channel

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adc_elc_t signal_elc; // } adc_ch_cfg_t;

/* for ADC_CMD_EN_COMPARATOR_LEVEL and ADC_CMD_EN_COMPARATOR_WINDOW */

typedef struct st_adc_cmpwin_cfg // bit-OR ADC_MASK_xxx to

{ // indicate channels/sensors uint32_t compare_mask; // channels/sensors to compare uint32_t inside_window_mask; // condition met when within range // default=0 met when outside range uint16_t level_lo; // Low-value of window uint16_t level_hi; // High-value of window bool windowa_enable; // comparison window A enable } adc_cmpwin_t;

/* for ADC_CMD_CHECK_CONDITION_MET use uint32_t */

/***** ADC_READ() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_reg

{ ADC_REG_CH0 = 0, // Channel 0 ADC_REG_CH1, ADC_REG_CH2, ADC_REG_CH3, ADC_REG_CH4, ADC_REG_CH5, ADC_REG_CH6, ADC_REG_CH7, // Channel 7 ADC_REG_CH16, // Channel 16 ADC_REG_CH17, ADC_REG_CH18, ADC_REG_CH19, ADC_REG_CH20, ADC_REG_CH21, ADC_REG_CH22, ADC_REG_CH23, ADC_REG_CH24, ADC_REG_CH25, ADC_REG_CH26, ADC_REG_CH27, ADC_REG_CH28, ADC_REG_CH29, ADC_REG_CH30, ADC_REG_CH31, // Channel 31 ADC_REG_TEMP, // A/D Temperature sensor output ADC_REG_VOLT, // A/D Internal Voltage Reference ADC_REG_DBLTRIG, // Data Duplication register ADC_REG_DBLTRIGA, // loaded when first multi-source trigger was A ADC_REG_DBLTRIGB, // loaded when first multi-source trigger was B ADC_REG_SELF_DIAG, // self-diagnosis register ADC_REG_MAX = ADC_REG_SELF_DIAG } adc_reg_t;

/* ADC_READALL() ARGUMENT DEFINITIONS */

typedef struct st_adc_data

{ uint16_t chan[24]; uint16_t temp; uint16_t volt; uint16_t dbltrig; uint16_t self_diag;

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} adc_data_t;

2.10.9 RX63x Interface Types (r_s12ad_rx63x_if.h)

/* ADC_OPEN() ARGUMENT DEFINITIONS */

typedef enum e_adc_mode

{

ADC_MODE_SS_TEMPERATURE, // single scan temperature sensor ADC_MODE_SS_INT_REF_VOLT, // single scan internal ref voltage sensor ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument

} adc_mode_t;

typedef enum e_adc_trig // trigger sources (set to ADSTRS bit)

{ ADC_TRIG_ASYNC_ADTRG = 0, // ADTRG#0 ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG0BN = 2, // MTU0 TRGB ADC_TRIG_SYNC_TRGAN = 3, // MTUx TRGA ADC_TRIG_SYNC_TPUTRGAN = 4, // TPUx TRGA ADC_TRIG_SYNC_TRG0EN = 5, // MTU0 TRGE ADC_TRIG_SYNC_TRG0FN = 6, // MTU0 TRGF ADC_TRIG_SYNC_TRG4AN_OR_TRG4BN = 7, // MTU4 TADCORA or MTU4 TADCORB ADC_TRIG_SYNC_TPUTRG0AN = 8, // TPU0 TRGA ADC_TRIG_SYNC_TMRTRG0AN = 9, // TMR0 TCORA ADC_TRIG_SYNC_TMRTRG2AN = 10, // TMR2 TCORA

ADC_TRIG_SOFTWARE = 16 // software trigger(This is not set to ADSTRS)

} adc_trig_t;

typedef enum e_adc_add

{

ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, ADC_ADD_THREE_SAMPLES = 2, ADC_ADD_FOUR_SAMPLES = 3

} adc_add_t;

typedef enum e_adc_align

{

ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000

} adc_align_t;

typedef enum e_adc_clear

{

ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020

} adc_clear_t;

typedef enum e_adc_speed

{

ADC_CONVERT_SPEED_PCLK_DIV8 = 0x00, ADC_CONVERT_SPEED_PCLK_DIV4 = 0x01, ADC_CONVERT_SPEED_PCLK_DIV2 = 0x02, ADC_CONVERT_SPEED_PCLK = 0x03

} adc_speed_t;

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typedef struct st_adc_cfg

{

adc_add_t add_cnt; adc_align_t alignment; // ignored if addition used adc_clear_t clearing; adc_speed_t conv_speed; adc_trig_t trigger; uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled

} adc_cfg_t;

/* ADC_CONTROL() ARGUMENT DEFINITIONS */

typedef enum e_adc_cmd

{

// Commands for special hardware configurations ADC_CMD_SET_SAMPLE_STATE_CNT,

// Commands to enable channels or sensors ADC_CMD_ENABLE_CHANS, // enables chans and INT if priority != 0 ADC_CMD_ENABLE_TEMP_SENSOR, // enables sensor and INT if priority != 0 ADC_CMD_ENABLE_VOLT_SENSOR, // enables sensor and INT if priority != 0

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers ADC_CMD_SCAN_NOW, // software trigger start scan

// Commands to poll for scan completion ADC_CMD_CHECK_SCAN_DONE, // for Normal

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1

} adc_cmd_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{

ADC_SST_CH0_TO_20, ADC_SST_TEMPERATURE,

} adc_sst_reg_t;

#define ADC_SST_CNT_MIN (10) #define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (20)

typedef struct st_adc_time

{

adc_sst_reg_t reg_id; uint8_t num_states;

} adc_time_t;

/* for ADC_CMD_ENABLE_CHANS */

// Bitwise OR these masks together for desired channels

#define ADC_MASK_CH0 (1<<0)

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#define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH5 (1<<5) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH7 (1<<7) #define ADC_MASK_CH8 (1<<8) #define ADC_MASK_CH9 (1<<9) #define ADC_MASK_CH10 (1<<10) #define ADC_MASK_CH11 (1<<11) #define ADC_MASK_CH12 (1<<12) #define ADC_MASK_CH13 (1<<13) #define ADC_MASK_CH14 (1<<14) #define ADC_MASK_CH15 (1<<15) #define ADC_MASK_CH16 (1<<16) #define ADC_MASK_CH17 (1<<17) #define ADC_MASK_CH18 (1<<18) #define ADC_MASK_CH19 (1<<19) #define ADC_MASK_CH20 (1<<20)

#define ADC_MASK_ADD_OFF (0)

typedef struct st_adc_ch_cfg // bit 0 is ch0; bit 20 is ch20

{

uint32_t chan_mask; // channels/bits 0-20 uint32_t add_mask; // valid if add enabled in Open()

} adc_ch_cfg_t;

/* ADC_READ() ARGUMENT DEFINITIONS */

typedef enum e_adc_reg

{

ADC_REG_CH0 = 0, ADC_REG_CH1, ADC_REG_CH2, ADC_REG_CH3, ADC_REG_CH4, ADC_REG_CH5, ADC_REG_CH6, ADC_REG_CH7, ADC_REG_CH8, ADC_REG_CH9, ADC_REG_CH10, ADC_REG_CH11, ADC_REG_CH12, ADC_REG_CH13, ADC_REG_CH14, ADC_REG_CH15, ADC_REG_CH16, ADC_REG_CH17, ADC_REG_CH18, ADC_REG_CH19, ADC_REG_CH20, ADC_REG_TEMP, ADC_REG_VOLT, ADC_REG_MAX = ADC_REG_VOLT

} adc_reg_t;

#define ADC_REG_ARRAY_MAX (21)

/* ADC_READALL() ARGUMENT DEFINITIONS */

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typedef struct st_adc_data

{

uint16_t chan[ADC_REG_ARRAY_MAX]; uint16_t temp; uint16_t volt;

} adc_data_t;

2.10.10 RX64M, RX71M Interface Types ( r_s12ad_rx64m_if.h, r_s12ad_rx71m_if.h )

/* ADC_OPEN() ARGUMENT DEFINITIONS */

typedef enum e_adc_mode

{

ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_SS_ONE_CH_DBLTRIG, // on even triggers save to ADDBLDR & int ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument

} adc_mode_t;

typedef enum e_adc_res

{

ADC_RESOLUTION_12_BIT = 0, // 13 ADCLKs conversion (15 self diagnosis) ADC_RESOLUTION_10_BIT = 1, // 11 ADCLKs conversion (13 self diagnosis) ADC_RESOLUTION_8_BIT = 2 // 9 ADCLKs conversion (11 self diagnosis)

} adc_res_t ;

typedef enum e_adc_align

{

ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000

} adc_align_t;

typedef enum e_adc_add

{

ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, ADC_ADD_THREE_SAMPLES = 2, ADC_ADD_FOUR_SAMPLES = 3, ADC_ADD_AVG_2_SAMPLES = 0x81, // average 2 samples ADC_ADD_AVG_4_SAMPLES = 0x83, // average 4 samples

} adc_add_t;

typedef enum e_adc_clear

{

ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020

} adc_clear_t;

typedef enum e_adc_trig // trigger sources (set to TRSA bit or TRSB

bit) { ADC_TRIG_ASYNC_ADTRG = 0, // ext asynchronous trigger; not for Group // modes nor double trigger modes ADC_TRIG_SYNC_TRG0AN = 1, // MTU0 TRGA ADC_TRIG_SYNC_TRG1AN = 2, // MTU1 TRGA ADC_TRIG_SYNC_TRG2AN = 3, // MTU2 TRGA ADC_TRIG_SYNC_TRG3AN = 4, // MTU3 TRGA

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ADC_TRIG_SYNC_TRG4AN_OR_UDF4N = 5, // MTU4 TRGA or MTU4 underflow

//(complementary PWM mode)

ADC_TRIG_SYNC_TRG6AN = 6, // MTU6 TRGA ADC_TRIG_SYNC_TRG7AN_OR_UDF7N = 7, // MTU7 TRGA or MTU7 underflow

//(complementary PWM mode)

ADC_TRIG_SYNC_TRG0EN = 8, // MTU0 TRGE ADC_TRIG_SYNC_TRG4AN = 9, // MTU4 TADCORA ADC_TRIG_SYNC_TRG4BN = 10, // MTU4 TADCORB ADC_TRIG_SYNC_TRG4AN_OR_TRG4BN = 11, // MTU4 TADCORA or MTU4 TADCORB ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 12, // MTU4 TADCORA and MTU4 TADCORB ADC_TRIG_SYNC_TRG7AN = 13, // MTU7 TADCORA ADC_TRIG_SYNC_TRG7BN = 14, // MTU7 TADCORB ADC_TRIG_SYNC_TRG7AN_OR_TRG7BN = 15, // MTU7 TADCORA or MTU7 TADCORB ADC_TRIG_SYNC_TRG7AN_AND_TRG7BN = 16, // MTU7 TADCORA and MTU7 TADCORB ADC_TRIG_SYNC_GTADTR0AN = 17, // GPT0 GTADTRA ADC_TRIG_SYNC_GTADTR0BN = 18, // GPT0 GTADTRB ADC_TRIG_SYNC_GTADTR1AN = 19, // GPT1 GTADTRA ADC_TRIG_SYNC_GTADTR1BN = 20, // GPT1 GTADTRB ADC_TRIG_SYNC_GTADTR2AN = 21, // GPT2 GTADTRA ADC_TRIG_SYNC_GTADTR2BN = 22, // GPT2 GTADTRB ADC_TRIG_SYNC_GTADTR3AN = 23, // GPT3 GTADTRA ADC_TRIG_SYNC_GTADTR3BN = 24, // GPT3 GTADTRB ADC_TRIG_SYNC_GTADTR0AN_OR_GTADTR0BN = 25, // GPT0 GTADTRA or GPT0 GTADTRB ADC_TRIG_SYNC_GTADTR1AN_OR_GTADTR1BN = 26, // GPT1 GTADTRA or GPT1 GTADTRB ADC_TRIG_SYNC_GTADTR2AN_OR_GTADTR2BN = 27, // GPT2 GTADTRA or GPT2 GTADTRB ADC_TRIG_SYNC_GTADTR3AN_OR_GTADTR3BN = 28, // GPT3 GTADTRA or GPT3 GTADTRB ADC_TRIG_SYNC_TMRTRG0AN = 29, // TMR0 TCORA ADC_TRIG_SYNC_TMRTRG2AN = 30, // TMR2 TCORA ADC_TRIG_SYNC_TPUTRGAN = 31, // TPUx TRGA ADC_TRIG_SYNC_TPUTRG0AN = 32, // TPU0 TRGA ADC_TRIG_SYNC_ELC = 48, // ELC

ADC_TRIG_SOFTWARE = 64, // software trigger; not for Group // modes nor double trigger modes // This is not set to TRSA or TRSB ADC_TRIG_NONE = 0x3F

} adc_trig_t;

typedef struct st_adc_cfg

{

adc_res_t resolution; // 8, 10, or 12-bit adc_align_t alignment; // ignored if addition used adc_add_t add_cnt; // add or average samples adc_clear_t clearing; // clear after read adc_trig_t trigger; // default and Group A trigger source adc_trig_t trigger_groupb; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb; // S12GBADI interrupt priority; 0-15

} adc_cfg_t;

/***** ADC_CONTROL() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_cmd

{

// Commands for special hardware configurations ADC_CMD_SET_DDA_STATE_CNT, // for Disconnect Detection Assist ADC_CMD_SET_SAMPLE_STATE_CNT,

// Command to configure channels, sensors, and comparator ADC_CMD_ENABLE_CHANS, // configure channels and sensors to scan

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ADC_CMD_EN_COMPARATOR_LEVEL, // enable comparator for threshold compare ADC_CMD_EN_COMPARATOR_WINDOW, // enable comparator for range compare

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers ADC_CMD_SCAN_NOW, // software trigger start scan

// Commands to poll for scan completion and comparator results ADC_CMD_CHECK_SCAN_DONE, // for Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB, ADC_CMD_CHECK_CONDITION_MET, // comparator condition

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1

} adc_cmd_t;

/* for ADC_CMD_SET_DDA_STATE_CNT */

typedef enum e_adc_charge // Disconnection Detection Assist (DDA)

{

ADC_DDA_DISCHARGE = 0x00, ADC_DDA_PRECHARGE = 0x01, ADC_DDA_OFF = 0x02,

} adc_charge_t;

#define ADC_DDA_STATE_CNT_MIN (2) #define ADC_DDA_STATE_CNT_MAX (15)

typedef struct st_adc_dda

{

adc_charge_t method; uint8_t num_states; // 2-15

} adc_dda_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{

ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH5, ADC_SST_CH6, ADC_SST_CH7, // end unit 0 ADC_SST_CH8_TO_20, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAX = ADC_SST_VOLTAGE

} adc_sst_reg_t;

#define ADC_SST_CNT_MIN (5) #define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (11)

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typedef struct st_adc_time

{

adc_sst_reg_t reg_id; uint8_t num_states; // ch8-20 use the same value

} adc_sst_t;

/* for ADC_CMD_CONFIGURE_SCAN */

// Bitwise OR these masks together for desired channels and sensors // Used for all commands containing a "mask" or "flags" field

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH5 (1<<5) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH7 (1<<7) #define ADC_MASK_CH8 (1<<8) #define ADC_MASK_CH9 (1<<9) #define ADC_MASK_CH10 (1<<10) #define ADC_MASK_CH11 (1<<11) #define ADC_MASK_CH12 (1<<12) #define ADC_MASK_CH13 (1<<13) #define ADC_MASK_CH14 (1<<14) #define ADC_MASK_CH15 (1<<15) #define ADC_MASK_CH16 (1<<16) #define ADC_MASK_CH17 (1<<17) #define ADC_MASK_CH18 (1<<18) #define ADC_MASK_CH19 (1<<19) #define ADC_MASK_CH20 (1<<20) #define ADC_MASK_TEMP (1<<21) // temperature sensor #define ADC_MASK_VOLT (1<<22) // internal reference voltage sensor

#define ADC_MASK_SENSORS (ADC_MASK_TEMP | ADC_MASK_VOLT) #define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_ADD_OFF (0) #define ADC_MASK_SAMPLE_HOLD_OFF (0)

typedef enum e_adc_grpa // action when groupa interrupts groupb

scan

{

ADC_GRPA_PRIORITY_OFF = 0, // groupa ignored;does not interrupt groupb ADC_GRPA_GRPB_WAIT_TRIG = 1, // groupb restarts at next trigger ADC_GRPA_GRPB_RESTART_SCAN = 3, // groupb restarts immediately ADC_GRPA_GRPB_CONT_SCAN= 0x8001, // groupb restarts immed and scans cont.

} adc_grpa_t;

typedef enum e_adc_diag // Self-Diagnosis Channel

{

ADC_DIAG_OFF = 0x00, ADC_DIAG_0_VOLT = 0x01, ADC_DIAG_HALF_VREFH0 = 0x2, ADC_DIAG_VREFH0 = 0x3, ADC_DIAG_ROTATE_VOLTS = 0x4

} adc_diag_t;

#define ADC_SST_SH_CNT_MIN (4) // minimum sample&hold states #define ADC_SST_SH_CNT_MAX (255) // maximum sample&hold states

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#define ADC_SST_SH_CNT_DEFAULT (24) // default sample&hold states

typedef struct st_adc_ch_cfg // bit 0 is ch0; bit 15 is ch15

{

uint32_t scan_mask; // channels/bits 0-15 uint32_t scan_mask_groupb; // valid for group modes adc_grpa_t priority_groupa; // valid for group modes uint32_t add_mask; // valid if add enabled in Open() adc_diag_t diag_method; // self-diagnosis virtual channel bool anex_enable; // unit1: use external amplifier uint8_t sample_hold_mask; // channels/bits 0-2 uint8_t sample_hold_states; // minimum .4us

} adc_ch_cfg_t;

/* for ADC_CMD_EN_COMPARATOR_LEVEL and ADC_CMD_EN_COMPARATOR_WINDOW */

typedef struct st_adc_cmpwin_cfg // bit-OR ADC_MASK_xxx to

{ // indicate channels/sensors

uint32_t compare_mask; // channels/sensors to compare uint32_t inside_window_mask; // condition met when within range // default=0 met when outside range uint16_t level_lo; uint16_t level_hi; uint8_t int_priority; // S12CMPI priority level // 1=low 15=hi 0=polled

} adc_cmpwin_t;

/***** ADC_READ() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_reg

{

ADC_REG_CH0 = 0, ADC_REG_CH1 = 1, ADC_REG_CH2 = 2, ADC_REG_CH3 = 3, ADC_REG_CH4 = 4, ADC_REG_CH5 = 5, ADC_REG_CH6 = 6, ADC_REG_CH7 = 7, // last channel unit0 ADC_REG_CH8 = 8, ADC_REG_CH9 = 9, ADC_REG_CH10 = 10, ADC_REG_CH11 = 11, ADC_REG_CH12 = 12, ADC_REG_CH13 = 13, ADC_REG_CH14 = 14, ADC_REG_CH15 = 15, ADC_REG_CH16 = 16, ADC_REG_CH17 = 17, ADC_REG_CH18 = 18, ADC_REG_CH19 = 19, ADC_REG_CH20 = 20, ADC_REG_TEMP, ADC_REG_VOLT, // both units ADC_REG_DBLTRIG, ADC_REG_DBLTRIGA, // loaded when first multi-source trigger was A ADC_REG_DBLTRIGB, // loaded when first multi-source trigger was B ADC_REG_SELF_DIAG,

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ADC_REG_MAX = ADC_REG_SELF_DIAG

} adc_reg_t;

#define ADC_0_REG_ARRAY_MAX (8) #define ADC_1_REG_ARRAY_MAX (21)

/* ADC_READALL() ARGUMENT DEFINITIONS */

typedef struct st_adc_unit0_data

{

uint16_t chan[ADC_0_REG_ARRAY_MAX]; uint16_t dbltrig; uint16_t dbltrigA; uint16_t dbltrigB; uint16_t self_diag;

} adc_unit0_data_t;

typedef struct st_adc_unit1_data

{

uint16_t chan[ADC_1_REG_ARRAY_MAX]; uint16_t temp; uint16_t volt; uint16_t dbltrig; uint16_t dbltrigA; uint16_t dbltrigB; uint16_t self_diag;

} adc_unit1_data_t;

typedef struct st_adc_data

{

adc_unit0_data_t unit0; adc_unit1_data_t unit1;

} adc_data_t;

2.10.11 RX65x Interface Types ( r_s12ad_rx65x_if.h )

/* ADC_OPEN() ARGUMENT DEFINITIONS */

typedef enum e_adc_mode

{

ADC_MODE_SS_ONE_CH, // single scan one channel ADC_MODE_SS_MULTI_CH, // 1 trigger source, scan multiple channels ADC_MODE_CONT_ONE_CH, // continuous scan one channel ADC_MODE_CONT_MULTI_CH, // continuous scan multiple channels ADC_MODE_SS_ONE_CH_DBLTRIG, // on even triggers save to ADDBLDR & int ADC_MODE_SS_MULTI_CH_GROUPED, // 2 trigger sources, scan multiple channels ADC_MODE_SS_MULTI_CH_GROUPED_GROUPC,// 3 trigger sources, scan multiple

// channels

ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A_GROUPC, ADC_MODE_MAX // This definition DO NOT USE for R_ADC_Open() argument

} adc_mode_t;

typedef enum e_adc_res

{

ADC_RESOLUTION_12_BIT = 0, // 13 ADCLKs conversion (15 self diagnosis) ADC_RESOLUTION_10_BIT = 1, // 11 ADCLKs conversion (13 self diagnosis) ADC_RESOLUTION_8_BIT = 2, // 9 ADCLKs conversion (11 self diagnosis) ADC_RESOLUTION_END_ENUM

} adc_res_t ;

typedef enum e_adc_align

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{

ADC_ALIGN_RIGHT = 0x0000, ADC_ALIGN_LEFT = 0x8000

} adc_align_t;

typedef enum e_adc_add

{

ADC_ADD_OFF = 0, // addition is turned off for chans/sensors ADC_ADD_TWO_SAMPLES = 1, ADC_ADD_THREE_SAMPLES = 2, ADC_ADD_FOUR_SAMPLES = 3, ADC_ADD_SIXTEEN_SAMPLES = 5, ADC_ADD_AVG_2_SAMPLES = 0x81, // average 2 samples ADC_ADD_AVG_4_SAMPLES = 0x83, // average 4 samples

} adc_add_t;

typedef enum e_adc_clear

{

ADC_CLEAR_AFTER_READ_OFF = 0x0000, ADC_CLEAR_AFTER_READ_ON = 0x0020

} adc_clear_t;

typedef enum e_adc_trig // trigger sources

{

ADC_TRIG_NONE = 0x3F, // External ADC_TRIG_ASYNC_ADTRG = 0, // ext asynchronous trig; not for Group modes // nor double trigger modes // MTU ADC_TRIG_SYNC_TRG0AN = 1, ADC_TRIG_SYNC_TRG1AN = 2, ADC_TRIG_SYNC_TRG2AN = 3, ADC_TRIG_SYNC_TRG3AN = 4, ADC_TRIG_SYNC_TRG4AN_OR_UDF4N = 5, ADC_TRIG_SYNC_TRG6AN = 6, ADC_TRIG_SYNC_TRG7AN_OR_UDF7N = 7, ADC_TRIG_SYNC_TRG0EN = 8, ADC_TRIG_SYNC_TRG4AN = 9, ADC_TRIG_SYNC_TRG4BN = 10, ADC_TRIG_SYNC_TRG4AN_OR_TRG4BN = 11, // either event causes a trigger ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN = 12, ADC_TRIG_SYNC_TRG7AN = 13, ADC_TRIG_SYNC_TRG7BN = 14, ADC_TRIG_SYNC_TRG7AN_OR_TRG7BN = 15, // either event causes a trigger ADC_TRIG_SYNC_TRG7AN_AND_TRG7BN = 16, // TMR ADC_TRIG_SYNC_TMRTRG0AN = 29, ADC_TRIG_SYNC_TMRTRG2AN = 30, // TPU ADC_TRIG_SYNC_TPUTRG0AN = 31, ADC_TRIG_SYNC_TPUTRGAN = 32, // ELC ADC_TRIG_SYNC_ELC = 48,

ADC_TRIG_HW_MAX, ADC_TRIG_SOFTWARE = 64 // software trigger; not for Group modes // nor double trigger modes

} adc_trig_t;

typedef struct st_adc_cfg

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{

adc_res_t resolution; // 8, 10, or 12-bit adc_align_t alignment; // ignored if addition used adc_add_t add_cnt; // add or average samples adc_clear_t clearing; // clear after read adc_trig_t trigger; // default and Group A trigger source adc_trig_t trigger_groupb; // valid only for group modes adc_trig_t trigger_groupc; // valid only for group modes uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled uint8_t priority_groupb; // S12GBADI interrupt priority; 0-15 uint8_t priority_groupc; // S12GCADI interrupt priority; 0-15

} adc_cfg_t;

/***** ADC_CONTROL() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_cmd

{

// Commands for special hardware configurations ADC_CMD_SET_DDA_STATE_CNT, // for Disconnect Detection Assist ADC_CMD_SET_SAMPLE_STATE_CNT,

// Command to configure channels, sensors, and comparator ADC_CMD_CONFIGURE_SCAN, // configure channels and sensors to scan ADC_CMD_EN_COMPARATOR_LEVEL, // enable comparator for threshold compare ADC_CMD_EN_COMPARATOR_WINDOW, // enable comparator for range compare

// Commands to enable hardware triggers or cause software trigger ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers ADC_CMD_SCAN_NOW, // software trigger start scan

// Commands to poll for scan completion and comparator results ADC_CMD_CHECK_SCAN_DONE, // for Normal or GroupA scan ADC_CMD_CHECK_SCAN_DONE_GROUPA, ADC_CMD_CHECK_SCAN_DONE_GROUPB, ADC_CMD_CHECK_SCAN_DONE_GROUPC, ADC_CMD_CHECK_CONDITION_MET, // comparator condition ADC_CMD_CHECK_CONDITION_METB, // comparator condition

// Advanced control commands ADC_CMD_DISABLE_TRIG, // ADCSR.TRGE=0 for sync/async trigs ADC_CMD_DISABLE_INT, // interrupt disable; ADCSR.ADIE=0 ADC_CMD_ENABLE_INT, // interrupt enable; ADCSR.ADIE=1 ADC_CMD_DISABLE_INT_GROUPB, // interrupt disable; ADCSR.GBADIE=0 ADC_CMD_ENABLE_INT_GROUPB, // interrupt enable; ADCSR.GBADIE=1 ADC_CMD_DISABLE_INT_GROUPC, // interrupt disable; ADGCTRGR.GCADIE=0 ADC_CMD_ENABLE_INT_GROUPC, // interrupt enable; ADGCTRGR.GCADIE=1 ADC_CMD_END_ENUM

} adc_cmd_t;

/* for ADC_CMD_SET_DDA_STATE_CNT */

typedef enum e_adc_charge // Disconnection Detection Assist (DDA)

{

ADC_DDA_DISCHARGE = 0x00, ADC_DDA_PRECHARGE = 0x01, ADC_DDA_OFF = 0x02, ADC_DDA_END_ENUM

} adc_charge_t;

#define ADC_DDA_STATE_CNT_MIN (2)

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#define ADC_DDA_STATE_CNT_MAX (15)

typedef struct st_adc_dda

{

adc_charge_t method; uint8_t num_states; // 2-15

} adc_dda_t;

/* for ADC_CMD_SET_SAMPLE_STATE_CNT */

typedef enum e_adc_sst_reg // sample state registers

{

ADC_SST_CH0 = 0, ADC_SST_CH1, ADC_SST_CH2, ADC_SST_CH3, ADC_SST_CH4, ADC_SST_CH5, ADC_SST_CH6, ADC_SST_CH7, // end unit 0 ADC_SST_CH8, ADC_SST_CH9, ADC_SST_CH10, ADC_SST_CH11, ADC_SST_CH12, ADC_SST_CH13, ADC_SST_CH14, ADC_SST_CH15, ADC_SST_CH16_TO_20, ADC_SST_TEMPERATURE, ADC_SST_VOLTAGE, ADC_SST_REG_MAX

} adc_sst_reg_t;

#define ADC_SST_CNT_MIN (5) #define ADC_SST_CNT_MAX (255) #define ADC_SST_CNT_DEFAULT (11)

typedef struct st_adc_time

{

adc_sst_reg_t reg_id; uint8_t num_states; // ch8-20 use the same value

} adc_sst_t;

/* for ADC_CMD_CONFIGURE_SCAN */

// Bitwise OR these masks together for desired channels and sensors // Used for all commands containing a "mask" or "flags" field

#define ADC_MASK_CH0 (1<<0) #define ADC_MASK_CH1 (1<<1) #define ADC_MASK_CH2 (1<<2) #define ADC_MASK_CH3 (1<<3) #define ADC_MASK_CH4 (1<<4) #define ADC_MASK_CH5 (1<<5) #define ADC_MASK_CH6 (1<<6) #define ADC_MASK_CH7 (1<<7) #define ADC_MASK_CH8 (1<<8) #define ADC_MASK_CH9 (1<<9) #define ADC_MASK_CH10 (1<<10) #define ADC_MASK_CH11 (1<<11) #define ADC_MASK_CH12 (1<<12)

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#define ADC_MASK_CH13 (1<<13) #define ADC_MASK_CH14 (1<<14) #define ADC_MASK_CH15 (1<<15) #define ADC_MASK_CH16 (1<<16) #define ADC_MASK_CH17 (1<<17) #define ADC_MASK_CH18 (1<<18) #define ADC_MASK_CH19 (1<<19) #define ADC_MASK_CH20 (1<<20) #define ADC_MASK_TEMP (1<<21) // temperature sensor #define ADC_MASK_VOLT (1<<22) // internal reference voltage sensor

#define ADC_MASK_SENSORS (ADC_MASK_TEMP | ADC_MASK_VOLT) #define ADC_MASK_GROUPB_OFF (0) #define ADC_MASK_GROUPC_OFF (0) #define ADC_MASK_ADD_OFF (0) #define ADC_MASK_SAMPLE_HOLD_OFF (0)

typedef enum e_adc_grpa // action when groupa interrupts groupb

scan

{

ADC_GRPA_PRIORITY_OFF = 0, // groupa ignored;does not interrupt groupb ADC_GRPA_GRPB_GRPC_WAIT_TRIG = 1, ADC_GRPA_GRPB_GRPC_TOP_RESTART_SCAN = 3, ADC_GRPA_GRPB_GRPC_RESTART_TOP_CONT_SCAN = 0x8003, ADC_GRPA_GRPB_GRPC_RESTART_SCAN = 0x4003, ADC_GRPA_GRPB_GRPC_TOP_CONT_SCAN = 0x8001, ADC_GRPA_GRPB_GRPC_RESTART_CONT_SCAN = 0xC003,

} adc_grpa_t;

typedef enum e_adc_diag // Self-Diagnosis Channel

{

ADC_DIAG_OFF = 0x00, ADC_DIAG_0_VOLT = 0x01, ADC_DIAG_HALF_VREFH0 = 0x2, ADC_DIAG_VREFH0 = 0x3, ADC_DIAG_ROTATE_VOLTS = 0x4, ADC_DIAG_END_ENUM

} adc_diag_t;

#define ADC_SST_SH_CNT_MIN (4) // minimum sample&hold states #define ADC_SST_SH_CNT_MAX (255) // maximum sample&hold states #define ADC_SST_SH_CNT_DEFAULT (24) // default sample&hold states

typedef struct st_adc_ch_cfg // bit 0 is ch0; bit 15 is ch15

{

uint32_t scan_mask; // channels/bits 0-15 uint32_t scan_mask_groupb; // valid for group modes uint32_t scan_mask_groupc; // valid for group modes adc_grpa_t priority_groupa; // valid for group modes uint32_t add_mask; // valid if add enabled in Open() adc_diag_t diag_method; // self-diagnosis virtual channel bool anex_enable; // unit1: use external amplifier uint8_t sample_hold_mask; // channels/bits 0-2 uint8_t sample_hold_states; // minimum .4us

} adc_ch_cfg_t;

typedef enum e_adc_comp_cond // Window A/B Complex Conditions

{

ADC_COND_OR = 0x00, ADC_COND_EXOR = 0x01, ADC_COND_AND = 0x02,

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ADC_COND_END_ENUM

} adc_comp_cond_t;

/* Window B Channel select */

#define ADC_COMP_WINB_CH0 (0) #define ADC_COMP_WINB_CH1 (1) #define ADC_COMP_WINB_CH2 (2) #define ADC_COMP_WINB_CH3 (3) #define ADC_COMP_WINB_CH4 (4) #define ADC_COMP_WINB_CH5 (5) #define ADC_COMP_WINB_CH6 (6) #define ADC_COMP_WINB_CH7 (7) #define ADC_COMP_WINB_CH8 (8) #define ADC_COMP_WINB_CH9 (9) #define ADC_COMP_WINB_CH10 (10) #define ADC_COMP_WINB_CH11 (11) #define ADC_COMP_WINB_CH12 (12) #define ADC_COMP_WINB_CH13 (13) #define ADC_COMP_WINB_CH14 (14) #define ADC_COMP_WINB_CH15 (15) #define ADC_COMP_WINB_CH16 (16) #define ADC_COMP_WINB_CH17 (17) #define ADC_COMP_WINB_CH18 (18) #define ADC_COMP_WINB_CH19 (19) #define ADC_COMP_WINB_CH20 (20) #define ADC_COMP_WINB_TEMP (32) #define ADC_COMP_WINB_VOLT (33)

/* Window B Comparison condition select */

#define ADC_COMP_WINB_COND_BELOW (0) #define ADC_COMP_WINB_COND_ABOVE (1)

/* for ADC_CMD_EN_COMPARATOR_LEVEL and ADC_CMD_EN_COMPARATOR_WINDOW */

typedef struct st_adc_cmpwin_cfg // Window A bit-OR ADC_MASK_xxx to

{ // indicate channels/sensors

// Window B ADC_COMP_WINB_xxx to // indicate channels/sensors

uint32_t compare_mask; // channels/sensors to compare uint32_t compare_maskb; // channels/sensors to compareb uint32_t inside_window_mask; // condition met when within range // default=0 met when outside range uint32_t inside_window_maskb;// condition met when within range // default=0 met when outside range uint16_t level_lo; uint16_t level_lob; uint16_t level_hi; uint16_t level_hib; adc_comp_cond_t comp_cond; // window A/B complex conditions setting uint8_t int_priority; // S12CMPAI and S12CMPBI priority level // 1=low 15=hi 0=polled

bool windowa_enable; // comparison window A enable bool windowb_enable; // comparison window B enable

} adc_cmpwin_t;

/***** ADC_READ() ARGUMENT DEFINITIONS *****/

typedef enum e_adc_reg

{

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ADC_REG_CH0 = 0, ADC_REG_CH1 = 1, ADC_REG_CH2 = 2, ADC_REG_CH3 = 3, ADC_REG_CH4 = 4, ADC_REG_CH5 = 5, ADC_REG_CH6 = 6, ADC_REG_CH7 = 7, // last channel unit0 ADC_REG_CH8 = 8, ADC_REG_CH9 = 9, ADC_REG_CH10 = 10, ADC_REG_CH11 = 11, ADC_REG_CH12 = 12, ADC_REG_CH13 = 13, ADC_REG_CH14 = 14, ADC_REG_CH15 = 15, ADC_REG_CH16 = 16, ADC_REG_CH17 = 17, ADC_REG_CH18 = 18, ADC_REG_CH19 = 19, ADC_REG_CH20 = 20, ADC_REG_TEMP, ADC_REG_VOLT, // both units ADC_REG_DBLTRIG, ADC_REG_DBLTRIGA, // loaded when first multi-source trigger was A ADC_REG_DBLTRIGB, // loaded when first multi-source trigger was B ADC_REG_SELF_DIAG, ADC_REG_MAX

} adc_reg_t;

#define ADC_0_REG_ARRAY_MAX (8) #define ADC_1_REG_ARRAY_MAX (21)

/* ADC_READALL() ARGUMENT DEFINITIONS */

typedef struct st_adc_unit0_data

{

uint16_t chan[ADC_0_REG_ARRAY_MAX]; uint16_t dbltrig; uint16_t dbltrigA; uint16_t dbltrigB; uint16_t self_diag;

} adc_unit0_data_t;

typedef struct st_adc_unit1_data

{

uint16_t chan[ADC_1_REG_ARRAY_MAX]; uint16_t temp; uint16_t volt; uint16_t dbltrig; uint16_t dbltrigA; uint16_t dbltrigB; uint16_t self_diag;

} adc_unit1_data_t;

typedef struct st_adc_data

{

adc_unit0_data_t unit0; adc_unit1_data_t unit1;

} adc_data_t;

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2.11 Return Values

These are the different error codes API functions can return. The enum is found in r_s12ad_rx_if.h along with the API function declarations.

typedef enum e_adc_err // ADC API error codes

{

ADC_SUCCESS = 0, ADC_ERR_AD_LOCKED, // Open() call is in progress elsewhere ADC_ERR_AD_NOT_CLOSED, // peripheral still running in another mode ADC_ERR_MISSING_PTR, // missing required pointer argument ADC_ERR_INVALID_ARG, // argument is not valid for parameter ADC_ERR_ILLEGAL_ARG, // argument is illegal for mode ADC_ERR_SCAN_NOT_DONE, // default, Group A, or Group B scan not done ADC_ERR_TRIG_ENABLED, // scan running, cannot configure comparator ADC_ERR_CONDITION_NOT_MET, // no chans/sensors passed comparator condition ADC_ERR_UNKNOWN // unknown hardware error

} adc_err_t;

2.12 Adding a FIT Module to Your Project

This module must be added, in the e² studio, to each project in which it is used.

There are two methods for adding this module: using the FIT plugin, and adding it manually.

When the FIT plugin is used, FIT modules can be added to projects easily, and the include file path can be updated automatically. Accordingly, we recommend using the FIT plugin when adding FIT modules to projects.

Methods for adding FIT modules to projects using the FIT plugin are described in section 3, Adding FIT Modules to e studio Projects Manually, in the “Adding Firmware Integration Technology Modules to Projects (R01AN1723)” application note. See that application note for details.

See section 4, Configuring the FIT Module for the methods for addition FIT modules to projects manually.

When using a FIT module the board support package FIT module (BSP module) must also be added to the project. See the “Board Support Package Module Using Firmware Integration Technology (R01AN1685)” application note for details on method for adding the BSP module.

2

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Function

Description

R_ADC_Open()

Applies power to the A/D peripheral (and TEMPS peripheral on RX210 and RX63x), sets the operational mode, trigger sources, interrupt priority, and configurations common

R_ADC_Control()

Provides commands for enabling channels and sensors, and for runtime operations. R_ADC_Read()

Reads conversion results from a single channel, sensor, double trigger, or self-diagnosis R_ADC_ReadAll()

Reads conversion results from all potential channel sources, enabled or not.

R_ADC_Close()

Ends any scan in progress, disables interrupts, and removes power to the A/D peripheral.

R_ADC_GetVersion()

Returns at runtime the driver version number.

3. API Functions

3.1 Summary

The following functions are included in this design:

to all channels and sensors. Optionally takes a callback function pointer for notifying the user at interrupt level whenever a scan has completed.

These include enabling/disabling trigger sources and interrupts, initiating a software trigger, and checking for scan completion.

register.

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3.2 R_ADC_Open()

This function applies power to the A/D peripheral, sets the operational mode, trigger sources, interrupt priority, and configurations common to all channels and sensors. If interrupt priority is non-zero, the function takes a callback function pointer for notifying the user at interrupt level whenever a scan has completed or comparator condition met. The function initializes the S12AD FIT module. This function must be called before calling any other API functions.

Format

adc_err_t R_ADC_Open(uint8_t unit, adc_mode_t const mode, adc_cfg_t * const p_cfg, void (* const p_callback)(void *p_args));

Parameters

unit

0 or 1. For MCUs with only one unit 0 should be passed (only the RX64M/RX71M/RX65x have 2 units).

mode

Operational mode. See type adc_mode_t in section 2.10 for the MCU being used.

The mode indicates the type of scan to be performed. For ADC_MODE_SS_MULTI_CH_ GROUPED_DBLTRIG_A, only one channel can be in Group A.

p_cfg

Pointer to configuration structure. See type adc_cfg_t in section 2.10 for the MCU being used.

The resolution field uses the adc_res_t enum. Lower resolution results in shorter conversion times (RX64M, RX71M and RX65x).

The .alignment, .clearing, and .conversion fields use the adc_align_t, adc_clear_t, enums. If addition is enabled, the .alignment field is ignored.

The .add_cnt field uses the adc_add_t enum. The number of samples added applies to all channels and sensors (except for Temperature sensor on RX210). An individual channel may opt out of any addition using the Control() function.

The .trigger and .trigger_groupb fields use the adc_trig_t enum for trigger sources.

The .priority and .groupb_priority fields use interrupt priority levels ranging from 1 (lowest) to 15 (highest). If the priority is set to 0, the corresponding interrupt is disabled and the application must poll for the scan to complete (use Control() function).

p_callback

Optional pointer to function called from interrupt when a scan completes

Return Values

ADC_SUCCESS: Successful ADC_ERR_AD_LOCKED: Open() call is in progress elsewhere ADC_ERR_AD_NOT_CLOSED: Peripheral is still running in another mode; Perform R_ADC_Close() first ADC_ERR_INVALID_ARG: mode or element of p_cfg structure has invalid value ADC_ERR_ILLEGAL_ARG: an argument is illegal based upon mode ADC_ERR_MISSING_PTR: p_cfg pointer is FIT_NO_PTR/NULL

Properties

Prototyped in file “r_s12ad_rx_if.h”

Description

Applies power to the A/D peripheral, sets the operational mode, trigger sources, interrupt priority, and configurations common to all channels and sensors. Setting the interrupt priority to 0 indicates that the application will poll until scanning completes (see Control()). With a non-zero interrupt priority (interrupt

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usage), a callback function is required. This function is called by the interrupts whenever a scan has completed with an argument indicating which scan completed.

To set values of parameters used in this function, first clear all members of parameters to 0, and then set values.

Reentrant

No. For MCUs with a single unit this function should only be called once before a call to Close(). For the RX64M/RX71M/RX65x this function may be called once for each unit.

Example (RX110, RX111, RX113)

adc_cfg_t config;

/* Clear all fields of the adc_cfg_t structure */ memset(&config, 0, sizeof(config));

/* INITIALIZE FOR SINGLE SCAN OF TEMPERATURE SENSOR * - use software trigger to start scan; poll for completion * - don't do any summing of conversion values * - keep the data registers aligned right, and clear after reading is off * - use normal speed conversion */ config.trigger = ADC_TRIG_SOFTWARE; config.priority = 0; // denotes polling! config.add_cnt = ADC_ADD_OFF; config.alignment = ADC_ALIGN_RIGHT; config.clearing = ADC_CLEAR_AFTER_READ_OFF; config.conv_speed = ADC_CONVERT_SPEED_NORM;

R_ADC_Open(0, ADC_MODE_SS_TEMPERATURE, &config, FIT_NO_FUNC);

Special Notes (RX Family Common):

The application must complete MPC and PORT initialization prior to calling Open().

Hardware Manual about limitations of using output pins on the same port as analog pins

initialization for an RSKRX111 Rev 1 board:

R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_MPC);

MPC.P40PFS.BYTE = 0x80; // Pin Func Select P40 AN000 PORT4.PDR.BIT.B0 = 0; // set AN pin direction to input (dflt) PORT4.PMR.BIT.B0 = 1; // set AN pin mode to peripheral

MPC.PB0PFS.BIT.PSEL = 0x09; // Pin Func Select PB0 ADTRIG0; SW3 on RSKRX111 PORTB.PDR.BIT.B0 = 0; // set ADTRIG0 pin direction to input (dflt) PORTB.PMR.BIT.B0 = 1; // set ADTRIG0 pin mode to peripheral

R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_MPC);

The application must set the A/D conversion clock (PCKD) prior to calling Open().Refer to User’s Hardware Manual for PCLKB/ADCLK frequency ratios.

If a Continuous mode is selected, it is recommended not to use the S12ADI interrupt. That causes the majority of the processing time to be spent at the interrupt level.

If interrupts are in use, a callback function is required which takes a single argument. This is a pointer to a structure which is cast to a void pointer (provides consistency with other FIT module callback functions). See type adc_mode_t in section 2.10 for the MCU being used.

Refer to the User’s

. The following is a sample

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An example template for a callback function is provided here:

void MyCallback(void *p_args) { adc_cb_args_t *args;

args = (adc_cb_args_t *)p_args;

if (args->event == ADC_EVT_SCAN_COMPLETE) { // Read results here nop(); } else if (args->event == ADC_EVT_GROUPB_SCAN_COMPLETE) { // Read Group B results here nop(); } else if (args->event == ADC_EVT_CONDITION_MET) { // Process chans/sensors indicated in args->compare_flags nop(); } }

Special Notes (RX 63x):

Even if register automatic clearing is enabled for temperature sensor output or internal reference voltage, the A/D conversion result is not cleared. After the R_ADC_Open function is executed, wait at least 10 ms before executing A/D conversion.

Special Notes (RX110/RX111/RX113/RX210/RX130/RX230/RX231/RX65x/RX64M/RX71M):

After the R_ADC_Open function is executed, wait at least 1 µs before executing A/D conversion.

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3.3 R_ADC_Control()

This function provides commands for enabling channels and sensors and for runtime operations. These include enabling/disabling trigger sources and interrupts, initiating a software trigger, and checking for scan completion.

Format

adc_err_t R_ADC_Control(uint8_t unit, adc_cmd_t const cmd, void * const p_cfg);

Parameters

unit

0 or 1. For MCUs with only one unit 0 should be passed (only the RX64M/RX71M/RX65x have 2 units).

cmd

Command to run. See type adc_cmd_t in section 2.10 for the MCU being used.

Some commands require arguments. All other commands should use FIT_NO_PTR/NULL for the p_cfg argument.

p_cfg

Pointer to optional configuration structure. FIT_NO_PTR/NULL for most commands. See type adc_ch_cfg_t in section 2.10 for the MCU being used.

Return Values

ADC_SUCCESS: Successful ADC_ERR_MISSING_PTR: p_cfg pointer is FIT_NO_PTR/NULL when required as an argument ADC_ERR_INVALID_ARG: cmd or element of p_cfg structure has invalid value. ADC_ERR_ILLEGAL_ARG: cmd is illegal based upon mode ADC_ERR_SCAN_NOT_DONE: The requested scan has not completed ADC_ERR_TRIG_ENABLED: Cannot configure comparator because scan still running ADC_ERR_CONDITION_NOT_MET: No channels/sensors met the comparison condition

Properties

Prototyped in file “r_s12ad_rx_if.h”

Description

Provides commands for enabling channels and sensors and for runtime operations. These include enabling/disabling trigger sources and interrupts, initiating a software trigger, and checking for scan completion.

After an Open() call, the following sequence of Control() commands should be issued (MCU dependent):

1) Optionally issue commands for special hardware configuration (ADC_CMD_SET_DDA_STATE_CNT and/or

ADC_CMD_SET_SAMPLE_STATE_CNT, ADC_CMD_USE_VREFL0, ADC_CMD_USE_VREFH0).

2) Issue a command to configure channels, sensors, and comparator

(ADC_CMD_ENABLE_CHANS, ADC_CMD_EN_COMPARATOR_LEVEL, and/or ADC_CMD_EN_COMPARATOR_WINDOW, ADC_CMD_ENABLE_TEMP_SENSOR, ADC_CMD_ENABLE_VOLT_SENSOR).

3) Issue a command to enable hardware triggers or cause a software trigger (ADC_CMD_TRIG_ENABLE or

ADC_CMD_SCAN_NOW).

4) If polling instead of using interrupts, check for completion of scan or comparator match

(ADC_CMD_CHECK_SCAN_DONE, ADC_CMD_CHECK_SCAN_DONE_GROUPA or ADC_CMD_CHECK_SCAN_DONE_GROUPB, ADC_CMD_CHECK_CONDITION_MET).

5) When the scan completes, the converted data is accessed using the Read() function at the application or

interrupt level.

To set values of parameters used in this function, first clear all members of parameters to 0, and then set values.

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Reentrant

Yes, but in general should not be used as such. A valid case for reentrancy would be in group mode with one task performing the ADC_CMD_CHECK_SCAN_DONE_GROUPA and another performing the ADC_CMD_CHECK_SCAN_DONE_GROUPB. Other commands such as enabling/disabling triggers or interrupts would affect operations being performed by another task and reentrancy of this kind should be avoided.

Example 1: Single Channel Polling Unit 0 (RX64M, RX71M, RX65x only)

uint16_t data; adc_cfg_t config; adc_ch_cfg_t ch_cfg; adc_err_t err;

/* OPEN ADC */

/* Clear all fields of the adc_cfg_t structure */ memset(&config, 0, sizeof(config));

/* Open ADC for software trigger, single scan of one channel, and polling */ config.resolution = ADC_RESOLUTION_12_BIT; config.trigger = ADC_TRIG_SOFTWARE; config.priority = 0; // denotes polling config.add_cnt = ADC_ADD_OFF; config.alignment = ADC_ALIGN_RIGHT; config.clearing = ADC_CLEAR_AFTER_READ_OFF; err = R_ADC_Open(0,ADC_MODE_SS_ONE_CH, &config, NULL);

/* ENABLE CHANNELS */

/* Clear all fields of the adc_ch_cfg_t structure */ memset(&ch_cfg, 0, sizeof(ch_cfg));

/* Specify and enable potentiometer channel on RSKRX64M */ ch_cfg.chan_mask = ADC_MASK_CH0; ch_cfg.diag_method = ADC_DIAG_OFF; ch_cfg.anex_enable = false; ch_cfg.sample_hold_mask = 0; err = R_ADC_Control(0, ADC_CMD_ENABLE_CHANS, &ch_cfg);

/* After open, wait 1 us or longer before A/D conversion starts */

/* Repeatedly trigger, poll for completion, and read result */ while(1) { /* CAUSE SOFTWARE TRIGGER */ err = R_ADC_Control(0, ADC_CMD_SCAN_NOW, NULL);

/* WAIT FOR SCAN TO COMPLETE */ while (R_ADC_Control(0,ADC_CMD_CHECK_SCAN_DONE,NULL) == ADC_ERR_SCAN_NOT_DONE) { }

/* READ RESULT */ err = R_ADC_Read(0, ADC_REG_CH0, &data); }

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Example 2: Temperature Sensor Polling and Set Sample State Count Unit 1 (RX64M, RX71M, RX65x)

uint16_t data; adc_cfg_t config; adc_sst_t sst; // sample state adc_ch_cfg_t ch_cfg; adc_err_t adc_err;

/* OPEN ADC */

/* Clear all fields of the adc_cfg_t structure */ memset(&config, 0, sizeof(config));

/* Open ADC for software trigger, single scan temperature sensor, and polling */ config.resolution = ADC_RESOLUTION_10_BIT; config.trigger = ADC_TRIG_SOFTWARE; config.priority = 0; // denotes polling config.add_cnt = ADC_ADD_OFF; config.alignment = ADC_ALIGN_RIGHT; config.clearing = ADC_CLEAR_AFTER_READ_OFF; adc_err = R_ADC_Open(1, ADC_MODE_SS_ONE_CH, &config, NULL);

/* DO SPECIAL HARDWARE CONFIGURATION */

/* Clear all fields of the adc_sst_t structure */ memset(&sst, 0, sizeof(sst));

/* Clear all fields of the adc_ch_cfg_t structure */ memset(&ch_cfg, 0, sizeof(ch_cfg));

/* Set number of sampling states for 4us sample * /* For PCLKD=60MHz, 1 state = 1/60MHz = 16.7ns, 4us/16.7ns = 240 states */ sst.reg_id = ADC_SST_TEMPERATURE; sst.num_states = 240; adc_err = R_ADC_Control(1, ADC_CMD_SET_SAMPLE_STATE_CNT, &sst);

/* CONFIGURE SCAN */ ch_cfg.chan_mask = ADC_MASK_TEMP; ch_cfg.diag_method = ADC_DIAG_OFF; ch_cfg.anex_enable = false; ch_cfg.sample_hold_mask = 0; // not available on unit 1 adc_err = R_ADC_Control(1, ADC_CMD_ENABLE_CHANS, &ch_cfg);

/* After open, wait 1 us or longer before A/D conversion starts */

/* CAUSE SOFTWARE TRIGGER */ adc_err = R_ADC_Control(1, ADC_CMD_SCAN_NOW, NULL);

/* WAIT FOR SCAN TO COMPLETE */ while (R_ADC_Control(1, ADC_CMD_CHECK_SCAN_DONE, NULL) == ADC_ERR_SCAN_NOT_DONE) { }

/* READ RESULT */ adc_err = R_ADC_Read(1, ADC_REG_TEMP, &data);

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Example 3: Grouped Channels with Interrupt Triggers, Double Trigger on Group A, and Averaging (RX64M, RX71M, RX65x)

adc_cfg_t config; adc_ch_cfg_t ch_cfg;

/* INITIALIZE MTU HERE (USED FOR TRIGGER SOURCES) */

/* OPEN ADC */

/* Clear all fields of each structure */ memset(&config, 0, sizeof(config)); memset(&ch_cfg, 0, sizeof(ch_cfg));

/* INITIALIZE ADC FOR GROUP SCANNING WITH DOUBLE TRIGGER * - use synchronous trigger TRGA0N to start Group A scan; int priority 4 * - use synchronous trigger TRG0N to start Group B scan; int priority 5 * - allow each channel to be scanned four times and averaged before continuing * - do not clear registers after reading */ config.resolution = ADC_RESOLUTION_8_BIT; config.trigger = ADC_TRIG_SYNC_TRG0AN; config.priority = 4; config.trigger_groupb = ADC_TRIG_SYNC_TRG0EN; config.priority_groupb= 5; config.add_cnt = ADC_ADD_AVG_4_SAMPLES; config.alignment = ADC_ALIGN_RIGHT; config.clearing = ADC_CLEAR_AFTER_READ_OFF; R_ADC_Open(1, ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A, &config, MyCallback);

/* CONFIGURE SCAN */

/* Can only have 1 channel for double triggering, and is only channel in Group A Have channel 8 as Group A, have 2, 3, and 9 as Group B Perform addition/average on all channels except 9 */ ch_cfg.chan_mask = ADC_MASK_CH8; ch_cfg.chan_mask_groupb = ADC_MASK_CH2 | ADC_MASK_CH3 | ADC_MASK_CH9; ch_cfg.priority_groupa = ADC_GRPA_PRIORITY_OFF; ch_cfg.add_mask = ADC_MASK_CH8 | ADC_MASK_CH2 | ADC_MASK_CH3; ch_cfg.diag_method = ADC_DIAG_OFF; ch_cfg.anex_enable = false; ch_cfg.sample_hold_mask = 0; R_ADC_Control(1, ADC_CMD_ENABLE_CHANS, &ch_cfg);

/* After open, wait 1 us or longer before A/D conversion starts */

/* ENABLE TRIGGERS */ R_ADC_Control(1, ADC_CMD_ENABLE_TRIG, NULL);

/* INTERRUPT OCCURS UPON SCAN COMPLETION */

/* The callback is called twice from interrupt level- once after each * group scan completes. The order depends upon the trigger order. */ void MyCallback(void *p_args) { adc_cb_args_t *args; uint16_t dbltrg,data2,data3,data8,data9;

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args = (adc_cb_args_t *)p_args;

/* READ RESULTS */

if (args->event == ADC_EVT_SCAN_COMPLETE) { /* From S12ADIO interrupt, Group A scan complete, read registers */ R_ADC_Read(1, ADC_REG_CH8, &data8); R_ADC_Read(1, ADC_REG_DBLTRIG, &dbltrg); } else if (args->event == ADC_EVT_SCAN_COMPLETE_GROUPB) { /* From GBADI interrupt, Group B scan complete, read registers */ R_ADC_Read(1, ADC_REG_CH2, &data2); R_ADC_Read(1, ADC_REG_CH3, &data3); R_ADC_Read(1, ADC_REG_CH9, &data9); }

/* process data, or set flag for application level to do so */ }

Example 4: 3 Grouped Channels with Interrupt Triggers (RX65x)

adc_cfg_t config; adc_ch_cfg_t ch_cfg;

/* INITIALIZE MTU HERE (USED FOR TRIGGER SOURCES) */

/* OPEN ADC */

/* Clear all fields of each structure */ memset(&config, 0, sizeof(config)); memset(&ch_cfg, 0, sizeof(ch_cfg));

/* INITIALIZE ADC FOR GROUP SCANNING WITH DOUBLE TRIGGER * - use synchronous trigger TRGA0N to start Group A scan; int priority 4 * - use synchronous trigger TRGA1N to start Group B scan; int priority 5 * - use synchronous trigger TRGA2N to start Group C scan; int priority 6 * - allow each channel to be scanned four times and averaged before continuing * - do not clear registers after reading */ config.resolution = ADC_RESOLUTION_8_BIT; config.trigger = ADC_TRIG_SYNC_TRG0AN; config.priority = 4; config.trigger_groupb = ADC_TRIG_SYNC_TRG1AN; config.priority_groupb= 5; config.trigger_groupc = ADC_TRIG_SYNC_TRG2AN; config.priority_groupc= 6; config.add_cnt = ADC_ADD_OFF; config.alignment = ADC_ALIGN_RIGHT; config.clearing = ADC_CLEAR_AFTER_READ_OFF; R_ADC_Open(0, ADC_MODE_SS_MULTI_CH_GROUPED_GROUPC, &config, MyCallback);

/* CONFIGURE SCAN */

/* Clear all fields of the adc_ch_cfg_t structure */ memset(&ch_cfg, 0, sizeof(ch_cfg));

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/* Have channel 1 and 2 as Group A, have 3 and 4 as Group B, have 5 and 6 as Group C Perform addition/average on all channels except 9 */ ch_cfg.scan_mask = ADC_MASK_CH1 | ADC_MASK_CH2; ch_cfg.scan_mask_groupb = ADC_MASK_CH3 | ADC_MASK_CH4; ch_cfg.scan_mask_groupc = ADC_MASK_CH5 | ADC_MASK_CH6; ch_cfg.priority_groupa = ADC_GRPA_PRIORITY_OFF; ch_cfg.add_mask = 0; ch_cfg.diag_method = ADC_DIAG_OFF; ch_cfg.anex_enable = false; ch_cfg.sample_hold_mask = 0; R_ADC_Control(0, ADC_CMD_CONFIGURE_SCAN, &ch_cfg);

/* After open, wait 1 us or longer before A/D conversion starts */

/* ENABLE TRIGGERS */ R_ADC_Control(0, ADC_CMD_ENABLE_TRIG, NULL);

/* INTERRUPT OCCURS UPON SCAN COMPLETION */

/* The callback is called twice from interrupt level- once after each * group scan completes. The order depends upon the trigger order. */ void MyCallback(void *p_args) { adc_cb_args_t *args; uint16_t data1,data2,data3,data4,data5,data6;

args = (adc_cb_args_t *)p_args;

/* READ RESULTS */

if (args->event == ADC_EVT_SCAN_COMPLETE) { /* From S12ADIO interrupt, Group A scan complete, read registers */ R_ADC_Read(0, ADC_REG_CH1, &data1); R_ADC_Read(0, ADC_REG_CH2, &data2); } else if (args->event == ADC_EVT_SCAN_COMPLETE_GROUPB) { /* From GBADI interrupt, Group B scan complete, read registers */ R_ADC_Read(0, ADC_REG_CH3, &data3); R_ADC_Read(0, ADC_REG_CH4, &data4); } else if (args->event == ADC_EVT_SCAN_COMPLETE_GROUPC) { /* From GCADI interrupt, Group C scan complete, read registers */ R_ADC_Read(0, ADC_REG_CH5, &data5); R_ADC_Read(0, ADC_REG_CH6, &data6);

} /* process data, or set flag for application level to do so */ }

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Example 5: Multiple Channels with Interrupt Trigger and Comparator Checking (RX64M, RX71M)

adc_cfg_t config; adc_ch_cfg_t ch_cfg; adc_cmpwin_t cmpwin;

/* INITIALIZE MTU HERE (USED FOR TRIGGER SOURCES) */

/* OPEN UNIT 0 */

/* Clear all fields of the adc_cfg_t structure */ memset(&config, 0, sizeof(config));

config.resolution = ADC_RESOLUTION_12_BIT; config.trigger = ADC_TRIG_SYNC_TRG0AN; config.priority = 4; config.add_cnt = ADC_ADD_OFF; config.alignment = ADC_ALIGN_RIGHT; config.clearing = ADC_CLEAR_AFTER_READ_OFF; R_ADC_Open(0, ADC_MODE_SS_MULTI_CH, &config, MyCallback);

/* CONFIGURE SCAN OF CHANNELS 3-5 */

/* Clear all fields of the adc_ch_cfg_t structure */ memset(&ch_cfg, 0, sizeof(ch_cfg));

ch_cfg.chan_mask = ADC_MASK_CH3 | ADC_MASK_CH4 | ADC_MASK_CH5; ch_cfg.diag_method = ADC_DIAG_OFF; ch_cfg.anex_enable = false; ch_cfg.sample_hold_mask = 0; R_ADC_Control(0, ADC_CMD_ENABLE_CHANS, &ch_cfg);

/* HAVE COMPARATOR CHECK ON CHANNELS 3-4 FOR DROPPING BELOW 1.65V */

/* Clear all fields of the adc_cmpwin_t structure */ memset(&cmpwin, 0, sizeof(cmpwin));

cmpwin.compare_mask = ADC_MASK_CH3 | ADC_MASK_CH4; cmpwin.inside_window_mask = 0; // condition met when below level cmpwin.level_lo = 0x7FF; // 12-bit 3.3V=0xFFF, 1.65V=0x7FF cmpwin.int_priority = 3; R_ADC_Control(0, ADC_CMD_EN_COMPARATOR_LEVEL, &cmpwin);

/* ENABLE TRIGGERS */ R_ADC_Control(0, ADC_CMD_ENABLE_TRIG, NULL);

/* INTERRUPT OCCURS UPON SCAN COMPLETION */

:

/* Callback called from interrupt level: */

void MyCallback(void *p_args)

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{ adc_cb_args_t *args; uint16_t data3,data4,data5;

args = (adc_cb_args_t *)p_args;

/* READ RESULTS */

if (args->event == ADC_EVT_SCAN_COMPLETE) { R_ADC_Read(0, ADC_REG_CH3, &data3); R_ADC_Read(0, ADC_REG_CH4, &data4); R_ADC_Read(0, ADC_REG_CH5, &data5); }

if (args->event == ADC_EVT_CONDITION_MET) { if (args->compare_flags & ADC_MASK_CH3) { // processing when channel 3 voltage is too low } else { // processing when channel 4 voltage is too low } } }

Example 6: Multiple Channels with Interrupt Trigger and 2 Comparator Checking (RX65x)

adc_cfg_t config; adc_ch_cfg_t ch_cfg; adc_cmpwin_t cmpwin;

/* Clear all fields of each structure */ memset(&config, 0, sizeof(config)); memset(&ch_cfg, 0, sizeof(ch_cfg)); memset(&cmpwin, 0, sizeof(cmpwin));

/* INITIALIZE MTU HERE (USED FOR TRIGGER SOURCES) */

/* OPEN UNIT 0 */

config.resolution = ADC_RESOLUTION_12_BIT; config.trigger = ADC_TRIG_SYNC_TRG0AN; config.priority = 4; config.add_cnt = ADC_ADD_OFF; config.alignment = ADC_ALIGN_RIGHT; config.clearing = ADC_CLEAR_AFTER_READ_OFF; R_ADC_Open(0, ADC_MODE_SS_MULTI_CH, &config, MyCallback);

/* CONFIGURE SCAN OF CHANNELS 3-4 */

ch_cfg.scan_mask = ADC_MASK_CH3 | ADC_MASK_CH4 | ADC_MASK_CH5; ch_cfg.diag_method = ADC_DIAG_OFF; ch_cfg.anex_enable = false; ch_cfg.sample_hold_mask = 0; R_ADC_Control(0, ADC_CMD_CONFIGURE_SCAN, &ch_cfg);

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/* HAVE COMPARATOR CHECK ON CHANNELS 3-4 FOR DROPPING BELOW 1.65V */

cmpwin.compare_mask = ADC_MASK_CH3 | ADC_MASK_CH4; cmpwin.compare_maskb = ADC_COMP_WINB_CH5; cmpwin.above_level_mask = 0; // Condition met when below level cmpwin.above_level_maskb = ADC_COMP_WINB_COND_BELOW; cmpwin.level_lo = 0x7FF; // 12-bit 3.3V=0xFFF, 1.65V=0x7FF cmpwin.level_lob = 0x7FF; // 12-bit 3.3V=0xFFF, 1.65V=0x7FF cmpwin.int_priority = 3; cmpwin.windowa_enable = true; cmpwin.windowb_enable = true; R_ADC_Control(0, ADC_CMD_EN_COMPARATOR_LEVEL, &cmpwin);

/* After open, wait 1 us or longer before A/D conversion starts */

/* ENABLE TRIGGERS */ R_ADC_Control(0, ADC_CMD_ENABLE_TRIG, NULL);

/* INTERRUPT OCCURS UPON SCAN COMPLETION */

:

/* Callback called from interrupt level: */

void MyCallback(void *p_args) { adc_cb_args_t *args; uint16_t data3,data4,data5;

args = (adc_cb_args_t *)p_args;

/* READ RESULTS */

if (args->event == ADC_EVT_SCAN_COMPLETE) { R_ADC_Read(0, ADC_REG_CH3, &data3); R_ADC_Read(0, ADC_REG_CH4, &data4); R_ADC_Read(0, ADC_REG_CH5, &data5); }

if (args->event == ADC_EVT_CONDITION_MET) { if (args->compare_flags & ADC_MASK_CH3) { // processing when channel 3 voltage is too low } else { // processing when channel 4 voltage is too low } }

if (args->event == ADC_EVT_CONDITION_METB) { // processing when channel 5 voltage is too low } }

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A/D Conversion Channel Settings

Commands for the R_ADC_Control Function

A/D conversion

start trigger

Waits completion of A/D

conversion

ADC_CMD_CHECK_SCAN_ DONE

Other than software trigger

ADC_CMD_CHECK_SCAN_ DONE_GROUPA

Other than software trigger

ADC_CMD_CHECK_SCAN_ DONE_GROUPA

ADC_CMD_CHECK_SCAN_

DONE_GROUPC

Special Notes (RX Family Common):

When the A/D conversion start (ADST) bit is 1, settings such as mode must not be changed using this function. However, the conversion status or the comparison result can be obtained. When switching channels used for A/D conversion or settings, call the R_ADC_Close() function once and then call the R_ADC_Open() function again to start.

When waiting completion of A/D conversion using the R_ADC_Control function, use the following commands.

Mode

Interrupt Starts A/D conversion

Software trigger  ADC_CMD_SCAN_NOW

Single scan

Continuous scan

Group scan

Disabled ADC_CMD_ENABLE_TRIG

Software trigger Disabled ADC_CMD_SCAN_NOW

Disabled ADC_CMD_ENABLE_TRIG

Other than software trigger

Disabled ADC_CMD_ENABLE_TRIG

DONE_GROUPA ADC_CMD_CHECK_SCAN_

DONE_GROUPB

(1)

(2)

ADC_CMD_CHECK_SCAN_

(3)

Note 1. In RX63x, ADC_CMD_CHECK_SCAN_DONE_GROUPA cannot be used. Please check the

interrupt request flag directly for completion of A/D conversion.

Note 2. Use ADC_CMD_CHECK_SCAN_DONE_GROUPB when waiting completion of A/D conversion for

Group B.

Note 3. ADC_CMD_CHECK_SCAN_DONE_GROUPC can be used only with RX65x.

When A/D conversion interrupts are enabled, the R_ADC_Control function cannot be used to wait completion of A/D conversion except when using single scan mode with software trigger. Use the callback function for the A/D conversion interrupt to wait completion of A/D conversion.

Special Notes (RX64M/RX71M/RX65x):

This function does not support operation under Group A Priority Control.

Channels and sensors can be combined in the same scan.

ELC is only for S12ADI, not S12GBADI or S12CMPI. (RX64M/RX71M) ELC is only for S12ADI, not GBADI, GCADI, S12CMPAI or S12CMPBI. (RX65x)

Channel masks are checked against the pin package specified by the equate BSP_CFG_MCU_PART_PACKAGE in r_bsp_config.h for available A/D channels.

The application should wait 30us after configuring the scan, before enabling the trigger for Temperature Sensor for best results.

If Group A Priority is selected such that Group B operates in continuous scan mode, it is recommended not to use the S12GBADI interrupt (RX64M/RX71M) and GBADI interrupt (RX65x). That causes the majority of the processing time to be spent at the interrupt level.

Enabling the comparator should be done prior to enabling the triggers.

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Dbl

Trig

Group

Scan

SelfDiag

Add/

Avg

ANEX

Sample

&Hold

Priority

GroupA

Sensors

Comparator

DDA

Double Trigger

Group Scan

X

*S

Self-

Diagnosis

Add/Avg

X ANEX

X X X

X

Sample

&Hold

Priority

GroupA

Sensors

X X

X

Comparator

X X

Disconnect

Assist

Some features may not be used with others. The following table illustrates this.

X *B X X

X X X X X

*B *S *A

*A

Detection

X - Combination may not be used. For example, ANEX may not be used with group scan modes, Self-Diagnosis, sensors or Disconnect Detection Assist. *A - Sample and Hold channels must be in Group A. *B - Sample and Hold channels must be in Group B or Group C. *S - Sample and Hold channels cannot be split across groups.

X X X

Special Notes (RX130/RX230/RX231):

This function does not support following features.

• Compare function window B

• Compare function window A/B composite condition setting

Special Notes (RX130/RX230/RX231/RX64M/RX71M/RX65x):

When using the comparison, configure the comparison after the channel configuration.

This function does not support following feature.

• Group A priority control setting

Special Notes (RX63x):

Only AN008 to AN020 can be used for setting the number of sampling states. AN000 to AN007 are fixed to 20 states regardless of the setting.

Special Notes (RX110/RX111/RX113):

For temperature sensor and internal reference voltage, the number of sampling states must be set to 5 µs or greater.

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3.4 R_ADC_Read()

This function reads conversion results from a single channel, sensor, double trigger, or self-diagnosis register.

Format

adc_err_t R_ADC_Read(uint8_t unit, adc_reg_t const reg_id, uint16_t * const p_data);

Parameters

unit

0 or 1. For MCUs with only one unit 0 should be passed (only the RX64M/RX71M/RX65x have 2 units).

reg_id

Id for the register to read. See type adc_reg_t in section 2.10 for the MCU being used.

p_data

Pointer to variable to load value into.

Return Values

ADC_SUCCESS: Success ADC_ERR_INVALID_ARG: unit or reg_id contains an invalid value. ADC_ERR_MISSING _PTR: p_data is FIT_NO_PTR/NULL

Properties

Prototyped in file “r_s12ad_rx_if.h”

Description

Reads conversion results from a single channel, sensor, double trigger, or self-diagnosis register.

Reentrant

Yes.

Example

uint16_t data; : /* Read channel 0 on unit 0 */ R_ADC_Read(0, ADC_CH0_REG, &data); // conversion value placed in “data”

Special Notes (RX110/RX111/RX113):

For temperature sensor output and internal reference voltage, discard the first A/D conversion result after the open, and use the second and the subsequent A/D conversion results.

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3.5 R_ADC_ReadAll()

This function reads conversion results from all potential sources, enabled or not.

Format

adc_err_t R_ADC_ReadAll(adc_data_t * const p_data);

Parameters

p_data Pointer to structure to load register values into.

An example structure for the register values is as follows:

typedef struct st_adc_data { uint16_t chan[ADC_REG_ARRAY_MAX]; // chans/indexes used depends upon MCU uint16_t temp;

uint16_t volt;

uint16_t dbltrig;

uint16_t self_diag; } adc_data_t;

Return Values

ADC_SUCCESS: Success ADC_ERR_MISSING_PTR: p_data is FIT_NO_PTR/NULL

Properties

Prototyped in file “r_s12ad_rx_if.h”

Description

Reads conversion results from all potential sources, enabled or not. This function is convenient for getting a snapshot of all values at any point in time.

See type adc_data_t in section 2.10 for the MCU being used

Reentrant

Yes.

Example

adc_data_t data; : /* Read all channel registers available on hardware */ R_ADC_ReadAll(&data); // “data” loaded with all conversion reg values

Special Notes:

None.

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3.6 R_ADC_Close()

This function ends any scan in progress, disables interrupts, and removes power to the A/D peripheral.

Format

adc_err_t R_ADC_Close(uint8_t unit);

Parameters

unit

0 or 1. For MCUs with only one unit 0 should be passed (only the RX64M/RX71M/RX65x have 2 units).

Return Values

ADC_ERR_INVALID_ARG: Unit not 0 or 1

Properties

Prototyped in file “r_s12ad_rx_if.h”

Description

Ends any scan in progress, disables interrupts, and removes power to the A/D peripheral. Allows call to Open() to be performed again. This is necessary when changing scan configurations.

Reentrant

This may only be called once per unit after an Open() is performed.

Example

: err = R_ADC_Open(1, ADC_MODE_SS_MULTI_CH_GROUPED, &config, MyCallback); : R_ADC_Close(1);

Special Notes:

This function will abort any scan that may be in progress.

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3.7 R_ADC_GetVersion()

This function returns the driver version number at runtime.

Format

uint32_t R_ADC_GetVersion(void)

Parameters

None

Return Values

Version number.

Properties

Prototyped in file “r_s12ad_rx_if.h”

Description

Returns the version of this module. The version number is encoded such that the top 2 bytes are the major version number and the bottom 2 bytes are the minor version number.

Reentrant

Yes

Example

uint32_t version; : version = R_ADC_GetVersion();

Special Notes:

This function is in-lined using the “#pragma inline” directive

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4. Pin Setting

Regarding the pin setting used for this module, it is strictly recommended to perform the pin setting after calling the function R_ADC_Open.

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5. Demo Projects

Demo projects are complete stand-alone programs. They include function main() that utilizes the module and its dependent modules (e.g. r_bsp). The standard naming convention for the demo project is <module>_demo_<board> where <module> is the peripheral acronym (e.g. s12ad, cmt, sci) and the <board> is the standard RSK (e.g. rskrx113). For example, s12ad FIT module demo project for RSKRX113 will be named as s12ad_demo_rskrx113. Similarly the exported .zip file will be <module>_demo_<board>.zip. For the same example, the zipped export/import file will be named as s12ad_demo_rskrx113.zip.

5.1 s12ad_int_demo_rskrx113

This demo uses periodic interrupts from MTU0 to trigger the ADC module to scan the potentiometer on the board. Each time a scan completes, the program reads the converted value at interrupt level in a callback function and places it into a global variable called “data”. This variable should be added to the Expressions window and made into a Real-time Watch (double-click to make real-time). As the program runs, change the potentiometer position and observe the corresponding changes in the variable.

5.2 s12ad_poll_demo_rskrx113

This demo scans the potentiometer on the board via a software trigger in an endless loop. Each time a scan completes, the program reads the converted value at the application level and places it into a global variable called “data”. This variable should be added to the Expressions window and made into a Real-time Watch (double-click to make real-time). As the program runs, change the potentiometer position and observe the corresponding changes in the variable.

5.3 s12ad_poll_demo_rskrx130

This demo scans the potentiometer on the board via a software trigger in an endless loop. Each time a scan completes, the program reads the converted value at the application level and places it into a global variable called “data”. This variable should be added to the Expressions window and made into a Real-time Watch (double-click to make real-time). As the program runs, change the potentiometer position and observe the corresponding changes in the variable.

5.4 s12ad_demo_rskrx64m

This is a simple demo of the RX64M A/D Converter (S12AD) for the RSKRX64M starter kit (FIT module "r_s12ad_rx"). The demo uses the Multi-Function Timer Pulse Unit (MTU3a) to periodically trigger the ADC module to perform conversion on channel 0 which is connected to the on-board potentiometer. Each time a scan completes, the program reads the converted value at interrupt level in a callback function and places it into a global variable called “g_data”. This variable should be added to the Expressions window and made into a Real-time Watch (double-click to make real-time). As the program runs, change the potentiometer position and observe the corresponding changes in the variable.

5.5 s12ad_demo_rskrx71m

This is a demo of the RX71M A/D Converter (S12AD) for the RSKRX71M starter kit (FIT module "r_s12ad_rx"). The demo uses the Multi-Function Timer Pulse Unit 3 (MTU3a) to periodically trigger the ADC module to perform conversion on channel 0 which is connected to the on-board potentiometer. Each time a scan completes, the program reads the converted value at interrupt level in a callback function and places it into a global variable called “g_data”. This variable should be added to the Expressions window and made into a Real-time Watch (double-click to make realtime). As the program runs, change the potentiometer position and observe the corresponding changes in the variable.

5.6 s12ad_demo_rskrx231

This is a demo of the RX231 A/D Converter (S12ADE) for the RSKRX231 starter kit (FIT module “r_s12ad_rx”). The demo uses the Multi-Function Timer Pulse Unit 2 (MTU2a) to periodically trigger the ADC module to perform a conversion on channel 0, which is connected to the on-board potentiometer. Each time a scan completes, the program reads the converted value at interrupt level in a callback function and places it into a global variable called "g_data". This variable should be added to the Expressions window and made into a Real-time Watch. To do that, add it to the Expressions window then right-click it. From the drop-down menu click on "Real-time Refresh". Right click again and select "Real-time Refresh Interval" and set the refresh value to 200 ms. As the program runs, change the potentiometer position and observe the corresponding changes in the variable.

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RX Family ADC Module Using Firmware Integration Technology

5.7 Adding a Demo to a Workspace

Demo projects are found in the FITDemos subdirectory of the e2 studio installation directory. To add a demo project to a workspace, select File>Import>General>Existing Projects into Workspace, then click “Next”. From the Import Projects dialog, choose the “Select archive file” radio button. “Browse” to the demo subdirectory, select the desired demo zip file, then click “Finish”.

R01AN1666EJ0220 Rev. 2.20 Page 73 of 74 Dec 01, 2016

RX Family ADC Module Using Firmware Integration Technology

Related Technical Updates

This module reflects the content of the following technical updates.

• TN-RX*-A124A/E

• TN-RX*-A117A/E

Website and Support

Renesas Electronics Website

http://www.renesas.com/

Inquiries

http://www.renesas.com/inquiry

All trademarks and registered trademarks are the property of their respective owners.

R01AN1666EJ0220 Rev. 2.20 Page 74 of 74 Dec 01, 2016

Description

Page

Summary

1.00

Nov.15.2013

—

First edition issued

1.20

Apr.21.2014

1,3

Added mention of support for RX110/63x.

Disconnect Detection Assist (DDA)

1.30

Jun.05.2014

—

Fixed bug in code that eliminated channels 8-15.

1.40

Nov.07.2014

—

Added RX113 support.

2.00

Mar.30.2015

—

Added RX64M/RX71M support. Modified interface to include a

2.10

Jun.15.2015

—

Added RX231 support. Added an RX231 demo.

2.11

Mar.01.2016

—

Added RX130 and RX230 support.

2.20

Dec.01.2016

—

Added RX65N support.

5

2.9 Code Size:

53 to 64

3.2 R_ADC_Open(), 3.3 R_ADC_Control():

55

3.2 R_ADC_Open(): Added the Special Notes (RX 63x) and 56

3.3 R_ADC_Control(): Added the sentence to clear all

65

3.3 R_ADC_Control(): Added and modified the following items:

67

3.4 R_ADC_Read(): Added Special Notes (RX110/RX111/ 71

4. Pin Setting: Added.

72

5.3 s12ad_poll_demo_rskrx130: Added.

Program

Fixed typo on comment lines.

Revised the initialization in the R_ADC_Open function.

Revision Record

Rev.

Date

11,12

Added interface for RX210 Sample&Hold, Self-Diagnosis, and

unit number.

- Changed code sizes for RX111.

- Added code sizes for RX65N.

Added the following code in each Example section.

- Code to clear all fields of each structure.

- Comment regarding a wait time before A/D conversion starts after open.

Special Notes (RX110/RX111/RX113/RX210/RX130/RX230/ RX231/RX65x).

members of parameters in the Description.

- Special Notes (RX Family Common): Added four special notes.

- Special Notes (RX64M/RX71M/RX65x): Added a special note regarding operation under Group A Priority Control and modified the table.

- Special Notes (RX63x) and Special Notes (RX110/RX111/ RX113): Added.

RX113).

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Target Device:

RX64M/RX71M/RX230/RX231

Description:

There is an error in checking the range of the arguments. Thus, when the trigger source de-selection state is set as the trigger for group B, the R_ADC_Open function returns an error.

Condition:

The following combination of arguments for the R_ADC_Open function is set. Second parameter (mode) ADC_MODE_SS_MULTI_CH_GROUPED or

ADC_MODE_SS_MULTI_CH_GROUPED_DBLTRIG_A Third parameter (p_cfg->trigger_groupb) ADC_TRIG_NONE_GROUPB.

Measure:

Modified the code for checking the arguments of the adc_check_open_cfg function.

Use Rev. 2.20 or later version of the S12AD FIT module.

Target Device:

RX230/RX231

Description:

The compare window A operation enable bit is not set to be enabled. Thus comparison for levels and windows does not work.

Condition:

Comparison does not work under any condition.

Measure:

Modified the code to enable the CMPAE bit using the adc_control function when the compare function is selected.

Target Device:

RX64M/RX71M/RX230/RX231

Description:

After Disconnection Detection Assist (DDA) is set, the register is not reset. Thus the Disconnection Detection Assist (DDA) setting remains and this causes a combination error when setting self-diagnosis. Then the R_ADC_Control function returns an error.

Condition:

After Disconnection Detection Assist (DDA) is set, the FIT module is closed and re-opened, and then self-diagnosis is set.

Measure:

Added processing to reset all S12AD related registers in the adc_open function and deleted the check during Disconnection Detection Assist (DDA) operation from the check with self-diagnosis set in the adc_check_scan_config function.

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Deleted unnecessary definitions.

Deleted unnecessary members.

Modified the following procedures according to the User’s

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Modified the code to set the delay time properly when converting the temperature sensor in RX64M and RX71M.

Modified processing for checking an invalid channel when using the extended analog input in RX64M and RX71M.

Target Device:

RX230/RX231

Description:

The numbers of arguments (enum value) for an index of the register table do not match and the indexed value becomes out of range. Then the R_ADC_Read function cannot obtain the result of self-diagnosis.

Condition:

Occurs under any conditions.

Measure:

Deleted unnecessary definitions from the enum (abc_reg_t) for an index of the register table.

Target Device:

RX210

Description:

A parameter needed for compiling was deleted in rev. 2.10, thus a build error occurs when compiling with RX210.

Condition:

A project with Rev.2.10 or Rev.2.11 of the S12AD FIT module is built.

Measure: Added ADC_CFG_PGA_GAIN to r_s12ad_rx_config.h.

Manual: Hardware:

- Procedure for when A/D conversion stops

- Procedure for when entering low power consumption modes

- Procedure to rewrite the ADHSC bit

Target Device:

RX64M/RX71M/RX230/RX231

Description:

Since the operator is incorrect in processing to avoid the upper limit voltage becoming less than the lower limit voltage, the upper and lower limit voltages cannot be set to the same value in the comparison setting.

Condition:

The comparison (window comparison) is used.

Measure:

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

Unify the name of definitions that have same meanings but have

ADC_TRIG_SYNC_TRG4ABN1 → ADC_TRIG_SYNC_TPUTRG0AN

different names among MCU Groups.

RX63x ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRG0AN_0 → ADC_TRIG_SYNC_TRG0AN ADC_TRIG_SYNC_TRG0BN_0 → ADC_TRIG_SYNC_TRG0BN ADC_TRIG_SYNC_TRGAN_0 → ADC_TRIG_SYNC_TRGAN ADC_TRIG_SYNC_TRGAN_1 → ADC_TRIG_SYNC_TPUTRGAN ADC_TRIG_SYNC_TRG0EN_0 → ADC_TRIG_SYNC_TRG0EN ADC_TRIG_SYNC_TRG0FN_0 → ADC_TRIG_SYNC_TRG0FN ADC_TRIG_SYNC_TRG4ABN_0 →

ADC_TRIG_SYNC_TRG4ABN_1 → ADC_TRIG_SYNC_TPUTRG0AN ADC_TRIG_SYNC_TMRTRG0AN_0 →

ADC_TRIG_SYNC_TMRTRG0AN_1 →

RX110 ADC_CONVERT_SPEED_HI → ADC_CONVERT_SPEED_HIGH ADC_TRIG_NONE_GROUPB → Deleted ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG

RX111 ADC_CONVERT_SPEED_HI → ADC_CONVERT_SPEED_HIGH ADC_TRIG_NONE_GROUPB → Deleted ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRGAN →

ADC_TRIG_SYNC_TRG4ABN →

RX113 ADC_CONVERT_SPEED_HI → ADC_CONVERT_SPEED_HIGH ADC_TRIG_NONE_GROUPB → Deleted ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRGAN →

ADC_TRIG_SYNC_TRG4ABN →

RX210 ADC_TRIG_NONE_GROUPB → Deleted ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRGAN →

ADC_TRIG_SYNC_TRG4ABN →

ADC_TRIG_PLACEHOLDER → ADC_TRIG_SYNC_TEMPS ADC_TRIG_SYNC_TRGAN1 → ADC_TRIG_SYNC_TPUTRGAN

ADC_TRIG_SYNC_TRG4AN_OR_TRG4BN

ADC_TRIG_SYNC_TMRTRG0AN

ADC_TRIG_SYNC_TMRTRG2AN

ADC_TRIG_SYNC_TRGAN_OR_UDF4N

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN

ADC_TRIG_SYNC_TRGAN_OR_UDF4N

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN

ADC_TRIG_SYNC_TRGAN_OR_UDF4N

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

RX64M

ADC_TRIG_SYNC_ELCTRG → ADC_TRIG_SYNC_ELC

ADC_CMD_CONFIGURE_SCAN → ADC_CMD_ENABLE_CHANS ADC_TRIG_NONE_GROUPB → ADC_TRIG_NONE ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRGA0N → ADC_TRIG_SYNC_TRG0AN ADC_TRIG_SYNC_TRGA1N → ADC_TRIG_SYNC_TRG1AN ADC_TRIG_SYNC_TRGA2N → ADC_TRIG_SYNC_TRG2AN ADC_TRIG_SYNC_TRGA3N → ADC_TRIG_SYNC_TRG3AN ADC_TRIG_SYNC_TRGA4N →

ADC_TRIG_SYNC_TRG4AN_OR_UDF4N ADC_TRIG_SYNC_TRGA6N → ADC_TRIG_SYNC_TRG6AN ADC_TRIG_SYNC_TRGA7N →

ADC_TRIG_SYNC_TRG7AN_OR_UDF7N ADC_TRIG_SYNC_TRG0N → ADC_TRIG_SYNC_TRG0EN ADC_TRIG_SYNC_TRG4ABN →

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN

ADC_TRIG_SYNC_TRG7ABN →

ADC_TRIG_SYNC_TRG7AN_AND_TRG7BN ADC_TRIG_SYNC_GTADTRA0N → ADC_TRIG_SYNC_GTADTR0AN ADC_TRIG_SYNC_GTADTRB0N → ADC_TRIG_SYNC_GTADTR0BN ADC_TRIG_SYNC_GTADTRA1N → ADC_TRIG_SYNC_GTADTR1AN ADC_TRIG_SYNC_GTADTRB1N → ADC_TRIG_SYNC_GTADTR1BN ADC_TRIG_SYNC_GTADTRA2N → ADC_TRIG_SYNC_GTADTR2AN ADC_TRIG_SYNC_GTADTRB2N → ADC_TRIG_SYNC_GTADTR2BN ADC_TRIG_SYNC_GTADTRA3N → ADC_TRIG_SYNC_GTADTR3AN ADC_TRIG_SYNC_GTADTRB3N → ADC_TRIG_SYNC_GTADTR3BN ADC_TRIG_SYNC_GTADTRA0N_OR_GTADTRB0N →

ADC_TRIG_SYNC_GTADTR0AN_OR_GTADTR0BN

ADC_TRIG_SYNC_GTADTRA1N_OR_GTADTRB1N →

ADC_TRIG_SYNC_GTADTR1AN_OR_GTADTR1BN

ADC_TRIG_SYNC_GTADTRA2N_OR_GTADTRB2N →

ADC_TRIG_SYNC_GTADTR2AN_OR_GTADTR2BN

ADC_TRIG_SYNC_GTADTRA3N_OR_GTADTRB3N →

ADC_TRIG_SYNC_GTADTR3AN_OR_GTADTR3BN

ADC_TRIG_SYNC_TMTRG0AN_0 →

ADC_TRIG_SYNC_TMRTRG0AN

ADC_TRIG_SYNC_TMTRG0AN_1 →

ADC_TRIG_SYNC_TMRTRG2AN ADC_TRIG_SYNC_TPTRGAN → ADC_TRIG_SYNC_TPUTRGAN ADC_TRIG_SYNC_TPTRG0AN → ADC_TRIG_SYNC_TPUTRG0AN

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

RX71M

ADC_CMD_CONFIGURE_SCAN → ADC_CMD_ENABLE_CHANS ADC_TRIG_NONE_GROUPB → ADC_TRIG_NONE ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRGA0N → ADC_TRIG_SYNC_TRG0AN ADC_TRIG_SYNC_TRGA1N → ADC_TRIG_SYNC_TRG1AN ADC_TRIG_SYNC_TRGA2N → ADC_TRIG_SYNC_TRG2AN ADC_TRIG_SYNC_TRGA3N → ADC_TRIG_SYNC_TRG3AN ADC_TRIG_SYNC_TRGA4N → ADC_TRIG_SYNC_TRG4AN_OR_UDF4N ADC_TRIG_SYNC_TRGA6N → ADC_TRIG_SYNC_TRG6AN ADC_TRIG_SYNC_TRGA7N →

ADC_TRIG_SYNC_TRG7AN_OR_UDF7N ADC_TRIG_SYNC_TRG0N → ADC_TRIG_SYNC_TRG0EN ADC_TRIG_SYNC_TRG4ABN →

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN

ADC_TRIG_SYNC_TRG7ABN →

ADC_TRIG_SYNC_TRG7AN_AND_TRG7BN ADC_TRIG_SYNC_GTADTRA0N → ADC_TRIG_SYNC_GTADTR0AN ADC_TRIG_SYNC_GTADTRB0N → ADC_TRIG_SYNC_GTADTR0BN ADC_TRIG_SYNC_GTADTRA1N → ADC_TRIG_SYNC_GTADTR1AN ADC_TRIG_SYNC_GTADTRB1N → ADC_TRIG_SYNC_GTADTR1BN ADC_TRIG_SYNC_GTADTRA2N → ADC_TRIG_SYNC_GTADTR2AN ADC_TRIG_SYNC_GTADTRB2N → ADC_TRIG_SYNC_GTADTR2BN ADC_TRIG_SYNC_GTADTRA3N → ADC_TRIG_SYNC_GTADTR3AN ADC_TRIG_SYNC_GTADTRB3N → ADC_TRIG_SYNC_GTADTR3BN ADC_TRIG_SYNC_GTADTRA0N_OR_GTADTRB0N →

ADC_TRIG_SYNC_GTADTR0AN_OR_GTADTR0BN

ADC_TRIG_SYNC_GTADTRA1N_OR_GTADTRB1N →

ADC_TRIG_SYNC_GTADTR1AN_OR_GTADTR1BN

ADC_TRIG_SYNC_GTADTRA2N_OR_GTADTRB2N →

ADC_TRIG_SYNC_GTADTR2AN_OR_GTADTR2BN

ADC_TRIG_SYNC_GTADTRA3N_OR_GTADTRB3N →

ADC_TRIG_SYNC_GTADTR3AN_OR_GTADTR3BN

ADC_TRIG_SYNC_TMTRG0AN_0 →

ADC_TRIG_SYNC_TMRTRG0AN

ADC_TRIG_SYNC_TMTRG0AN_1 →

ADC_TRIG_SYNC_TMRTRG2AN ADC_TRIG_SYNC_TPTRGAN → ADC_TRIG_SYNC_TPUTRGAN ADC_TRIG_SYNC_TPTRG0AN → ADC_TRIG_SYNC_TPUTRG0AN ADC_TRIG_SYNC_ELCTRG → ADC_TRIG_SYNC_ELC

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

RX130

Unify the member names in the adc_ch_cfg_t structure that are different

Deleted processing for checking the range of enum value to simplify the

ADC_TRIG_NONE_GROUPB → ADC_TRIG_NONE ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRGAN →

ADC_TRIG_SYNC_TRGAN_OR_UDF4N

ADC_TRIG_SYNC_TRG4ABN →

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN

ADC_TRIG_SYNC_ELCTRG0 → ADC_TRIG_SYNC_ELC

RX230 ADC_TRIG_NONE_GROUPB → ADC_TRIG_NONE ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRGAN →

ADC_TRIG_SYNC_TRGAN_OR_UDF4N

ADC_TRIG_SYNC_TRG4ABN →

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN

ADC_TRIG_SYNC_ELCTRG0N_OR_ELCTRG1N →

ADC_TRIG_SYNC_ELC ADC_TRIG_SYNC_TRGAN1 → ADC_TRIG_SYNC_TPUTRGAN ADC_TRIG_SYNC_TRG4ABN1 → ADC_TRIG_SYNC_TPUTRG0AN

RX231 ADC_TRIG_NONE_GROUPB → ADC_TRIG_NONE ADC_TRIG_ASYNC_ADTRG0 → ADC_TRIG_ASYNC_ADTRG ADC_TRIG_SYNC_TRGAN →

ADC_TRIG_SYNC_TRGAN_OR_UDF4N

ADC_TRIG_SYNC_TRG4ABN →

ADC_TRIG_SYNC_TRG4AN_AND_TRG4BN

ADC_TRIG_SYNC_ELCTRG0N_OR_ELCTRG1N →

ADC_TRIG_SYNC_ELC ADC_TRIG_SYNC_TRGAN1 → ADC_TRIG_SYNC_TPUTRGAN ADC_TRIG_SYNC_TRG4ABN1 → ADC_TRIG_SYNC_TPUTRG0AN

among MCU Groups.

RX64M/RX71M scan_mask → chan_mask scan_mask_groupb → chan_mask_groupb

processing. * See the warning on compiling to check the enum range.

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Added the temperature sensor (temp) and internal reference

R_ADC_ReadAll function over all MCU groups.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Modified the code to reset the ADGSPCR register when setting a

RX64M, and RX71M.

Changed the structure for arguments of comparison in

comparison.

Target Device:

RX210

Description:

In the processing for checking arguments, ADC_TRIG_SYNC_TEMPS is checked with “trigger” instead of "trigger_groupb". Then the R_ADC_Open function returns an error even if the ADC_TRIG_SYNC_TEMPS setting is valid.

Condition:

ADC_TRIG_SYNC_TEMPS is set as the trigger of A/D conversion.

Measure:

Deleted the code for checking ADC_TRIG_SYNC_TEMPS in the adc_open function.

* “trigger_groupb” is ignored in modes other than group scan mode. In group scan mode, if ADC_TRIG_SYNC_TEMPS is set to trigger_groupb, an error is returned. Thus the checking process for ADC_TRIG_SYNC_TEMPS is unnecessary.

voltage (volt) to the adc_data_t structure in the RX63x, RX110, RX111, RX113, and RX210 Groups to unify the behavior of the

Target Device:

RX64M/RX71M

Description:

In the processing for checking arguments, ADC_TRIG_NONE is checked with "trigger". Then the R_ADC_Open function returns an error even if the ADC_TRIG_NONE setting is valid.

Condition:

ADC_TRIG_NONE is set as the trigger of A/D conversion.

Measure:

Deleted the code for checking ADC_TRIG_NONE in the adc_open function since ADC_TRIG_NONE can be set to the TRSA register as well as the TRSB register.

mode other than group scan mode in the RX130, RX230, RX231,

RX130/RX230/RX231 to similar to the structure in RX65N. The adc_cmplvl_t structure has been discarded, accordingly. Please use the adc_cmpwin_t structure when using the level

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Modified the code to use the interface provided in the BSP

is used in RX64M and RX71M.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Target Device:

RX130/RX230/RX231

Description:

No processing is provided to set the compare window operation enable bit to "disabled". Thus once the compare function is enabled, only the way to disable it is reopening. However, please note that reopening does not work for RX230 and RX231.

Condition:

Always occurs when the compare function is used.

Measure:

Added "windowa_enable" to the structure for arguments of the compare function. Now the compare window operation enable bit can be set to "enabled" or "disabled" according to true/false setting of "windowa_enable", i.e. same processing as RX65N.

Target Device:

RX64M/RX71M

Description:

No processing is provided to set the WCMPE bit to “0” (level comparison). Thus once window comparison is enabled, the comparison cannot be set to level comparison.

Condition:

The comparison is reset to level comparison after setting to window comparison.

Measure:

Modified the code to properly set the WCMPE bit according to the selection of window or level comparison.

(R_BSP_InterruptControl function) for specifying the interrupt enable bit and interrupt priority level when the compare interrupt

Target Device:

RX64M/RX71M

Description:

No processing is provided to set the compare interrupt enable bit to “disabled”. Thus once the comparison is enabled, the compare interrupt cannot be disabled.

Condition:

The interrupt priority level is set to "1" or greater while the comparison is enabled.

Measure:

Modified the code to disable the compare interrupt when executing the adc_close function and to disable group interrupts if no FIT module uses group interrupts.

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Deleted unnecessary processing to reset the register when

register is already reset to "0".

Replaced the RX113 provided wait function (adc_delay) with the

RX113 provided wait function (adc_delay) has been deleted.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Fixed the following issue:

Target Device:

RX130/RX230/RX231/RX64M/RX71M

Description:

An unspecified callback function (NULL) is executed and improper interrupt occurs.

Condition:

After the R_ADC_Open function is executed with interrupts disabled, the interrupt priority level of the compare interrupt is set to “1” or greater.

Measure:

Modified the code to check the callback function before executing it. If the callback function is NULL, the interrupt handler is exited without performing any processing.

enabling an output of the temperature sensor in RX210 since the

BSP provided wait function (R_BSP_SoftwareDelay). * The

Target Device:

RX210

Description:

An unnecessary error determination is performed. Because of this, when specifying a setting with the channel-dedicated sample-and-hold function, the R_ADC_Control function returns an error.

Condition:

In group scan mode, A/D conversion channels for group A and group B are set with the channel-dedicated sample-and-hold function.

Measure:

Deleted an unnecessary error determination as no limitation regarding it is described in the User’s Manual: Hardware.

Target Device:

RX210

Description:

Since an error determination processing is not provided, if selfdiagnosis is enabled in a mode where self-diagnosis does not work, the R_ADC_Control function cannot return an error.

Condition:

Self-diagnosis is enabled when double trigger mode is selected in single scan mode or group scan mode.

Measure:

Added the error determination processing for when selfdiagnosis is enabled. Use Rev. 2.20 or later version of the S12AD FIT module.

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

Target Device:

RX130/RX230/RX231

Description:

An unnecessary error determination is performed. Because of this, when setting the disconnection detection assist function after self-diagnosis is enabled, the R_ADC_Control function returns an error.

Condition:

Discharge or precharge is selected for the disconnection detection assist function after self-diagnosis is enabled.

Measure:

Deleted unnecessary determination processing described in the Description above.

Target Device:

RX63x

Description:

The definition to determine a valid channel is incorrect and channel 20 cannot be selected.

Condition:

A chip with 177, 176, 145, or 144 pins is selected.

Measure:

Modified the definition to determine a valid channel.

Target Device:

RX631

Description:

There is no definition to determine a valid channel and this causes a compiling error.

Condition:

A chip with 64 pins or 48 pins is selected.

Measure:

Added the definition to determine a valid channel.

Target Device:

RX64M/RX71M/RX65x

Description:

When obtaining the compare match result, the compare channel is cleared. Then, the subsequent compare match is not performed.

Condition:

When any of the unit 1 channel from channel 16 to channel 20 is specified as the compare channel, the condition is met and the compare match interrupt occurs, or the R_ADC_Control function is executed by setting ADC_CMD_CHECK_CONDITION_MET.

Measure:

Modified the register that was initialized when obtaining the compare match result.

Rev.

Date

Description

Page

Summary

2.20

Dec.01.2016

Program

Fixed the following issue:

In RX63x and RX210, the TEMPS register is now modified only when the temperature sensor module is enabled.

Added the definition "ADC_CONVERT_SPEED_DEFAULT" for

value as "ADC_CONVERT_SPEED_NORM".

Fixed the following issue:

Use Rev. 2.20 or later version of the S12AD FIT module.

In RX64M, RX71M, RX65x, RX130, RX230, and RX231, some

Target Device:

RX64M/RX71M/RX65x/RX130/RX230/RX231

Description:

When enabling self-diagnosis under a prohibited setting condition, the operation ends normally.

Condition:

Self-diagnosis is enabled in double trigger mode with single scan mode selected.

Measure:

Modified processing for checking the error condition when selfdiagnosis is enabled.

Use Rev. 2.20 or later version of the S12AD FIT module.

conversion speed of A/D conversion in RX110, RX111, and RX113. "ADC_CONVERT_SPEED_DEFAULT" has the same

Target Device:

RX110

Description:

An error occurs when attempting to set the minimum value for the number of sampling states.

Condition:

An error occurs whenever the number of sampling states can be set.

Measure:

Modified the definition of the minimum value for the number of sampling states.

function declarations differed from prototypes. These function declarations now correspond to the prototypes.

1. Handling of Unused Pins

General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products

The following usage notes are applicable to all Microprocessing unit and Microcontroller unit products from Renesas. For detailed usage notes on the products covered by this document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products.

Handle unused pins in accordance with the directions given under Handling of Unused Pins in the manual.

 The input pins of CMOS products are generally in the high-impedance state. In operation with

an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible. Unused pins should be handled as described under Handling of Unused Pins in the manual.

2. Processing at Power-on

The state of the product is undefined at the moment when power is supplied.

 The states of internal circuits in the LSI are indeterminate and the states of register settings and

3. Prohibition of Access to Reserved Addresses

4. Clock Signals

5. Differences between Products

pins are undefined at the moment when power is supplied. In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed. In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified.

Access to reserved addresses is prohibited.

 The reserved addresses are provided for the possible future expansion of functions. Do not

access these addresses; the correct operation of LSI is not guaranteed if they are accessed.

After applying a reset, only release the reset line after the operating clock signal has become stable. When switching the clock signal during program execution, wait until the target clock signal has stabilized.

 When the clock signal is generated with an external resonator (or from an external oscillator)

during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Moreover, when switching to a clock signal produced with an external resonator (or by an external oscillator) while program execution is in progress, wait until the target clock signal is stable.

Before changing from one product to another, i.e. to a product with a different part number, confirm that the change will not lead to problems.

 The characteristics of Microprocessing unit or Microcontroller unit products in the same group

but having a different part number may differ in terms of the internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values, operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system-evaluation test for the given product.

Notice

1. Descriptions of circuits, software and other relat ed information in this document are provided only to illus trate the operation of semiconductor products and application examples. You are fully responsible for

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(Note 2) "Renesas Elect ronics product(s)" means any product dev eloped or manufactured by or f or Renesas Electronics.

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Colophon 5.0

Notice

Renesas RX110, RX113, RX111, RX230, RX231 Application Note

Specifications and Main Features

Frequently Asked Questions

User Manual

1. Overview

2. API Information

2.1 Hardware Requirements

2.2 Hardware Resource Requirements

2.2.1 S12ADa/S12ADb/S12ADC/S12ADE/S12ADFa

2.2.2 GPIO

2.3 Software Requirements

2.4 Limitations

2.5 Supported Toolchains

2.6 Header Files

2.7 Integer Types

2.8 Configuration Overview

2.9 Code Size

2.10 API Data Structures

2.10.1 MCU Common Interface Types (r_s12ad_rx_if.h)

2.10.2 RX110 Interface Types ( r_s12ad_rx110_if.h )

2.10.3 RX111 Interface Types ( r_s12ad_rx111_if.h )

2.10.4 RX113 Interface Types (r_s12ad_rx113_if.h)

2.10.5 RX130 Interface Types (r_s12ad_rx130_if.h)

2.10.6 RX210 Interface Types (r_s12ad_rx210_if.h)

2.10.7 RX230 Interface Types (r_s12ad_rx230_if.h)

2.10.8 RX231 Interface Types (r_s12ad_rx231_if.h)

2.10.9 RX63x Interface Types (r_s12ad_rx63x_if.h)

2.10.10 RX64M, RX71M Interface Types ( r_s12ad_rx64m_if.h, r_s12ad_rx71m_if.h )

2.10.11 RX65x Interface Types ( r_s12ad_rx65x_if.h )

2.11 Return Values

2.12 Adding a FIT Module to Your Project

3. API Functions

3.1 Summary

3.2 R_ADC_Open()

3.3 R_ADC_Control()

3.4 R_ADC_Read()

3.5 R_ADC_ReadAll()

3.6 R_ADC_Close()

3.7 R_ADC_GetVersion()

4. Pin Setting

5. Demo Projects

5.1 s12ad_int_demo_rskrx113

5.2 s12ad_poll_demo_rskrx113

5.3 s12ad_poll_demo_rskrx130

5.4 s12ad_demo_rskrx64m

5.5 s12ad_demo_rskrx71m

5.6 s12ad_demo_rskrx231

5.7 Adding a Demo to a Workspace

Related Technical Updates

Website and Support

Revision Record

General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products

Notice