Renesas RTK79210**B00000BE, RZ/A2M User Manual

Rev.1.00 Oct. 2018

All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Electronics Corp. website

(http://www.renesas.com).

32

RZ/A2M SUB Board

RTK79210XXB00000BE

User's Manual

Renesas Microprocessor RZ Family / RZ/A Series

User’s Manual

32

www.renesas.com

Notice

on of

1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operati semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and i nformation i n the desi gn of your produc t or syste m. Renesa s Electr onics discla ims any and al l liabilit y for any loss es and damages incurred by you or third parti es arising from the use of these circuits, software, or infor ma tion.

2. Renesas Elec tronics hereby expressly disclai ms any warranties against and liabi lity for infringeme nt or any other claims involving patents, copyrights, or other intellectual prop erty rights of third part ies, by or arising from the use of Renesas Electronics pr oducts or technical information described in this document, including but not limited to, the product data, drawings, charts, programs, algorithms, and application examples.

3. No license, expr ess, impli ed or otherwi se, is gra nted hereb y under an y patents , copyright s or other intell ectual prop erty rights of Renesas Electronics or others.

4. You shall not alter , modify, copy, or revers e engineer any Renes as Electr onics product , whether in whole or in part. Renesas Electronics disclaims any and all liability for any losses or damages incurred by you or third parties arising from such alteration, modification, copying or reverse engineering.

5. Renesas Electroni cs products are cla ssified accordi ng to the following two qua lity grades: “Sta ndard” and “High Quali ty”. The intended applications for each Renesas Electronics product depends on the product’s quality grade, a s indicated below. “Standard”: Computers; office equipment; communications equipment; test and measurement equi pment; audio and visual equipment;

home electronic appliances; machine tools; personal electronic eq uipment; industria l robots; etc.

“High Quality”: Transportation equipment (automobiles, trains, ships, etc.); traffic control (traffic lights); large-scale communication

equipment; key financial terminal systems; safety control equipment; etc. Unless expressl y designated a s a high reli abilit y product or a product for ha rsh environ ments in a Renes as Elec tronics data sheet or ot her Renesas Electr onic s docum ent, Ren esa s El ectr onic s pr oduc ts a re not i ntended or a uthor i z ed for us e in produc t s or systems tha t may pose a direct threat to huma n life or bodily injury (ar tificial life supp ort devices or systems; s urgical implantations ; etc.), or may cause ser ious property damage (s pace system; unders ea repeaters ; nuclear power cont rol systems; a ircraft control systems; key pla nt systems; milit ary equipment; etc. ). Renesa s El ectroni cs dis claims a ny and al l liab ilit y for any damages or los ses i ncurred b y you or any thi rd parties arising from the use of any Renes as Electronics product that is inconsistent with any Renesa s Electronics data sheet, us er’s manual or other Renesas Electronics document.

6. When using Renesas Elect roni cs product s, r efer to t he lates t product informa tion ( data sheet s, user ’s manu als, applica tion not es, “Genera l Notes for Handling a nd Using Semic onductor Devices ” in the relia bility handbook, etc.), and ens ure that usage c onditions are w ithin the ranges specified by Renesas Electronics with respect to maximum ratings, operating power supply voltage range, heat dissipation characterist ics, insta llation, etc. Renesa s Electr onics dis claims any and a ll liabi lity for any ma lfunct ions, fa ilure or acc ident aris ing out of the use of Renesas Electronics products outside of such specified ranges.

7. Although Renesa s Electroni cs endeavors to imp rove the qual ity and relia bility of Renes as Electroni cs products, semiconductor products have specific cha racteristics, such as the occurrenc e of failure at a certain rate and malf unctions under certain use conditi ons. Unless designated as a high reliability product or a product for harsh environments in a Renesas Electronics data sheet or other Renesas Electronics document, Renesa s Elect ronics produc ts are not s ubject t o radiation res istance des ign. You are r esponsib le for implement ing safety measures to gua rd aga ins t the pos sibi lity of b odil y injur y, injur y or da mage c aus ed by fir e, a nd/or d anger t o the p ublic in the e vent of a failure or malf unction of Renesas Elec tronics pr oducts, s uch as safety design for ha rdware a nd software, including b ut not limited t o redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the e valuat ion of mic roc omputer s oft ware a lone is very dif fi cult and imp ract ical, you are res pons ibl e for eval uat ing the s afet y of the final products or systems manufactured by you.

8. Please contact a Renesas El ectronics sa les office f or details as to environmenta l matters such as the en vironmental compatibility of each Renesas Elec tronic s produc t. Y ou are r esp onsibl e for c aref ully and s uff icient ly inves ti gati ng appl icab le laws and r egulat ions that regula te the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive, and using Renesas Electronics products in compl iance with all these applicab le laws and regul ations. Renesa s Electr onics disclai ms any and all liab ility for damages or losses occurring as a result of your noncompliance wit h applicable laws and regulations.

9. Renesas Electr oni cs pr oduc ts and t echnol ogi es s ha ll not be us ed f or or incorp or ated i nt o any pr oduc ts or s ystems whos e manuf act ur e, us e, or sale is pr ohibited under a ny applica ble domestic or foreign laws or regulati ons. You shall comply with an y applicabl e export contr ol laws and regulations promulgated and administered by the governments of any countries asserting jurisdiction over the parties or transactions.

10. It is the respons ibility of the buyer or distributor of Renesas Electronics products, or any other party who distr ibutes, disposes of, or otherwise sell s or tr ansf er s the p r oduct to a thi rd pa r ty, t o noti f y such t hir d p ar ty in a dvanc e of the c ont ent s a nd condi t ions s et f orth i n t his document.

11. This document sha ll not be repri nted, rep roduced or dup licated i n any form, in whole or in part, wit hout prior wr itten consent of Renesa s Electronics.

12. Please contact a Renesas Electronics sales of fi ce if you have any questions regar ding the information contained in t his document or Renesas Electronics products.

(Note 1) “Renesas Elect ronics” as used in t his document m eans Renesas Electronics Corporation a nd also incl udes its dir ectly or indirect ly

controlled subsidiaries.

(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.

(Rev.4.0-1 November 2017)

General Preca ut ions in the Handling of Microprocessing Unit and Microcontroller Unit Products

The following usage notes are applicab le to all Microprocessing unit and Microcontroller unit products from Renesas. For detailed usage notes on the products covered by thi s document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products.

1. Handling of Unused Pins Handle unused pins in accordance with the directions given under Handling of Unused Pins in the

manual.  The input pins of CMOS products are generally in the high-impedance state. In operation with an

unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible. Unused pins should be handled as described under Handling of Unused Pins in the manual.

2. Processing at Power-on The state of the produc t is undef in ed at the moment when power is supplied.  The states of internal circuits in the LSI are indeterminate and the states of register settings and

pins are undefined at the moment when power is supplied. In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed. In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified.

3. Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited.  The reserved addresses are provided for the possible future expansion of functions. Do not access

these addresses; the correct operation of LSI is not guaranteed if they are accessed.

4. Clock Signals After applying a reset, only release the reset line after the operating clock signal has become stable.

When switching the clock signal during program execution, wait until the target clock signal has stabilized.

 When the clock signal is generated with an external resonator (or from an external oscillator)

during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Moreover, when switching to a clock signal produced with an external resonator (or by an external oscillator) while program execution is in progress, wait until the target clock signal is stable.

5. Differences between Products Before changing from one product to another, i.e. to a product with a different part number, confirm

that the change will not lead to problems.  The characteristics of Microprocessing unit or Microcontroller unit products in the same group but

having a different part number may differ in terms of the internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values, operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system-evaluation test for the given product.

WEEE Directive

Renesas development tools and products are directly covered by the European Union's Waste Electrical and Electronic Equipment, (WEEE), Directive 2002/96/EC. As a result, this equipment, including all accessories, must not be disposed of as household waste but through your locally recognised recycling or disposal schemes. As part of our commitment to environmental responsibility Renesas also offers to take back the equipment and has implemented a Tools Product Recycling Program for customers in Europe. This allows you to return equipment to Renesas for disposal through our approved Producer Compliance Scheme. To register for the program, click here "http://www.renesas.com/weee".

How to use this manual

1. Purpose and Target Readers

This manual is designed to provide the user with an understanding of the functions and operating specifications of this SUB board. This manual is intended for all users of this SUB board. A basic knowledge of electric circuits, logical circuits, and MCUs is necessary in order to use this manual.

The manual comprises an overview of the product, functional specifications, and operating specifications.

Before using this SUB board, thoroughly understand the notes provided in the text of each section in this manual.

The revision history summarizes the locations of revisions and additions. It does not list all revisions. Refer to the text of the manual for details.

The following document applies to the RZ/A2M SUB board RTK79210XXB00000BE.

Document Type

Description

Document Title

Document No.

User manual

Description of functional specifications (mounted devices, memory map, electrical characteristics, etc.) and operating specifications (connectors, switches, etc.)

RZ/A2M SUB Board RTK79210XXB00000BE User's Manual

This user’s manual

The following documents apply to the RZ/A2M group. Make sure to refer to the latest versions of these documents. The newest versions of the documents listed may be obtained from the Renesas Electronics Web site.

document Type

Description

Document Title

Document No.

Application note

Application examples, reference programs, etc.

Available from Renesas Electronics Web site.

RENESAS TECHNICAL UPDATE

Prompt reports on product specifications, documents, etc.

2. Abbreviations

Abbreviation

Full Form

ACIA

Asynchronous Communications Interface Adapter

bps

bits per second

CRC

Cyclic Redundancy Check

DMA

Direct Memory Access

DMAC

Direct Memory Access Controller

GSM

Global System for Mobile Communications

Hi-Z

High Impedance

IEBus

Inter Equipment Bus

I/O

Input/Output

IrDA

Infrared Data Association

LSB

Least Significant Bit

MSB

Most Significant Bit

NC

Non-Connect

PLL

Phase Locked Loop

PWM

Pulse Width Modulation

SFR

Special Function Register

SIM

Subscriber Identity Module

UART

Universal Asynchronous Receiver/Transmitter

VCO

Voltage Controlled Oscillator

All trademarks and registered trademarks are the property of their respective owners.

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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2018.10.11

1. Overview

1.1 Overview

The RTK79210XXB00000BE is a SUB board for use with the RZ/A2M CPU board. In combination with the RZ/A2M CPU board RTK7921053C00000BE, RZ/A2M functionality and performance can be evaluated, and application software can be developed and evaluated in advance. The RTK79210XXB00000BE has the following features.

● The following external memory is included.

➢ SDRAM: 64 MBytes ×1 (16-bit bus connection) ➢ EEPROM: 16KBytes × 1

● Includes 50-Pin ML connector for evaluating input/output of digital image signal.

● Includes 1.25 mm pitch connector for evaluating LVDS image output (20-pin x 1, 6-pin x1)

● Includes 26-Pin MIL connector for CMOS camera connection.

● Audio CODEC included for advanced development of audio systems.

● LAN connector included to allow for development and evaluation of Ethernet-compatible software.

● RZ/A2M peripheral feature interface, SD card slot, serial port (USB Micro-B) connector, and USB connector

included as standard components.

● USB connector, series A receptacle, and Mini-B receptacle included (cannot be used simultaneously).

● DRP testing 40-pin MIL connector included.

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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1.2 Configuration

Figure 1.1 shows an example of system configuration using RTK79210XXB00000BE.

Figure 1.1 RTK79210XXB00000BE System Configuration Example

NAND

U32

ON

1 2 3 4 5 6 7 8 9 10

LVDS

CN14

Backlight

CN16

LANUSB

mic

headphones

USB serial SD card

VDC6

CMOS camera

DRP

RZ/A2M CPU board

RTK7921053C00000BE *

RZ/A2M

RZ/A2M SUB board

RTK79210XXB00000BE

USB power supply (Mini-B only) Max.500mA

ICE

Debugger

Host computer

*

DC 5V output

AC adapter

*

Mini-B

Type-A

*: Users need to prepare these separately.

Mounted on the reverse side of the board.

*

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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1.3 Features

Table 1.1 shows an overview of RTK79210XXB00000BE specifications.

Table 1.1 Features of RTK79210XXB00000BE

No.

item

details

1

Memory

• SDRAM: 64 MBytes ×1

‐ ISSI S42S16320F-7TL

• EEPROM: 16 KBytes ×1

‐ Renesas R1EX24128ASAS0A

• NAND flash memory: 128 MBytes ×1 is possible to mount on the board pattern.

‐ Cypress S34ML01G100TFI000

2

Connector

• CPU board connector (204-pin): 1

• DRP connector (40-pin): 1

• Audio input/output mini jack (3,5 ϕ): 2

• Serial port connector (USB Micro-B): 1

• LAN connector (RJ-45): 2

• SD card slot: 1

• USB Series A receptacle: 1

• USB Mini-B receptacle: 1

• CMOS camera connector: 1

• RZ/A2M VDC6 digital image signal input/output MIL connector (50-pin): 1

• RZ/A2M LVDS digital image signal output connector (20-pin): 1

• RZ/A2M LVDS back light connector (6-pin): 1

• DC power jack: 1

3

Switch

• Power switch: 1

• User switch: 2 (NMI, IRQ0)

• Key input switch: 2

• DIP switch: 1 (I/F settings)

4

Outer dimensions/layered configuration

• Dimensions: 105 x 148mm

• Implementation: 4 level dual surface, board thickness: 1.6mm

• Circuit board configuration: Single board

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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1.4 Outside View

Figure 1.2 shows the outside view of RTK79210XXB00000BE.

Figure 1.2 RTK79210XXB00000BE Outside View

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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1.5 Block Diagram

Figure 1.3 RTK79210XXB00000BE block diagram.

Figure 1.3 Block Diagram of RTK79210XXB00000BE

Audio

CODEC

(WM8978)

RZ/A2M

(324BGA)

BSC

SDRAM

SPIBSC

VDC6

SD card slot

3.3V only

microSD card

slot

4

Memory type Bootable Not used

RMII:4

UDI

RESET

DV0 Input

LCD0 Output

(MIL 50)

CMOS Input

(MIL 26)

SCIFA

ADC

24

90O

RL78/G1C

4

JTAG

(E1)

Micro USB

Push SW×2

CEU

16

ETHERC

100O

RSPI

SSIF-2

VBUS

Power Switch

USB

Type-A

USB

Type-C

FLCTL

CoreSight 20

PHY

RJ-45

4

HMIF

8

SDHI1

USB1

EN0

CC logic

16

NAND

8

RIICx EEPROM

NMI IRQ0

INTC

RJ-45

MIC / HP

LVDS

LVDS Output

(FFC 20/6)

100O

90O

CPU board SUB board

CSI-2

MIPI Input

(FFC 15)

100O

GPIO

ch0

INTC

ch0 ch1

SDHI

ch0 ch1

ch4

VBUS0

ch2

RIIC

ch3

GPIO

OC0

VBUS

Power Switch

EN1 OC1

USB

Mini-B

VBUS1

DRP

HyperMCP

Serial Flash

ch6

DRP

(MIL 40)

32

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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1.6 Layout of Components

Figure 1.4 - Figure 1.5 show the layout of RTK79210XXB00000BE main components.

Figure 1.4 RTK79210XXB00000BE Layout of Components (C Side Top View)

X1: Audio Oscillator (11.2896MHz)

X5: VDC6 oscillator (40MHz)

X6: CMOS camera oscillator (not equipped)

X3: USB serial exchange IC crystal oscillator

(12MHz)

U21: Audio CODEC

U23: USB serial exchange IC

U31: NAND flash memory（Not used）

U30: SDRAM

U32: EEPROM

CN1: CPU board connector

CN2: DRP connector

CN3: Mic in pin jack

CN5: Serial port connector (USB Micro-B)

CN8, CN9: LAN connector (RJ-45)

CN13: USB Mini-B receptacle

CN14: LVDS connector

CN15: Digital image signal

Input/output connector

CN16: LVDS back light connector

CN17: CMOS camera connector

CN18: DC power source jack

SW6: DIP switch for I/F settings

SW1: Power source switch

SW2: NMI Switch

SW3: IRQ0 switch

SW4: Key input switch

SW5: Key input switch

J1: E1 connector (not equipped)

CN4: Line out pin jack

J2: GND connector

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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Figure 1.5 RTK79210XXB00000BE Layout of Components (S Side Top View)

X4: Ethernet PHY oscillator (50MHz)

U27, U28: Ethernet PHY

CN10: SD card slot

CN12: USB serial A receptacle

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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Table 1.2 - Table 1.3 list the main components mounted on the RTK79210XXB00000BE.

Table 1.2 Main Components on RTK79210XXB00000BE (1) IC

Component

Number

Component Name

Type (Manufacturer)

Recommended Optional

Components

U21 Audio CODEC

WM8978CGEFL/V (Cirrus)

U23 USB serial converter IC

R5F10JBCANA#U0 (Renesas)

U27, U28

Ethernet PHY

RTL8201FL-VB-CG (Realtek)

U30 SDRAM

IS42S16320F-7TL (ISSI)

U31 NAND flash memory

Not used

S34ML01G100TFI000 (Cypress)

U32 EEPROM

R1EX24128ASAS0A (Renesas)

X1 Audio oscillator

SG-8002DC_11.2896MHz_PCB (EPSON)

11.2896MHz

X3 USB serial converter IC crystal oscillator

CX2520DB12000D0PPSC1 (Kyocera)

12MHz

X4

Ethernet PHY oscillator

KC2016K50.0000C1GE00 (Kyocera)

50MHz

X5

VDC6 oscillator

SG-8002DC_40MHz_PCB (EPSON)

40MHz X6 CMOS camera oscillator

Not used

SG-8002DC (EPSON)

Table 1.3 Main Components mounted on RTK79210XXB00000BE (2) Connector

Component

Number

Component Name

Type (Manufacturer)

Recommended Optional

Components

CN1 CPU board connector (SODIMM 204-pin)

2013297-1 (TE) CN2 DRP connector

HIF3FC-40PA-2.54DSA (71) (HRS)

CN3 Mic in pin jack

STX-3500-3NTR (Kycon)

CN4 Line out pin jack

STX-3500-3NTR (Kycon)

CN5 Serial port connector

ZX62-B-5PA (33) (HRS)

USB Micro-B

CN8, CN9

LAN connector (RJ-45)

J3011G21DNL (Pulse)

CN10

SD card slot

DM1B-DSF-PEJ (82) (HRS)

CN12

USB serial A receptacle

UBA-R4R-D14-4D (LF) (SN) (JST)

CN13

USB Mini-B receptacle

KMBX-SMT-5S-S-30TR (Kycon)

CN14

LVDS connector

DF14A-20P-1.25H (25) (HRS)

CN15

Digital image input/output signal connector (50-pin)

SFH11-PBPC-D25-RA-BK (SULLINS)

CN16

LVDS back light connector

53261-0671 (Molex)

CN17

CMOS camera connector (26-pin)

HIF3FB-26DA-2.54DSA (71) (HRS)

CN18

DC power source jack

KLDX-SMT2-0202-ATR (Kycon)

J1

E1 connector

Not used

WM-6-5P (MAC8)

J2 GND connector

HWP-3P-G (MAC8)

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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1.7 Memory Mapping

Figure 1.6 shows the RZ/A2M memory mapping of RTK79210XXB00000BE.

Logic address

RZ/A2M logic space

RTK79210XXB00000BE

Memory mapping

H'0000 0000

CS0 space: 64 MBybes

-

H'0400 0000

CS1 space: 64 MBytes

-

H'0800 0000

CS2 space: 64 MBytes

-

H'0C00 0000

CS3 space: 64 MBytes

SDRAM (64 MBytes)

H'1000 0000

CS4 space: 64 MBytes

-

H'1400 0000

CS5 space: 64 MBytes

-

H'1800 0000

Other: 128 MBytes

H'2000 0000

SPI multi I/O bus space: 256 MBytes

Serial flash memory (64 MBytes)

H’2400 0000

-

H'3000 0000

HyperFlash space: 256 MBytes

HyperFlash (64 MBytes)

H’3400 0000

-

H'4000 0000

HyperRAM space: 256 MBytes

HyperRAM (8 MBytes)

H’4080 0000

-

H'5000 0000

OctaFlash space: 256 MBytes

-

H'6000 0000

OctaRAM space: 256 MBytes

-

H'7000 0000

Reserved (cannot be used)

Reserve(cannot be used)

H'8000 0000

Large-capacity internal RAM: 4 MBytes

H'8040 0000

Other: 2044 MBytes

H'FFFF FFFF

Figure 1.6 RZ/A2M Memory Mapping

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

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1.8 Absolute Maximum Ratings

Table 1.4 lists absolute maximum ratings for RTK79210XXB00000BE.

Table 1.4 RTK79210XXB00000BE Absolute Maximum Ratings

Symbol

Item

Rating value

Note

D5V

5V power voltage

-0.3V to 6.25V

Vss is the reference.

D3.3V *1

3.3V power voltage

-0.3V to 4.2V

Vss is the reference.

AVcc *1

Analog 3.3V main power voltage

-0.3V to 4.2V

AVss is the reference.

T

opr

Operational temperature range

*2

0℃ to 50℃

No condensation formation, corrosive gas environments not permitted

T

stg

Storage temperature

*2

-10℃ to 60℃

No condensation formation, corrosive gas environments not permitted

[Note] *1 Supplied from the connected RZ/A2M CPU board.

*2 Ambient temperature is the air temperature at a position as close as possible to the board.

1.9 Operating Conditions

Table 1.5 - lists operating conditions of RTK79210XXB00000BE.

Table 1.5 RTK79210XXB00000BE - Operational Conditions

Symbol

Item

Rated Value

Note

D5V

5V power voltage

4.5V to 5.5V

Vss standard

D3.3V *1

3.3V power voltage

3.0V to 3.6V

Vss standard

AVcc *1

Analog 3.3V main power voltage

3.0V to 3.6V

AVss standard

－

Maximum consumed current

2A

Includes continuous RZ/A2M CPU board current consumption.

T

opr

Operational temperature range

*2

0℃ to 40℃

Do not expose to condensation or corrosive gases

[Note] *1 Supplied from the connected RZ/A2M CPU board.

*2 Ambient temperature is the air temperature at a position as close as possible to the board.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-1

2018.10.11

2. Functional Specifications

2.1 Overview of Functions

Table 2.1.1 lists function modules of RTK79210XXB00000BE.

Table 2.1.1 Function Modules of RTK79210XXB00000BE

Section Function

Description

2.2

CPU

• RZ/A2M pin functions used in the RTK79210XXB00000BE.

2.3

Memory

• SDRAM: 64 Mbytes x 1

- ISSI S42S16320F-7TL

• EEPROM: 16 KBytes x 1

- Renesas R1EX24128ASAS0A

• NAND flash memory: 128 MBytes x 1 is possible to mount on the board

pattern.

- Cypress S34ML01G100TFI000

2.4

USB interface

Connection for the RZ/A2M USB2.0 host/function module and USB connector

2.5

Serial interface

Connection for the RZ/A2M FIFO internal serial communication interface (SCIFA) and RL78-intermediate USB Micro-B connector

2.6

Interrupt switch

Connection for the RZ/A2M NMI pin, IRQ0 pin, and push switch

2.7

Clock configuration

System clock configuration

2.8

Reset control

Reset control for the RZ/A2M CPU board and devices installed on the RTK79210XXB00000BE

2.9

Power voltage configuration

System power supply configuration for the RZ/A2M CPU board and RTK79210XXB00000BE

2.10

Audio interface

Connection for the RZ/A2M Audio CODEC (WM8978)

2.11

CMOS camera interface

Connection for the RZ/A2M Capture engine unit (CEU) and the CMOS camera connector

2.12

SD card interface

Connection for the RZ/A2M SD host interface (SDHI) channel 1 and SD card slot

2.13

LAN interface

Connection for the RZ/A2M Ethernet controller (ETHERC) and LAN connector via Ethernet PHY

2.14

Key input switch

Connection for the RZ/A2M A/D converter (ADC) and push switches

2.15

VDC6 interface

Connection for the RZ/A2M Video display controller 6 (VDC6) and digital image input/output connector

2.16

LVDS interface

Connection for the RZ/A2M LVDS interface and LVDS connector

2.17

DRP interface

Connection for the RZ/A2M DRP interface and DRP connector

―

Operation specifications

Refer to Chapter 3 for details on connectors and interfaces

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-2

2018.10.11

2.2 CPU

2.2.1 Overview of RZ/A2M

RTK79210XXB00000BE is used by connecting to an RZ/A2M CPU board RTK7921053C00000BE equipped with RZ/A2M.

RZ/A2M is a 32 bit RISC microprocessor which operates at a maximum clock speed of 528 MHz.

2.2.2 List of RZ/A2M Pin Functions Used on RTK79210XXB00000BE

Table 2.2.1 to Table 2.2.16 lists RZ/A2M Pin Functions used on RTK79210XXB00000BE

Table 2.2.1 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (1)

Pin Name

Pin Function

Description

CN1

Comments

A1

Vcc

A2

QSPI1_IO3

Connects to serial flash memory (U2 on the CPU board)

―

A3

QSPI1_SPCLK

Connects to serial flash memory (U2 on the CPU board)

―

A4

RPC_WP#

Open

―

A5

QSPI0_IO3

Connects to serial flash memory (U2 on the CPU board)

―

A6

PVcc_SPI

3.3V JP1：1-2

A7

Vss

A8

PVcc

A9

PF_4 / RxD2 / DV0_DATA19 / LCD0_DATA4 / MTIOC6A / SSIBCK0 / IRQ1

DV0_DATA19

Connects to digital image input/output connector (CN15)

113

LCD0_DATA4

A10

PE_6 / ET0_MDIO / VIO_D2 / SSIRxD0 / MTIOC0D / CC2_RD1

ET0_MDIO

Connects to Ethernet PHY1 (U27)

107

SW6-4：ON

VIO_D2

Connects to CMOS camera connector (CN17)

SW6-4：OFF

A11

PL_2 / MD_BOOT2 / IRQ6

MD_BOOT2

Connects to DIP switch (SW1 on the CPU board)

―

PD_0：High SW1-3

IRQ6

Connects to USB CC logic controller (U7 on CPU the board)

PD_0：Low

A12

PE_5 / ET0_MDC / VIO_D3 / SSITxD0 / MTIOC0C / CC1_RD1

ET0_MDC

Connects to Ethernet PHY1 (U27)

103

SW6-4：ON

VIO_D3

Connects to CMOS camera connector (CN17)

SW6-4：OFF

A13

P8_4 / A4 / DRP20 / DV0_DATA13 / SSL00 / SSIRxD3

A4

Connects to SDRAM (U3)

101

SW6-1：ON

DRP20

Connects to DRP connector (CN2)

SW6-1：OFF SW6-2：ON

SSL00

Connects to Audio CODEC (U21)

SW6-1：OFF SW6-2：OFF

A14

P8_6 / A6 / DRP18 / DV0_DATA11 / MOSI0 / SSIFS3

A6

Connects to SDRAM (U3)

95

SW6-1：ON

DRP18

Connects to DRP connector (CN2)

SW6-1：OFF SW6-2：ON

MOSI0

Connects to Audio CODEC (U21)

SW6-1：OFF SW6-2：OFF

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-3

2018.10.11

Table 2.2.2 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (2)

Pin Name

Pin Function

Description

CN1

Comments

A15

PE_4 / ET0_CRS/RMII0_CRSDV / VIO_D4 / SSIFS0 / MTIOC0B

ET0_CRS/RMII0_CRSDV

Connects to Ethernet PHY1 (U27)

91

SW6-4：ON

VIO_D4

Connects to CMOS camera connector (CN17)

SW6-4：OFF

A16

P9_1 / A9 / DRP15 / DV0_DATA8 / RxD4 / SSIFS2

A9

Connects to SDRAM (U3) connection

83

SW6-1：ON

DRP15

Connects to DRP connector (CN2)

SW6-1：OFF SW6-3：ON

RxD4

Connects to USB Micro-B port (CN5) via USB serial converter IC (U23)

SW6-1：OFF SW6-3：OFF

A17

PVcc

A18

Vss

A19

PE_1 / ET0_RXD0/RMII0_RXD0 / VIO_D7 / RxD2 / POE8 / VBUSIN1 / IRQ1

ET0_RXD0/RMII0_RXD0

Connects to Ethernet PHY1 (U27)

73

SW6-4：ON

VIO_D7

Connects to CMOS camera connector (CN17)

SW6-4：OFF

A20

PA_4 / A20 / DV0_DATA9 / LCD0_DATA14 / SCI_TXD0 / MTIOC0C

DV0_DATA9

Connects to digital image input/output connector (CN15)

69

SW6-7：ON LCD0_DATA14

A21

CKIO

Connects to SDRAM (U3)

54 A22

Vss

B1

PK_1 / ET1_TXD0/RMII1_TXD0 / NAF4 / CC1_RA0 / CAN_CLK / SSIDATA2

ET1_TXD0/RMII1_TXD0

Connects to Ethernet PHY2 (U28)

137

SW6-5：ON

NAF4

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

B2

Vcc

B3

QSPI1_IO1

Connects to serial flash memory (U2 on the CPU board)

―

B4

QSPI1_IO0

Connects to serial flash memory (U2 on the CPU board)

―

B5

RPC_RESET#

Connects to serial flash memory (U2 on the CPU board)

―

B6

QSPI0_IO1

Connects to serial flash memory (U2 on the CPU board)

―

B7

QSPI0_SPCLK

Connects to serial flash memory (U2 on the CPU board)

―

B8

PF_5 / TxD2 / DV0_DATA20 / LCD0_DATA3 / MTIOC6B / SSIFS0

DV0_DATA20

Connects to digital image input/output connector (CN15)

115

LCD0_DATA3

B9

P6_3 / ET0_TXD1/RMII0_TXD1 / VIO_HD / TxD3 / POE0

ET0_TXD1/RMII0_TXD1

Connects to Ethernet PHY1 (U27)

111

SW6-4：ON

VIO_HD

Connects to CMOS camera connector (CN17)

SW6-4：OFF

B10

PH_0 / AUDIO_CLK / VIO_D1 / GTIOC4A / MTIOC1A / CC1_RD0 / IRQ3

VIO_D1

Connects to CMOS camera connector (CN17)

105

B11

PL_3 / MD_BOOT1 / IRQ7

MD_BOOT1

Connects to DIP switch (SW1 on the CPU board)

―

PD_0：High SW1-4

IRQ7

Connects to USB CC logic controller (U7 on the CPU board)

PD_0：Low

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-4

2018.10.11

Table 2.2.3 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (3)

Pin Name

Pin Function

Description

CN1

Comments

B12

PL_1 / MD_CLK / IRQ5

MD_CLK

Connects to DIP switch (SW1 on the CPU board)

48

PD_0：High SW1-2

IRQ5

Connects to Ethernet PHY2 (U28)

PD_0：Low

SW6-5：ON

B13

P8_3 / A3 / DRP21 / DV0_DATA14 / MTIOC6A / GTIOC3A

A3

Connects to SDRAM (U3)

97

SW6-1：ON

DRP21

Connects to DRP connector (CN2)

SW6-1：OFF

B14

PF_2 / TxD3 / DV0_DATA17 / LCD0_DATA6 / MTIOC7C / MISO1

DV0_DATA17

Connects to digital image input/output connector (CN15)

93

LCD0_DATA6

B15

P8_7 / A7 / DRP17 / DV0_DATA10 / RSPCK0 / SSIBCK3

A7

Connects to SDRAM (U3)

87

SW6-1：ON

DRP17

Connects to DRP connector (CN2)

SW6-1：OFF SW6-2：ON

RSPCK0

Connects to Audio CODEC (U21)

SW6-1：OFF SW6-2：OFF

B16

PE_3 / ET0_RXER/RMII0_RXER / VIO_D5 / SSIBCK0 / MTIOC0A

ET0_RXER/RMII0_RXER

Connects to Ethernet PHY1 (U27)

79

SW6-4：ON

VIO_D5

Connects to CMOS camera connector (CN17)

SW6-4：OFF

B17

PA_0 / A16 / DV0_DATA13 / LCD0_DATA10 / SCI_TXD1 / MTIOC8C

DV0_DATA13

Connects to digital image input/output connector (CN15)

77

LCD0_DATA10

B18

PA_3 / A19 / DV0_DATA10 / LCD0_DATA13 / SCI_CTS0/RTS0 / MTIOC0D

DV0_DATA10

Connects to digital image input/output connector (CN15)

68

LCD0_DATA13

B19

PA_5 / A21 / DV0_DATA8 / LCD0_DATA15 / SCI_RXD0 / MTIOC0B / IRQ5

DV0_DATA8

Connects to digital image input/output connector (CN15)

71

SW6-7：ON

LCD0_DATA15

B20

PA_6 / A22 / DV0_DATA7 / LCD0_DATA16 / SCI_SCK0 / MTIOC0A

DV0_DATA7

Connects to digital image input/output connector (CN15)

67

SW6-7：ON

LCD0_DATA16

B21

Vss Connects to DIP switch (CPU board SW1)

―

SW1-8: ON

B22

PVcc

C1

PH_2 / CTS2 / DV0_DATA22 / LCD0_DATA1 / MTIOC6D / SSIRxD0

DV0_DATA22

Connects to digital image input/output connector (CN15)

143

LCD0_DATA1

C2

P8_2 / A2 / DRP22 / DV0_DATA15 / GTIOC5A / IRQ2

A2

Connects to SDRAM (U3)

141

SW6-1：ON

DRP22

DRP connector (CN2)

SW6-1：OFF

C3

Vcc

C4

QSPI1_SSL

Connects to serial flash memory (U2 on the CPU board)

―

C5

RPC_INT#

Connects to serial flash memory (U2 on the CPU board)

―

C6

QSPI0_SSL

Connects to serial flash memory (U2 on the CPU board)

―

C7

QSPI0_IO0

Connects to serial flash memory (U2 on the CPU board)

―

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-5

2018.10.11

Table 2.2.4 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (4)

Pin Name

Pin Function

Description

CN1

Comments

C8

P6_1 / ET0_TXEN/RMII0_TXDEN / VIO_CLK / SCK3 / MTIOC2A

ET0_TXEN/RMII0_TXDEN

Connects to Ethernet PHY1 (U27)

119

SW6-4：ON

VIO_CLK

Connects to CMOS camera connector (CN17)

SW6-4：OFF

C9

P6_2 / ET0_TXD0/RMII0_TXD0 / VIO_VD / RxD3 / MTIOC2B / OTG_EXICEN1 / IRQ0

ET0_TXD0/RMII0_TXD0

Connects to Ethernet PHY1 (U27)

106

SW6-4：ON

VIO_VD

Connects to CMOS camera connector (CN17)

SW6-4：OFF

C10

PH_1 / AUDIO_XOUT / VIO_D0 / GTIOC4B / MTIOC1B / CC2_RD0 / IRQ2

VIO_D0

Connects to CMOS camera connector (CN17)

126

C11

PL_4 / MD_BOOT0 / IRQ0

MD_BOOT0

D Connects to IP switch (SW1 on the CPU board)

―

SW1-5

C12

PL_0 / MD_CLKS / IRQ4

IRQ4

Connects to Ethernet PHY1 (U27)

50

PD_0：Low

SW6-4：ON

MD_CLKS

Connects to DIP switch (SW1 on the CPU board)

―

PD_0：High SW1-1

C13

P8_5 / A5 / DRP19 / DV0_DATA12 / MISO0 / SSITxD3

A5

Connects to SDRAM (U3)

92

SW6-1：ON

DRP19

Connects to DRP connector (CN2)

SW6-1：OFF

C14

PF_1 / RxD3 / DV0_DATA16 / LCD0_DATA7 / MTIOC7B / MOSI1 / IRQ4

DV0_DATA16

Connects to digital image input/output connector (CN15)

88

LCD0_DATA7

C15

P9_0 / A8 / DRP16 / DV0_DATA9 / TxD4 / SSIDATA2

A8

Connects to SDRAM (U3)

84

SW6-1：ON

DRP16

Connects to DRP connector (CN2)

SW6-1：OFF SW6-3：ON

TxD4

Connects to USB Micro-B port (CN5) via USB serial converter IC (U23)

SW6-1：OFF SW6-3：OFF

C16

PE_2 / ET0_RXD1/RMII0_RXD1 / VIO_D6 / TxD2 / POE10

ET0_RXD1/RMII0_RXD1

Connects to Ethernet PHY1 (U27)

78

SW6-4：ON

VIO_D6

Connects to CMOS camera connector (CN17)

SW6-4：OFF

C17

PA_2 / A18 / DV0_DATA11 / LCD0_DATA12 / SCI_SCK1 / MTIOC8A

DV0_DATA11

Connects to digital image input/output connector (CN15)

74

LCD0_DATA12

C18

PG_0 / ET0_TXCLK / VIO_D8 / RSPCK0 / MTIOC3A / HM_RSTO#

VIO_D8

Connects to CMOS camera connector (CN17)

72 C19

PB_0 / A24 / DV0_DATA5 / LCD0_DATA18 / SSITxD1 / POE8

DV0_DATA5

Connects to digital image input/output connector (CN15)

64

LCD0_DATA18

C20

Vss Connects to DIP switch (CPU board SW1)

―

SW1-7: ON

C21

PD_7 / RIIC3SDA / IRQ7

RIIC3SDA

Connects to CMOS camera connector (CN17)

58

Connects to EEPROM (U32)

Connects to digital image input/output connector (CN15)

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-6

2018.10.11

Table 2.2.5 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (5)

Pin Name

Pin Function

Description

CN1

Comments

C22

PD_3 / RIIC1SDA / IRQ3 / MTCLKD / GTETRGD

PD_3

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

―

D1

PVcc

D2

BSCANP

Connects to DIP switch (SW1 on the CPU board)

―

SW1-6

D3

P8_1 / A1 / DRP23 / DV0_DATA16 / GTIOC5B / IRQ3

A1

Connects to SDRAM (U3)

128

SW6-1：ON

DRP23

Connects to DRP connector (CN2)

SW6-1：OFF

D4

Vcc

D5

QSPI1_IO2

Connects to Serial flash memory (U2 on the CPU board)

―

D6

Vss

D7

QSPI0_IO2

Connects to Serial flash memory (U2 on the CPU board)

―

D8

PK_0 / ET1_TXEN/RMII1_TXDEN / NAF3 / CC1_RD0 / MTIOC1B / SSIBCK2

ET1_TXEN/RMII1_TXDEN

Connects to Ethernet PHY2 (U28)

110

SW6-5：ON

NAF3

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

D9

PF_6 / RTS2 / DV0_DATA21 / LCD0_DATA2 / MTIOC6C / SSITxD0

DV0_DATA21

Connects to digital image input/output connector (CN15)

108

LCD0_DATA2

D10

PE_0 / ET0_RXCLK/REF50CK0 / VIO_FLD / SCK2 / POE4

ET0_RXCLK/REF50CK0

Connects to Ethernet PHY1 (U27)

102

SW6-4：ON

VIO_FLD

Connects to CMOS camera connector (CN17)

SW6-4：OFF

D11

PF_3 / SCK2 / DV0_DATA18 / LCD0_DATA5 / MTIOC7D / SSL10

DV0_DATA18

Connects to digital image input/output connector (CN15)

124

LCD0_DATA5

D12

PVcc

D13

Vss

D14

PF_0 / SCK3 / DV0_DATA15 / LCD0_DATA8 / MTIOC7A / RSPCK1

DV0_DATA15

Connects to digital image input/output connector (CN15)

90

LCD_DATA8

D15

P8_0 / A0 / DV0_DATA14 / LCD0_DATA9 / SCI_CTS1/RTS1 / MTIOC8D

DV0_DATA14

Connects to digital image input/output connector (CN15)

86

LCD0_DATA9

D16

PA_1 / A17 / DV0_DATA12 / LCD0_DATA11 / SCI_RXD1 / MTIOC8B / IRQ6

DV0_DATA12

Connects to digital image input/output connector (CN15)

80

LCD0_DATA11

D17

PA_7 / A23 / DV0_DATA6 / LCD0_DATA17 / SSIRxD1 / POE10

DV0_DATA6

Connects to digital image input/output connector (CN15)

76

SW6-7：ON LCD0_DATA17

D18

PVcc

D19

Vss

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-7

2018.10.11

Table 2.2.6 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (6)

Pin Name

Pin Function

Description

CN1

Comments

D20

PD_6 / RIIC3SCL / IRQ6

RIIC3SCL

Connects to CMOS camera connector (CN17)

60

Connects to EEPROM (U32)

Connects to digital image input/output connector (CN15)

D21

PD_4 / RIIC2SCL / IRQ4

RIIC2SCL

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

―

Connects to USB CC logic controller (U7 on the CPU board)

D22

PD_1 / RIIC0SDA / IRQ1 / MTCLKB / GTETRGB

PD_1

Controls voltage supplied to PVcc_SD0

―

0：1.8V 1：3.3V

E1

Vss

E2

PH_3 / HM_RSTO# / RTS2 / GTIOC6A / MTIOC2A / SD0_CD / IRQ3

HM_RSTO#

Connects to HyperMCP (U3 on the CPU board)

―

E3

PK_3 / ET1_RXCLK/REF50CK1 / NAF6 / CC2_RD0 / CAN0RX_DATARATE_EN / MOSI0

ET1_RXCLK/REF50CK1

Connects to Ethernet PHY2 (U28)

132

SW6-5：ON

NAF6

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

E4

PK_2 / ET1_TXD1/RMII1_TXD1 / NAF5 / VBUSEN1 / CAN0RX / RSPCK0 / IRQ5

ET1_TXD1/RMII1_TXD1

Connects to Ethernet PHY2 (U28)

133

SW6-5：ON

NAF5

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

E19

PD_5 / RIIC2SDA / IRQ5

RIIC2SDA

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

―

Connects to USB CC logic controller (U7 on the CPU board)

E20

PD_2 / RIIC1SCL / IRQ2 / MTCLKC / GTETRGC

PD_2

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

― E21

JP0_3 / TCK

TCK

Connects to UDI connector (CN5 on the CPU board)

― E22

JP0_0 / TDI

TDI

Connects to UDI connector (CN5 on the CPU board)

― F1

PVcc_HO

1.8V JP2：2-3

F2

HM_CS0#/OM_CS0#

HM_CS0#

Connects to HyperMCP (U3 on the CPU board)

― F3

HM_CK/OM_SCLK

HM_CK

Connects to HyperMCP (U3 on the CPU board)

―

F4

PF_7 / GTETRGD / DV0_DATA23 / LCD0_DATA0 / MTCLKD / IRQ1

DV0_DATA23

Connects to digital image input/output connector (CN15)

136

LCD0_DATA0

F19

PD_0 / RIIC0SCL / IRQ0 / MTCLKA / GTETRGA

PD_0

Connection control for PL_[3:0]

―

0：IRQ input 1：SW1

F20

JP0_4 / TRST#

TRST#

Connects to UDI connector (CN5 on the CPU board)

―

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-8

2018.10.11

Table 2.2.7 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (7)

Pin Name

Pin Function

Description

CN1

Comments

F21

JP_2 / TMS

TMS

Connects to UDI connector (CN5 on the CPU board)

―

F22

PB_1 / A25 / DV0_DATA4 / LCD0_DATA19 / SSIFS1 / POE4

DV0_DATA4

Connects to digital image input/output connector (CN15)

63

LCD0_DATA19

G1

HM_DQ1/OM_SIO1

HM_DQ1

Connects to HyperMCP (U3 on the CPU board)

― G2

HM_RWDS/OM_DQS

HM_RWDS

Connects to HyperMCP (U3 on the CPU board)

― G3

HM_CS1#/OM_CS1#

HM_CS1#

Connects to HyperMCP (U3 on the CPU board)

―

G4

HM_CK#

Connects to HyperMCP (U3 on the CPU board)

―

G19

JP0_1 / TDO

TDO

Connects to UDI connector (CN5 on the CPU board)

―

G20

PB_2 / BS / DV0_DATA3 / LCD0_DATA20 / SSIBCK1 / POE0

DV0_DATA3

Connects to digital image input/output connector (CN15)

66

LCD0_DATA19

G21

PB_3 / CS0 / DV0_DATA2 / LCD0_DATA21 / SSIDATA2 / CTS0

DV0_DATA2

Connects to digital image input/output connector (CN15)

61

LCD0_DATA21

G22

P9_2 / A10 / DRP14 / DV0_DATA7 / SCK4 / SSIBCK2

A10

Connects to SDRAM (U3)

59

SW6-1：ON

DRP14

Connects to DRP connector (CN2)

SW6-1：OFF

H1

HM_DQ4/OM_SIO4

HM_DQ4

Connects to HyperMCP (U3 on the CPU board)

―

H2

HM_DQ2/OM_SIO2

HM_DQ2

Connects to HyperMCP (U3 on the CPU board)

―

H3

HM_DQ3/OM_SIO3

HM_DQ3

Connects to HyperMCP (U3 on the CPU board)

― H4

HM_DQ0/OM_SIO0

HM_DQ0

Connects to HyperMCP (U3 on the CPU board)

―

H19

PB_4 / CS1 / DV0_DATA1 / LCD0_DATA22 / SSIFS2 / RTS0

DV0_DATA1

Connects to digital image input/output connector (CN15)

40

LCD0_DATA22

H20

P9_3 / A11 / DRP13 / DV0_DATA6 / SSIRxD0

A11

Connects to SDRAM (U3)

42

SW6-1：ON

DRP13

Connects to DRP connector (CN2)

SW6-1：OFF SW6-2：ON

SSIRxD0

Connects to Audio CODEC (U21)

SW6-1：OFF SW6-2：OFF

H21

PB_5 / WAIT / DV0_DATA0 / LCD0_DATA23 / SSIBCK2 / TxD0

DV0_DATA0

Connects to digital image input/output connector (CN15)

57

LCD0_DATA23

H22

P9_5 / A13 / DRP11 / DV0_DATA4 / SSIFS0

A13

Connects to SDRAM (U3)

55

SW6-1：ON

DRP11

Connects to DRP connector (CN2)

SW6-1：OFF SW6-2：ON

SSIFS0

Connects to Audio CODEC (U21)

SW6-1：OFF SW6-2：OFF

J1

HM_RESET#/OM_RESET#

HM_RESET#

Connects to HyperMCP (U3 on the CPU board)

―

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-9

2018.10.11

Table 2.2.8 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (8)

Pin Name

Pin Function

Description

CN1

Comments

J2

HM_DQ6/OM_SIO6

HM_DQ6

Connects to HyperMCP (U3 on the CPU board)

― J3

HM_DQ7/OM_SIO7

HM_DQ7

Connects to HyperMCP (U3 on the CPU board)

― J4

HM_DQ5/OM_SIO5

HM_DQ5

Connects to HyperMCP (U3 on the CPU board)

―

J9

Vcc

J10

Vss

J11

Vss

J12

Vss

J13

Vss

J14

Vcc

J19

P9_4 / A12 / DRP12 / DV0_DATA5 / SSITxD0

A12

Connects to SDRAM (U3)

112

SW6-1：ON

DRP12

Connects to DRP connector (CN2)

SW6-1：OFF SW6-2：ON

SSITxD0

Connects to Audio CODEC (U21)

SW6-1：OFF SW6-2：OFF

J20

P7_7 / RD / DV0_HSYNC / LCD0_TCON0 / GTIOC3B / RxD0

DV0_HSYNC

Connects to digital image input/output connector (CN15)

44

LCD0_TCON

J21

P7_6 / AH / DV0_VSYNC / LCD0_TCON1 / GTIOC3A / SCK0

GTIOC3A

Connects to digital image input/output connector (CN15)

53

DV0_VSYNC

J22

P9_6 / A14 / DRP10 / DV0_DATA3 / SSIBCK0

A14

Connects to SDRAM (U3)

49

SW6-1：ON

DRP10

Connects to DRP connector (CN2)

SW6-1：OFF SW6-2：ON

SSIBCK0

Connects to Audio CODEC (U21)

SW6-1：OFF SW6-2：OFF

K1

Vss

K2

PJ_6 / GTETRGC / FCE / LCD0_CLK / MTCLKC / IRQ0

LCD0_CLK

Connects to digital image input/output connector (CN15)

147

SW6-6：ON

FCE

Connects to NAND flash memory (U31)

Not used SW6-6：OFF

K3

PH_4 / HM_INT# / CTS2 / GTIOC6B / MTIOC2B / SD0_WP / IRQ2

HM_INT#

Connects to HyperMCP (U3 on the CPU board)

― K4

PJ_0 / TRACECLK / SPDIF_OUT / VRAMMON0 / SCK1 / SSIRxD3

TRACECLK

Connects to UDI connector (CN5 on the CPU board)

―

K9

Vcc

K10

Vss

K11

Vss

K12

Vss

K13

Vss

K14

Vcc

K19

P9_7 / A15 / DRP09 / DV0_DATA2 / SD1_WP

A15

Connects to SDRAM (U3)

118

SW6-1：ON

DRP09

Connects to DRP connector (CN2)

SW6-1：OFF

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-10

2018.10.11

Table 2.2.9 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (9)

Pin Name

Pin Function

Description

CN1

Comments

K20

PG_1 / ET0_TXD2 / VIO_D9 / MOSI0 / MTIOC3C / HM_INT#

VIO_D9

Connects to CMOS camera connector (CN17)

116

K21

P7_5 / CKE / DRP08 / DV0_DATA1 / CTS1 / OVRCUR1

CKE

Connects to SDRAM (U3)

45

SW6-1：ON

DRP08

Connects to DRP connector (CN2)

SW6-1：OFF SW6-3：ON

CTS1

OVRCUR1

Connects to VBUS power supply control C (U29)

SW6-1：OFF SW6-3：OFF

K22

PG_2 / ET0_TXD3 / VIO_D10 / MISO0 / MTIOC3B / GTIOC0A / IRQ4

VIO_D10

Connects to CMOS camera connector (CN17)

43

L1

PVcc

L2

P0_1 / D1 / DRP25 / DV0_DATA18 / MTIOC6C / GTIOC4A

D1

Connects to SDRAM (U3)

151

SW6-1：ON

DRP25

Connects to DRP connector (CN2)

SW6-1：OFF

L3

P0_0 / D0 / DRP24 / DV0_DATA17 / MTIOC6B / GTIOC3B

D0

Connects to SDRAM (U3)

144

SW6-1：ON

DRP24

Connects to DRP connector (CN2)

SW6-1：OFF

L4

PJ_7 / GTETRGB / NAF0 / LCD0_EXTCLK / MTCLKB

LCD0_EXTCLK

Connects to VDC6 oscillator (X5)

140

40MHz SW6-6：ON

NAF0

Connects to NAND flash memory (U31)

Not used SW6-6：OFF

L9

Vcc

L10

Vss

L11

Vss

L12

Vss

L13

Vss

L14

Vcc

L19

P7_1 / RD/WR / DRP05 / DV0_VSYNC / RxD1 / CC1_RA1

RD/WR

Connects to SDRAM (U3)

123

SW6-1：ON

DRP05

Connects to DRP connector (CN2)

SW6-1：OFF RxD1

L20

P7_4 / CAS / DRP07 / DV0_DATA0 / RTS1 / CC2_RA1

CAS

Connects to SDRAM (U3)

120

SW6-1：ON

DRP07

Connects to DRP connector (CN2)

SW6-1：OFF RTS1

L21

P7_3 / RAS / DRP06 / DV0_HSYNC / TxD1 / CC2_RD1

RAS

Connects to SDRAM (U3)

41

SW6-1：ON

DRP06

Connects to DRP connector (CN2)

SW6-1：OFF TxD1

L22

P7_2 / CS4 / DV0_CLK / LCD0_TCON2 / TEND0 / CC2_RA0

DV0_CLK

Connects to Connects digital image input/output connector (CN15)

37

M1

P0_2 / D2 / DRP26 / DV0_DATA19 / MTIOC6D / GTIOC4B

D2

Connects to SDRAM (U3)

155

SW6-1：ON

DRP26

Connects to DRP connector (CN2)

SW6-1：OFF

M2

P0_5 / D5 / DRP29 / DV0_DATA22 / MTIOC7C / GTIOC7A

D5

Connects to SDRAM (U3)

153

SW6-1：ON

DRP29

Connects to DRP connector (CN2)

SW6-1：OFF

M3

P0_4 / D4 / DRP28 / DV0_DATA21 / MTIOC7B / GTIOC6B

D4

Connects to SDRAM (U3)

146

SW6-1：ON

DRP28

Connects to DRP connector (CN2)

SW6-1：OFF

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-11

2018.10.11

Table 2.2.10 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (10)

Pin Name

Pin Function

Description

CN1

Comments

M4

P0_3 / D3 / DRP27 / DV0_DATA20 / MTIOC7A / GTIOC6A

D3

Connects to SDRAM (U3)

148

SW6-1：ON

DRP27

Connects to DRP connector (CN2)

SW6-1：OFF

M9

Vcc

M10

Vss

M11

Vss

M12

Vss

M13

Vss

M14

Vcc

M19

P6_6 / CS2 / DRP02 / LCD0_TCON4 / DREQ0 / CC1_RA0

DRP02

Connects to DRP connector (CN2)

127

M20

P6_0 / ADTRG0

P6_0

Connects to LED1 (red) on the CPU board

125

1：Light on

M21

P7_0 / WE1/DQMU / DRP04 / DV0_CLK / SCK1 / CC1_RD1

WE1/DQML

Connects to SDRAM (U3)

25

SW6-1：ON

DRP04

Connects to DRP connector (CN2)

SW6-1：OFF SCK1

M22

PVcc

N1

PJ_3 / TRACEDATA1 / NAF0 / VRAMMON3 / RTS1 / SSIFS3

TRACEDATA1

Connects to UDI connector (CN5 on the CPU board)

―

N2

PJ_1 / TRACECTL / SPDIF_IN / VRAMMON1 / RxD1 / VBUSIN0 / IRQ0

IRQ0

Connects to IRQ0 switch (SW3)

159

JP1：2-JP2

Connects to Ethernet PHY1 (U27)

JP1：1-2

Connects to Ethernet PHY2 (U28)

JP1：2-3

N3

P0_6 / D6 / DRP30 / DV0_DATA23 / MTIOC7D / GTIOC7B

D6

Connects to SDRAM (U3)

150

SW6-1：ON

DRP30

Connects to DRP connector (CN2)

SW6-1：OFF

N4

PJ_2 / TRACEDATA0 / FCE / VRAMMON2 / TxD1 / SSITxD3

TRACEDATA0

Connects to UDI connector (CN5 on the CPU board)

―

N9

Vcc

N10

Vss

N11

Vss

N12

Vss

N13

Vss

N14

Vcc

N19

P6_5 / CS3 / DRP01 / LCD0_TCON5 / AUDIO_XOUT / CC1_RD0

CS3

Connects to SDRAM (U3)

135

SW6-1：ON

DRP01

Connects to DRP connector (CN2)

SW6-1：OFF

N20

PG_3 / ET0_COL / VIO_D11 / SSL00 / MTIOC3D / GTIOC0B

VIO_D11

Connects to CMOS camera connector (CN17)

129

N21

P6_4 / CS5 / DRP00 / LCD0_TCON6 / AUDIO_CLK / SD1_CD

DRP00

Connects to DRP connector (CN2)

36

SW6-2：ON

AUDIO_CLK

Connects to Audio oscillator (X1)

11.2896MHz SW6-2：OFF

N22

Vss

P1

PH_6 / HM_INT# / NAF3 / ET1_WOL / MTIC5V / IRQ4

ET1_WOL

Connects to Ethernet PHY2 (U28)

163

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-12

2018.10.11

Table 2.2.11 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (11)

Pin Name

Pin Function

Description

CN1

Comments

P2

PH_5 / HM_RSTO# / NAF2 / ET1_EXOUT / MTIC5U / IRQ5

ET1_EXOUT

Connects to Ethernet PHY2 (U28)

161

SW6-5：ON

NAF2

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

P3

PK_5 / GTETRGA / NAF1 / WDTOVF/PERROUT / MTCLKA

NAF1

Connects to NAND flash memory (U31)

167

Not used

P4

PVcc

P9

Vcc

P10

Vss

P11

Vss

P12

Vss

P13

Vss

P14

Vcc

P19

SD0_DAT7

Connects to SDVcc through a resistor

―

P20

SD0_RST#

Connects to the test point (TP1 on the CPU board)

―

P21

P6_7 / WE0/DQML / DRP03 / LCD0_TCON3 / DACK0 / CC2_RD0

WE0/DQML

Connects to SDRAM (U3)

23

SW6-1：ON

DRP03

Connects to DRP connector (CN2)

SW6-1：OFF

P22

PVcc_SD0

R1

PVcc

R2

PJ_4 / TRACEDATA2 / NAF1 / VRAMMON4 / CTS1 / SSIBCK3

TRACEDATA2

Connects to UDI connector (CN5 on the CPU board)

―

R3

PJ_5 / TRACEDATA3 / NAF2 / OVRCUR0 / MTIOC1A / SSIFS2 / IRQ4

TRACEDATA3

Connects to UDI connector (CN5 on the CPU board)

―

R4

Vss

R19

SD0_DAT2

Connects to microSD card slot (CN1 on the CPU board)

―

R20

SD0_DAT5

Connects to SDVcc through a resistor

―

R21

SD0_DAT4

Connects to SDVcc through a resistor

―

R22

SD0_DAT6

Connects to SDVcc through a resistor

―

T1

AUDIO_X1

Connects to GND through a resistor

―

T2

AUDIO_X2

Open

―

T3

P3_5 / ET1_RXD1/RMII1_RXD1 / FCLE / CC2_RA0 / CAN0TX_DATARATE_EN / SSL00

ET1_RXD1/RMII1_RXD1

Connects to Ethernet PHY2 (U28)

156

SW6-5：ON

FCLE

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

T4

P3_2 / ET1_CRS/RMII1_CRSDV / FRE / CC1_RA1 / CAN1RX_DATARATE_EN / MOSI2

ET1_CRS/RMII1_CRSDV

Connects to Ethernet PHY2 (U28)

154

SW6-5：ON

FRE

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

T19

SD0_DAT0

Connects to microSD card slot (CN1 on the CPU board)

―

T20

SD0_DAT1

Connects to microSD card slot (CN1 on the CPU board)

―

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-13

2018.10.11

Table 2.2.12 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (12)

Pin Name

Pin Function

Description

CN1

Comments

T21

SD0_DAT3

Connects to microSD card slot (CN1 on the CPU board) connection

―

T22

Vss

U1

Vss

U2

PK_4 / ET1_RXD0/RMII1_RXD0 / NAF7 / OVRCUR1 / CAN0TX / MISO0 / IRQ6

ET1_RXD0/RMII1_RXD0

Connects to Ethernet PHY2 (U28)

164

SW6-5：ON

NAF7

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

U3

P3_1 / ET1_RXER/RMII1_RXER / FALE / VBUSEN0 / CAN1RX / RSPCK2 / IRQ6

ET1_RXER/RMII1_RXER

Connects to Ethernet PHY2 (U28)

166

SW6-5：ON

FALE

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

U4

MIPIAVcc18_1

U19

SD1_DAT0

Connects to SD card slot (CN10)

33 U20

SD1_DAT2

Connects to SD card slot (CN10)

31

U21

SD0_CMD

Connects to microSD card slot (CN1 on the CPU board)

― U22

SD0_CLK

Connects to microSD card slot (CN1 on the CPU board)

― V1

CSI_CLKP

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

― V2

CSI_CLKN

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

―

V3

PG_4 / ET0_TXER / VIO_D15 / RSPCK1 / MTIOC4A / GTIOC1A

VIO_D15

Connects to CMOS camera connector (CN17)

169

V4

Vss

V19

P5_4 / AN004 / IRQ0 / SD1_CD

SD1_CD

Connects to SD card slot (CN10)

18

V20

SD1_DAT1

Connects to SD card slot (CN10)

29 V21

SD1_DAT3

Connects to SD card slot (CN10)

32 V22

PVcc_SD1

3.3V

W1

CSI_DATA0P

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

― W2

CSI_DATA0N

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

―

W3

Vss

W4

PG_6 / ET0_RXD2 / VIO_D13 / MISO1 / MTIOC4C / GTIOC2A / IRQ5

VIO_D13

Connects to CMOS camera connector (CN17)

171

W5

P1_0 / D7 / DRP31 / IRQ0 / CAN_CLK / VBUSEN0 D7

Connects to SDRAM (U3)

160

SW6-1：ON

DRP31

Connects to DRP connector (CN2)

SW6-1：OFF SW6-3：ON

W6

P1_2 / D9 / MTIOC8B / IRQ2 / CAN0RX_DATARATE_EN / VBUSEN1

D9

Connects to SDRAM (U3)

196

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-14

2018.10.11

Table 2.2.13 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (13)

Pin Name

Pin Function

Description

CN1

Comments

W7

P2_0 / D12 / GTIOC6A / IRQ5 / CAN1RX / OTG_EXICEN0

D12 Connects to SDRAM (U3)

200

SW6-1：ON

W8

PC_2 / OTG_EXICEN0 / NAF7 / ET1_TXD3 / MISO2 / LCD0_TCON5

PC_2

Connects to DIP switch (SW6)

202

SW6-10

W9

P4_3 / RTS0 / TXOUT1M / SCI_CTS1/RTS1 / SSIFS1 / MTIOC8D / IRQ3

TXOUT1M

Connects to LVDS connector (CN14)

184

W10

LVDSAPVcc

W11

Vss

W12

LVDSPLLVcc

W13

USBDPVcc0

W14

USBVss

W15

Vss

W16

PVcc

W17

Vss

W18

PLLVcc

W19

P5_2 / AN002 / IRQ6 / VBUSIN0

VBUSIN0

Connects to USB connector (CN3 on the CPU board)

―

JP3

W20

P5_6 / AN006 / IRQ2

AN006

Connects to the key input switch (SW4 and SW5)

14

SW4, SW5

W21

SD1_CMD

Connects to SD card slot (CN10)

28 W22

Vss

Y1

CSI_DATA1P

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

―

Y2

CSI_DATA1N

Connects to MIPI CSI-2 connector (CN2 and J1 on the CPU board)

―

Y3

Vss

Y4

P3_3 / ET1_MDC / FWE / OTG_EXICEN0 / CAN1TX / MISO2 / IRQ7

ET1_MDC

Connects to Ethernet PHY2 (U28)

177

SW6-5：ON

FWE

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

Y5

P1_4 / D11 / MTIOC8D / IRQ4 / CAN0TX_DATARATE_EN / VBUSIN0

D11

Connects to SDRAM (U3)

173

Y6

PC_0 / VBUSIN1 / NAF5 / ET1_TXCLK / RSPCK2 / IRQ2

VBUSIN1

Connects to USB Mini-B port (CN13)

194

Y7

P2_2 / D14 / GTIOC7A / IRQ7 / CAN1TX / VBUSIN1

D14 Connects to SDRAM (U3)

198

SW6-1：ON

Y8

P4_2 / TxD0 / TXOUT1P / SCI_TXD1 / SSITxD1 / MTIOC8C / IRQ2

TXOUT1P

Connects to LVDS connector (CN14)

182

Y9

P4_6 / ET0_EXOUT / TXCLKOUTP / SCI_TXD0 / TxD4 / DACK0

TXCLKOUTP

Connects to LVDS connector (CN14) connection

188

Y10

NMI Connects to NMI switch (SW2)

203 Y11

Vss

Y12

USBVss

Y13

USBVss

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-15

2018.10.11

Table 2.2.14 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (14)

Pin Name

Pin Function

Description

CN1

Comments

Y14

USBVss

Y15

USBVss

Y16

USBDPVcc1

Y17

PC_7 / OVRCUR0 / FRB / ET1_RXD3 / SD1_WP / LCD0_TCON0 / IRQ6

OVRCUR0

Connects to USB VBUS power supply control IC (U5 on the CPU board)

―

Y18

PC_6 / VBUSEN0 / FWE / ET1_RXD2 / SD1_CD / LCD0_TCON1 / IRQ7

VBUSEN0

Connects to USB VBUS power supply control IC (U5 on the CPU board)

―

Y19

P5_0 / AN000 / IRQ4 / SD0_CD / SD1_CD

SD0_CD

Connects to microSD card slot (CN1 on the CPU board)

―

Y20

P5_1 / AN001 / IRQ5 / SD0_WP / SD1_WP

SD0_WP

Connects to D 3.3V and GND through resistors

―

Y21

P5_7 / AN007 / IRQ3

IRQ3

Connects to digital image input/output connector (CN15)

19

Y22

SD1_CLK

Connects to SD card slot (CN10)

24 AA1

MIPIAVcc18_2

AA2

Vss

AA3

P1_1 / D8 / MTIOC8A / IRQ1 / CAN0RX / OVRCUR0

D8 Connects to SDRAM (U3)

179

SW6-1：ON

AA4

P3_4 / ET1_MDIO / FRB / CC2_RA1 / CAN1TX_DATARATE_EN / SSL20

ET1_MDIO

Connects to Ethernet PHY2 (U28)

187

SW6-5：ON

FRB

Connects to NAND flash memory (U31)

Not used SW6-5：OFF

AA5

P3_0 / OTG_EXICEN1 / NAF4 / ET1_LINKSTA / MTIC5W / IRQ3

ET1_LINKSTA

Connects to Ethernet PHY2 (U28)

191

AA6

PC_1 / VBUSIN0 / NAF6 / ET1_TXD2 / MOSI2 / LCD0_TCON6

PC_1

Connects to LED1 (green) on the CPU board

197

1：Light on

AA7

P4_0 / SCK0 / TXOUT0P / SCI_SCK1 / SSIBCK1 / MTIOC8A / IRQ0

TXOUT0P

Connects to LVDS connector (CN14)

170

AA8

P4_4 / CTS0 / TXOUT2P / SCI_CTS0/RTS0 / WDTOVF/PERROUT / OTG_EXICEN0

TXOUT2P

Connects to LVDS connector (CN14)

176

AA9

P4_7 / ET0_WOL / TXCLKOUTM / SCI_SCK0 / SCK4 / TEND0

TXCLKOUTM

Connects to LVDS connector (CN14)

190

AA10

USB_X2

Connects to USB oscillator (X2 on the CPU board)

―

48MHz

AA11

DP0 Connects to USB connector (CN3 on the CPU board)

―

AA12

USBAPVcc0

AA13

RREF0

Connects to GND through a resistor

―

2.2kΩ±1%

AA14

USBVss

AA15

DP1 Connects to USB Type-A port (CN12) and USB Mini-B port (CN13)

96

AA16

PVcc

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-16

2018.10.11

Table 2.2.15 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (15)

Pin Name

Pin Function

Description

CN1

Comments

AA17

PC_5 / VBUSEN1 / FRE / ET1_RXDV / SPDIF_OUT / LCD0_TCON2 / IRQ0

VBUSEN1

Connects to USB Mini-B port (CN13)

8

AA18

XTAL

Connects to system clock oscillator (X1 on the CPU board)

―

24MHz

AA19

PC_4 / OTG_ID1 / FALE / ET1_TXER / SPDIF_IN / LCD0_TCON3 / IRQ1

LCD0_TCON3

Connects to digital image input/output connector (CN15)

20

AA20

RTC_X2

Connects to RTC oscillator (X3 on the CPU board)

―

32.768kHz

AA21

P5_3 / AN003 / IRQ7 / OTG_ID0

P5_3

Connects to DIP switch (SW6)

15

SW6-9

AA22

P5_5 / AN005 / IRQ1 / SD1_WP

SD1_WP

Connects to SD card slot (CN10)

17

AB1

Vss

AB2

PG_5 / ET0_RXDV / VIO_D14 / MOSI1 / MTIOC4B / GTIOC1B

VIO_D14

Connects to CMOS camera connector (CN17)

183 AB3

PG_7 / ET0_RXD3 / VIO_D12 / SSL10 / MTIOC4D / GTIOC2B

VIO_D12

Connects to CMOS camera connector (CN17)

181

AB4

P1_3 / D10 / MTIOC8C / IRQ3 / CAN0TX / OTG_ID1

D10 Connects to SDRAM (U3)

189

SW6-1：ON

AB5

P2_1 / D13 / GTIOC6B / IRQ6 / CAN1RX_DATARATE_EN / OTG_ID0

D13

Connects to SDRAM (U3)

193

AB6

P2_3 / D15 / GTIOC7B / WDTOVF/PERROUT / CAN1TX_DATARATE_EN / OTG_EXICEN1

D15

Connects to SDRAM (U3)

199

AB7

P4_1 / RxD0 / TXOUT0M / SCI_RXD1 / SSIRxD1 / MTIOC8B / IRQ1

TXOUT0M

Connects to LVDS connector (CN14)

172 AB8

P4_5 / ET0_LINKSTA / TXOUT2M / SCI_RXD0 / RxD4 / DREQ0

TXOUT2M

Connects to LVDS connector (CN14)

178

AB9

RES#

Connects to Reset input switch (SW2 on the CPU board)

7

AB10

USB_X1

Connects to USB oscillator (X2 on the CPU board)

―

48MHz

AB11

DM0 Connects to USB connector (CN3 on the CPU board)

―

AB12

USBAPVcc1

AB13

RREF1

Connects to GND through a resistor

―

2.2kΩ±1%

AB14

USBVss

AB15

DM1 Connects to USB Type-A port (CN12) and USB Mini-B port (CN13)

98

AB16

PVcc

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-17

2018.10.11

Table 2.2.16 List of RZ/A2M Pin Function Selections Used on the RTK79210XXB00000BE (16)

Pin Name

Pin Function

Description

CN1

Comments

AB17

PC_3 / OTG_ID0 / FCLE / ET1_COL / SSL20 / LCD0_TCON4

LCD0_TCON4

Connects to digital image input/output connector (CN15)

10

AB18

EXTAL

Connects to system clock oscillator (X1 on the CPU board)

―

24MHz

AB19

Vss

AB20

RTC_X1

Connects to RTC oscillator (X3 on the CPU board)

―

32.768kHz AB21

AVcc

AB22

AVcc

[Note] : 3.3V power source, : 1.8V power source, : 1.2V power source, : 3.3V or 1.8V power source,

: GND

Red text CPU board setting display.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-18

2018.10.11

2.2.3 RTK79210XXB00000BE Interface Use Combination List

Table 2.2.17 shows the usage permission/denial list for each RTK79210XXB00000BE interface. The ○ marks indicate

that combined use by both interfaces is possible, while the × marks indicate that combined use is not possible.

Table 2.2.17 RTK79210XXB00000BE Interface Usage Permission List

Part No. Interface name

Serial flash memory

HyperMCP

microSD card slot

MIPI

USB1

（Type-C

）

CoreSight 20

Audio CODEC

Ethernet1

Ethernet2

SDRAM

NAND flash memory (not equipped)

EEPROM

DRP

UART

SD card slot

USB2

（Type-A

＆Mini-B

）

LVDS output

LCD output

DV input

CMOS camera

NMI switch

IRQ0switch

（DSTBY release

）

U2

Serial flash memory o o o o o o o o o o o o o o o o o o o o o

U3

HyperMCP o o o o o o o o o o o o o o o o o o o o o

CN1

microSD card slot o o o o o o o o o o o o o o o o o o o o o

CN2

MIPI o o o o o o o o o o o o o o o o o o o o o

CN3

USB1（Type-C） o o o o o o o o o o o o o o o o o o o o o

CN5

CoreSight 20 o o o o o o o o o o o o o o o o o o o o o

U21 Audio CODEC o o o o o o o o × o o × o o o o o o o o o U27 Ethernet1 o o o o o o o *1 o o o o o o o o o o × o *1

U28 Ethernet2 o o o o o o o *1 o × o o o o o o o o o o *1

U30 SDRAM o o o o o o × o o o o × × o × o o o o o o

U31 NAND flash memory (not equipped) o o o o o o o o × o o o o o o o × o o o o U32 EEPROM o o o o o o o o o o o o o o o o o o o o o CN2 DRP o o o o o o × o o × o o × o × o o o o o o CN5 UART o o o o o o o o o × o o × o o o o o o o o CN10 SD card slot o o o o o o o o o o o o o o o o o o o o o CN12, CN13 USB2（Type-A＆Mini-B） o o o o o o o o o × o o × o o o o o o o o CN14 LVDS output o o o o o o o o o o o o o o o o o o o o o

LCD output o o o o o o o o o o × o o o o o o × o o o

DV input o o o o o o o o o o o o o o o o o × o o o CN17 CMOS camera o o o o o o o × o o o o o o o o o o o o o SW2 NMI switch o o o o o o o o o o o o o o o o o o o o o SW3 IRQ0switch （ DSTBY release） o o o o o o o *1 *1 o o o o o o o o o o o o

RTK7921053C00000BE

RTK79210XXB0000BE

RTK7921053C00000BE

RTK79210XXB0000BE

CN15

[Note] *1 PJ_1 / IRQ0 (DSTBY release) is a shared pin. If the WOL function of the Ethernet PHY1 (U27) and

Ethernet PHY2 (U28) is not used, it can be shared.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-19

2018.10.11

2.3 Memory

2.3.1 SDRAM

The RTK79210XXB00000BE is equipped with external SDRAM×1 shown in Table 2.3.1 as the standard configuration. SDRAM control is performed by the RZ/A2M on-chip bus state controller (BSC). There is a 16-bit connection to the SDRAM.

Figure 2.3.1 shows the SDRAM block diagram, and Table 2.3.2 shows the function settings of the DIP switch SW6-1 for system settings. Table 2.3.3 shows clock pulse oscillator settings, and Table 2.3.4 and Table 2.3.5 show the RZ/A2M bus state controller settings (read and write for SDRAM) when the bus clock is operating at 132MHz.

Table 2.3.1 SDRAM Overview

Specifications

Details

Model name

IS42S16320F-7TL

Configuration

64 MBytes (8 Mwords x 16 bits x 4 banks) x 1

Capacity

64 MBytes

Access time

5.4 ns

CAS latency

3 (when system clock is 132 MHz)

Refresh interval

8192 refresh cycle every 64 ms

Row address

A12 to A0

Column address

A9 to A0

Number of banks

4-bank operation controlled by BA0 and BA1

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-20

2018.10.11

Figure 2.3.1 SDRAM Block Diagram

Table 2.3.2 Function Setting Table of DIP Switch SW6-1 for System Setting

DIP

Switch

Function

ON OFF

SW6-1

P9_[7 :0] and P8_[7 :1], P2_2, P2_0, P1_3, P1_[1 :0], P0_[6 :0], P6_7, P6_5, P7_[1 :0], P7[5 :3] are used as SDRAM control pins.

P9_[7 :0] and P8_[7 :1], P2_2, P2_0, P1_3, P1_[1 :0], P0_[6 :0], P6_7, P6_5, P7_[1 :0], P7[5 :3] are used as DRP, audio, UART and/or USB interface pins (default settings).

[Note] indicates setting functions.

Table 2.3.3 Clock Pulse Oscillator Settings

Target devices

Clock pulse oscillator settings

IS42S16320F-7TL

■ CKIO selection register (CKIOSEL)

・Initial value: H'0001 ・Recommended setting value: H'0000

‐CKIO output clock selection: CKIOSEL[1:0] = B'00; Bφ clock output

DQML

39

CKIO

A13

A14

D7

3.3V

CS3#

D[15:0]

A[13:1]

A[15:14]

CKIO

DQMU

RD/WR#

CS3#

RAS#

CAS#

A15

D[6:0]

RAS#

CAS#

CKE

DQML

DQMU

RD/WR#

CKE

3.3V

A10

A11

A12

A7

A8

A9

A4

A5

A6

D15

A[3:1]

D12

D13

D14

D11

D8

D9

D10

RZ/A2M (U1)

P1_4 / D11 P1_3 / D10

P1_1 / D8

P1_2 / D9

P1_0 / D7

P2_3 / D15 P2_2 / D14 P2_1 / D13 P2_0 / D12

P8_[3:1] / A[3:1] / DRP[21:23]

P8_4 / A4 / DRP20 / SSL00

P8_5 / A5 / DRP19 / MISO0

P8_6 / A6 / DRP18 / MOSI0

P8_7 / A7 / DRP17 / RSPCK0

P9_0 / A8 / DRP16 / TxD4

P9_1 / A9 / DRP15 / RxD4

P9_2 / A10 / DRP14

P9_3 / A11 / DRP13 / SSIRxD0

P9_4 / A12 / DRP12 / SSITxD0

P9_5 / A13 / DRP11 / SSIFS0

P9_6 / A14 / DRP10 / SSIBCK0

P9_7 / A15 / DRP09

P0_[6:0] / D[6:0] / DRP[30:24]

CKIO

P6_5 / DRP01 / CS3

P6_7 / WE0/DQML / DRP03

P7_0 / WE1/DQMU / DRP04 /

SCK1

P7_1 / RD/WR / DRP05 / RxD1

P7_3 / RAS / DRP06 / TxD1

P7_4 / CAS / DRP07 / RTS1

P7_5 / CKE / DRP08 / CTS1 /

OVRCUR1

SDRAM / Other

OE# S

A

B1

39

34

3.3V

DIP

SW6-1

ON

SDRAM（U30）

WE#

CLK

DQML

CS#

DQMH

D[15:0]

BA[1:0]

A[12:0]

RAS#

CAS#

CKE

D11

D13

D15

D9 CKIO

MUX×9

3.3V

Note: Red text indicates a function used.

：Indicates a function not implemented. ：Indicates a SUB board.

B2

34

To DRP I/F, Audio I/F, UART I/F, USB（ch1）

ON(L):A=B1, OFF(H ):A=B2

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-21

2018.10.11

Table 2.3.4 Bus State Controller Settings (SDRAM read/write) (1)

User region

Target device

Bus state controller settings

CS3

IS42S16320F-7TL

■ CS3 space bus control register (CS3BCR)

・Initial setting: H'36DB 0C00 ・Recommended setting: H'0000 4C00

- Memory specification: TYPE[2:0] = B'100; SDRAM

- Data bus width specification: BSZ[1:0] = B'10; 16 bit bus width

■ CS3 space wait control register (CS3WCR)

・Initial setting：H'0000 0500 ・Recommended setting: H'0000 2D13

- Number of precharge completion wait cycles: WTRP[1:0] = B'01; 1 cycle

- Number of ACTV command → READ (A) /WRIT (A) command interval wait cycles: WTRCD[1:0] = B'11; 3 cycle

- Area 3CAS latency: A3CL[1:0] = B'10; 3 cycle

- Number of precharge start wait cycles: TRWL[1:0] = B'10; 2 cycle

- Number of REF command/ self refresh cancel →ACTV/REF/MRS command interval idle cycles:

WTRC[1:0] = B'11; 8 cycle

■ SDRAM control register (SDCR)

・Initial setting: H'0000 0000 ・Recommended setting: H'0012 0812

- Refresh control:

RFSH = 1; refresh

- Refresh mode:

RMODE = 0; carry out auto refresh

- Bank active mode:

BACTV = 0; Auto-precharge mode

- Number of area 3 row address bits:

A3ROW[1:0] = B'10; 13 bit

- Number of area 3 column address bits:

A3COL[1:0] = B'10; 10 bit

■ Refresh timer control/status register (RTCSR)

・Initial setting: H'0000 0000 ・Recommended setting: H'A55A 0010

- clock selection:

CKS[2:0] = B'010; CKIO/16

- Number of refresh:

RRC[2:0] = B'000; 1 time

■ Refresh time constant register (RTCOR)

・Initial setting: H'0000 0000 ・Recommended setting: H'A55A 0040

1 cycle＝121 nsec (132 MHz/16 = 8.25 MHz) Required refresh interval of this SDRAM: 7.8125 sec / time

7.8125 sec / 121 nsec = 64 (H'40) cycle/ number of refresh

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-22

2018.10.11

Table 2.3.5 Bus State Controller Settings (SDRAM read/write) (2)

User region

Target device

Bus state controller settings

CS3

IS42S16320F-7TL

■ AC characteristics adjustment register (ACADJ)

・Initial setting: H'0000 0000 ・Recommended setting: H'0000 000A

- Output characteristics adjustment bit:

SDRODLY = B’0000; Does not delay output delay time

- Input characteristics adjustment bit:

SDRIDLY = B’1010; Delays input data import timing

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-23

2018.10.11

2.3.2 NAND Flash Memory Interface

RTK79210XXB00000BE is possible to mount NAND flash memory x 1 shown in Table 2.3.6 on the board pattern.

NAND flash memory control is performed by the RZ/A2M on-chip NAND flash controller (FLCTL).

Figure 2.3.2 shows NAND flash memory interface block diagram, and Table 2.3.7 shows the function settings of the

system setting DIP switches SW6-5 and SW6-6.

Table 2.3.6 NAND Flash Memory Overview

Model name

Bus size Capacity

Access time

S34ML01G100TFI000

8 bit 128 MBytes

(8 bit x 128 M word)

Random: 25 s (max.) Sequential: 25 ns (min.)

Figure 2.3.2 NAND Flash Memory Interface Block Diagram

PK_4

14

PK_0

PK_3

P3_4

PK_2

P3_1

P3_2

P3_5

P3_3

PK_1

PH_5

Ether2 / NAND（U14）

Ether2 / NAND（U17）

Ether2 / NAND（U19）

FWE

FRE

FRB

FALE

14

11

To EthernetPHY2

P3_3

P3_2

P3_4

P3_1

PK_1

PH_5

PK_0

P3_5

PK_2

PK_3

NAND flash memory（U31）

NAF[7:0]

FCE

CE#

I/O[7:0]

FALE

FRE

FCLE

FRB

ALE

CLE

RE#

R/B

3.3V

FWE

WE#

WP#

3.3V

PK_4

NAF1

PJ_7

PJ_6

RZ/A2M (U1)

PK_4 / ET1_RXD0/RMII1_RXD0 /

NAF7

P3_5 / ET1_RXD1/RMII1_RXD1 /

FCLE

P3_1 / ET1_RXER/RMII1_RXER /

FALE

P3_2 / ET1_CRS/RMII1_CRSDV /

FRE

P3_3 / ET1_MDC / FWE

P3_4 / ET1_MDIO / FRB

PK_1 / ET1_TXD0/RMII1_TXD0 /

NAF4

PK_3 / ET1_RXCLK/REF50CK1 /

NAF6

PH_5 / NAF2 / ET1_EXOUT

PK_2 / ET1_TXD1/RMII1_TXD1 /

NAF5

PK_0 / ET1_TXEN/RMII1_TXDEN /

NAF3

PK_5 / NAF1

PJ_7 / NAF0 / LCD0_EXTCLK

PJ_6 / FCE / LCD0_CLK

LCD / NAND（U15）

PJ_6

PJ_7

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

NAF3

NAF2

NAF4

FCLE

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

NAF7

NAF6

NAF5

MUXOE# S

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

FCE

NAF0

2

To LCD I/F

3.3V

MUXOE# S

2A

2B1

2B2

1A

1B1

1B2

3.3V

DIP

SW6-6

3.3V

OFF

3.3V

NAF1

Note: Red text indicates a function used.

：Indicates a function not implemented. ：indicates a SUB board.

ON(L):A=B1, OFF(H): A=B2

DIP

SW6-5

OFF

3.3V

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-24

2018.10.11

Table 2.3.7 Function Setting Table of DIP Switches SW6-5 and SW6-6 for System Setting

DIP

Switch

Function

ON OFF

SW6-5

P3_[5 :1] and PH_5, PK_[4 :0] are used as Ethernet PHY2 control pins (default setting).

P3_[5 :1] and PH_5, PK_[4 :0] are used as FLCTL pins. SW6-6

PJ_[7 :6] are used as VDC6 pins (default setting).

PJ_[7 :6] are used as FLCTL pins.

[Note] indicates setting function.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-25

2018.10.11

2.3.3 EEPROM Interface

RTK79210XXB00000BE is equipped with EEPROM x 1 shown in Table 2.3.8 as the standard configuration.

EEPROM control is performed by the RZ/A2M on-chip 12C bus interface (RIIC) on channel 3.

Figure 2.3.3 shows EEPROM interface block diagram.

Table 2.3.8 EEPROM Overview

Model name

Interface Capacity

Package

R1EX24128ASAS0A

2-line serial (RIIC)

16 KB (16 Kwords x 8 bits)

8 pin SOP

Figure 2.3.3 EEPROM Interface Block Diagram

2

SCL3

SDA3

RZ/A2M (U1)

PD_6 / RIIC3SCL

PD_7 / RIIC3SDA

SCL3

SDA3

EEPROM（U32）

SCL

SDA

A[2:0]

WP

2

To CEU I/F, LCD I/F

3.3V

Note: Red text indicates a function used.

：Indicates a function not implemented . ：Indicates a SUB board.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-26

2018.10.11

2.4 USB Interface

RTK79210XXB00000BE is equipped with a USB series A port x 1 and USB Mini-B port x 1 as the standard

configuration of USB connectors.

However, USB interface pins are shared by the Series A port pins and Mini-B port pins, therefore Series A port and

Mini-B port cannot be used at the same time.

Figure 2.4.1 shows USB interface block diagram, and Table 2.4.1 shows the functions setting tables of DIP switches

SW6-1 and SW6-3 for system setting.

Figure 2.4.1 USB Interface Block Diagram

Table 2.4.1 Function Setting Table of DIP Switches SW6-1 and SW6-3 for System Setting

DIP

switch

Function

ON OFF

SW6-1

P7_5 is used as CKE pin.

P7_5 is used as OVRCUR1 pin (default setting).

SW6-3

P7_5 is used as DRP08 and CTS1 pin.

P7_5 is used as OVRCUR1 pin (default setting).

[Note] indicates setting functions.

RZ/A2M (U1)

DP1

5

P7_5 / CKE / DRP08 / CTS1 /

OVRCUR1

DM1

DP1

DM1

PC_5 / VBUSEN1

DM1

DP1

48MHz

(X2)

USB_X1 USB_X2

RREF

USBAVss

PC_0 / VBUSIN1

VBUS1

EN1

USB Type-A receptacle（CN12）

D-

VBUS

D+

VBUS power source control

IC (U29)

EN

INOUT1

FLG

5V

USB Mini-B receptacle（CN13）

D-

VBUS

D+

VBUS1

SDRAM /

Other（USB）（U12）

1

To SDRAM

3.3V

DIP

SW6-1

DRP /

Other（USB）（U11）

1

3.3V

DIP

SW6-3

MUXOE# S

3A

3B1

3B2

MUXOE# S

4A

4B1

4B2

To DRP I/F

FLG

OFF OFF

1 2 4 3

VBUS

3.3V

OC1#

FG[1:2]

FRAME

OC1#

OUT2

Note: Red text indicates a function used.

：Indicates a function not implemented. : Indicates a SUB board.

2.2k±1%

+

150F

1k

1F

ON(L):A=B1, OFF(H):A=B2 ON(L):A=B1, OFF(H):A=B2

1.8k

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-27

2018.10.11

2.5 Serial Interface

On the RTK79210XXB00000BE, channel 4 of serial communications interface built into the RZ/A2M on-chip FIFO

(SCIFA) is connected to the serial port connector (USB Micro-B) (CN5) via the USB serial converter IC (RL78/G1C).

When equipping and connecting E1 connector (J1), be sure of the direction of the number 1 pin.

Figure 2.5.1 shows the serial interface block diagram, and Table 2.5.1 shows the function setting table of DIP switches

SW6-1 and SW6-3 for system setting.

For performing serial communication between the USB connector of the host computer and the serial port connector

(CN5) of RTK79210XXB00000BE, the driver of USB serial converter IC must be installed to the host computer.

Download and install the inf file onto the host computer from the following URL.

URL:TBD

Figure 2.5.1 Serial Interface Block Diagram

Table 2.5.1 Function Setting Table of DIP Switches SW6-1 and SW6-3 for System Setting

DIP

Switch

Function

ON OFF

SW6-1

P9_[1 :0] is used as SDRAM control pin.

P9_[1 :0] is used as SCIFA pin (default setting).

SW6-3

P9_[1 :0] is used as DRP pin.

P9_[1 :0] is used as SCIFA pin (default setting).

[Note] indicates setting functions.

2

P9_0

P9_1

RZ/A2M (U1)

P9_1 / A9 / DRP15 / RxD4

P9_0 / A8 / DRP16 / TxD4

SDRAM / Other（UART）

(U8)

P9_1

P9_0

P9_1

P9_0

MUXOE# S

2A

2B1

2B2

1A

1B1

1B2

2

DRP /

Other（UART）（U11）

RxD4

TxD4

P9_1

P9_0

MUX

OE# S

2A

2B1

2B2

1A

1B1

1B2

2

To SDRAM

2

To DRP I/F

3.3V

DIP

SW6-1

OFF

3.3V

DIP

SW6-3

OFF

VBUS

D+

D-

USB Micro-B

Receptacle (CN5)

5V

RL78/G1C（U23）

P51 / TxD0

P50 / RxD0

RESET#

UDP0

UDM0

UVBUSP40 / TOOL0

VDD

UVDD

E1 connector（J1）

TOOL0

RESET#

【A】2【B】

2 2

【A】【B】

3V5V

Level shifter (U22)

5V

VCCB

3.3V

VCCA

RxD4

A0

A1

B0

B1

3V5V

Level shifter (U25)

5V

VCCB

3.3V

VCCA

TxD4

A0

A1

B0

B1

DIR

5V

NC

5V

Note: Red text indicates a function used.

：Indicates a function not implemented. ：Indicates a SUB board.

ON(L):A=B1, OFF(H):A=B2 ON(L):A=B1, OFF(H):A=B2

+

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-28

2018.10.11

2.6 Interrupt Switches

RTK79210XXB00000BE is equipped with an RZ/A2M NMI and IRQ0 interrupt signal input push switches (NMI

switch and IRQ0 switch).

The interrupt signal from IRQ0 RZ/A2M can be used to cancel the RZ/A2M deep standby mode. However, because the IRQ0pin is shared with the Ethernet PHY1 and Ethernet PHY2, when using the IRQ0 switch, the user must connect JP2 with the 2-pin of JP1.

Figure 2.6.1 shows an interrupt switch block diagram, and Table 2.6.1 shows a jumper JP1 function setting table.

Figure 2.6.1 Interrupt Switch Block Diagram

Table 2.6.1 Function Settings for Jumper JP1

Jumper

1-2 2-3

2-JP2

JP1

PJ_1 is used as Ethernet PHY1 WOL signal interrupt pin.

PJ_1 is used as Ethernet PHY2 WOL signal interrupt pin.

PJ_1 used as IRQ0 switch (SW3) interrupt pin (default setting)

[Note] indicates setting functions.

3.3V

NMI Switch

(SW2)

IRQ0 switch

(SW3)

NMI

RZ/A2M (U1)

PJ_1 / IRQ0 （DSTBY release）

EthernetPHY1.WOL

EthernetPHY2.WOL

1 3

3.3V

JP1

JP2

Note: Red text indicates a function used.

：Indicates a function not implemented . ：Indicates a SUB board.

+

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-29

2018.10.11

2.7 Clock Configuration

RZ/A2M receives the following three types of clock inputs from the RZ/A2M CPU board.

・RZ/A2M input clock ：24 MHz

・RZ/A2M USB clock ：48 MHz

・RZ/A2M RTC clock ：32.768 kHz

RZ/A2M receives the following two clock inputs from RTK79210XXB00000BE.

・RZ/A2M audio clock ：11.2896MHz

・RZ/A2M VDC6 clock ：40MHz

Figure 2.7.1 shows clock configuration diagram, and Table 2.7.1 shows the function setting table of DIP switches SW6-4 and SW6-6 for system setting.

Figure 2.7.1 Clock Configuration Diagram

RZ/A2M (U1)

32.768kHz

(X3)

RTC_X1 RTC_X2

24MHz

(X1)

EXTAL XTAL

48MHz

(X2)

USB_X1 USB_X2

NC

CKIO

CLK

SDRAM（U30）

PJ_6 /

LCD0_CLK

VDC6 connector （CN15）

LCD_CLK

SD0_CLK

SD1_CLK

PJ_7 / LCD0_EXTCLK

SCLK

microSD card slot (CN1)

CLK

SD card slot （CN10）

PL_1 / MD_CLK

L=10~12MHz, H=20~24MHz

PL_0 / MD_CLKS

L=SSCG:OFF, H=SSCG:ON

CLK

P6_4 / AUDIO_CLK

CLK

11.2896 MHz

Socket（ X1）

MCLK

Audio CODEC（U21）

DV_CLKP7_2 / DV0_CLK

CLK+

CLK-

LVDS connector （CN14）

P4_6 /

TXCLKOUTP

P4_7 /

TXCLKOUTM

Socket（ X5）

REFCLK

CMOS camera connector （CN17）

CLK

Socket（ X6）

Ethernet PHY1（U27）

CKXTAL2

Ethernet PHY2（U28）

CKXTAL2

CKXTAL1

CLK

50MHz

（X4)

AUDIO_X1

AUDIO_X2

X1

RL78（U23）

X2

12MHz

(X3)

3.3V

VIO_CLKP6_1 / VIO_CLK

Note: Red text indicates a function used.

：Indicates a function not implemented. ：Indicates a SUB board.

MUX

DIP

SW1-2

3.3V

DIP

SW1-1

3.3V

OFF

MUX

40MHz

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-30

2018.10.11

Table 2.7.1 Function Setting Table of DIP Switches SW6-4 and SW6-6 for System Setting

DIP

Switch

Function

ON OFF

SW6-4

P6_1 is used as RMII_TXDEN pin.

P6_1 is used as VIO_CLK input pin.

*1

(default setting)

SW6-6

PJ_6 is used as LCD0_CLK output pin. PJ_7 is used as LCD0_EXTCLK input pin. (default setting)

PJ_6 is used as FCE pin. PJ_7 is used as NAF0 pin.

[Note] indicates setting functions.

*1 When using P6_1 as VIO_CLK input pin, an oscillator must be equipped to X6.

There is no reverse insertion guard on the oscillator socket, so be careful to insert in the direction of pin 1 when connecting.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-31

2018.10.11

2.8 Reset Control

On RTK79210XXB00000BE, a reset signal from the reset IC on the RZ/A2M CPU board is input to the Ethernet PHY1 (U27), Ethernet PHY2 (U28), and digital image input/output connector (CN15).

There are two types of system reset: power-on reset and switch-based reset.

Figure 2.8.1 shows a reset control block diagram.

Figure 2.8.1 Reset Control Block Diagram

CoreSight 20 connector (CN5)

TRST#

SRST#

3.3V

Reset switch (SW2)

Reset IC (U15)

RESET#

CT

SENSE

RZ/A2M (U1)

TRST#

RES#

EthernetPHY1 (U27)

PHYRSTB

EthernetPHY2 (U28)

PHYRSTB

RESET#RPC_RESET#

RESET#HM_RESET#/OM_RESET#

3.3V

VDC6 connector（CN15）

RES#

Note: Red text indicates a function used.

：Indicates a function not implemented. ：Indicates a SUB board.

3.3V

Serial flash memory (U2)

HyperMCP (U3)

+

U12

U13

U14

 Reset IC output delay time

tpd=CT(nF)/175+0.5×10-3s=27.4ms

 reset IC output test voltage

0.405×(Ra+Rb)/Rb=0.405×(130k+20k)/20k=3.04V

3.3V

130k

20k

4700pF

1000pF

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-32

2018.10.11

2.9 Power Voltage Configuration

RTK79210XXB00000BE uses 5V power supply, and the regulator on the RZ/A2M CPU board generates 3.3V power supply. 5V power supply can also be supplied from the RZ/A2M CPU board.

USB serial converter IC (U23) is operated by the VBUS power supply provided from USB Micro-B connector (CN5).

Figure 2.9.1 shows a power configuration diagram.

Figure 2.9.1 Power Configuration Diagram

USB Mini-B

(CN13)

AC adapter

(CN18)

Power source

switch

(SW1)

VBUS

D5V D3.3V AVcc

Ethernet PHY

Audio CODEC

3.3V peripheral device

USB Type-A（CN12）

Key input switch

：Indicates a SUB board.

USB serial converter IC（U23）

VDD

USB Micro-B

(CN5)

VBUS

5V3.3V

D1.8V

D1.2V

USB Type-C (CN3)

5V external power source

connector (CN4)

5V1.8V

VBUS

PVcc

RZ/A2M (3.3V)

USBDPVcc

AVcc LVDSAPVcc USBAPVcc

RZ/A2M (1.8V)

MIPIAVcc18

Vcc

RZ/A2M (1.2V)

LVDSPLLVcc PLLVcc

3.3V peripheral device

5V1.2V

VBUS power supply

Jumper (JP3)

A3.3V

USB Type-C (CN3)

JP1

D1.8VD3.3V ROMVcc

RZ/A2M (1.8V/3.3V)

PVcc_HO

PVcc_SPI

JP2

D1.8VD3.3V RAMVcc

Serial flash memory (U2)

HyperMCP (U3)

RZ/A2M (1.8V/3.3V)

PVcc_SD0

D3.3V D1.8V

3.3V/1.8V

Power disconnect

(U4)

PVcc_SD1

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-33

2018.10.11

2.10 Audio Interface

RTK79210XXB00000BE is equipped with a Cirrus audio CODEC WM8978 × 1 for audio interface. The WM8978 register control is performed on the channel 0 of the RZ/A2M on-chip Renesas serial peripheral interface (RSPI), and the input/output control for audio data is performed on the channel 0 of the RZ/A2M on-chip serial sound interface (SSIF-2).

Figure 2.10.1 shows the audio interface block diagram, and Table 2.10.1 shows the function setting table of DIP switches SW6-1 and SW6-2 for system setting.

Figure 2.10.1 Audio Interface Block Diagram

Table 2.10.1 Function Setting Table of DIP Switches SW6-1 and SW6-2 for System Setting

DIP

switch

Function

ON OFF

SW6-1

P8_4 and P8_[7 :6], P9_[6 :3] are used as SDRAM control pins.

P8_4 and P8_[7 :6], P9_[6 :3] are used as audio interface pins (default settings).

SW6-2

P8_4 and P8_[7 :6], P6_4, P9_[6 :3] are used as DRP pins.

P8_4 and P8_[7 :6], P6_4, P9_[6 :3] used as audio interface pins (default settings).

[Note] indicates setting functions.

P9_4

P9_6

P8_6

P8_4

P9_3

P9_5

P8_7

MOSI

SSL

RSPCK

SSITxD

SSIFS

SSIRxD

SSIBCK

3.3V

To DRP I/F

3.3V

P6_4

RZ/A2M (U1)

P8_7 / A7 / DRP17 / RSPCK0

P8_6 / A6 / DRP18 / MOSI0

P8_4 / A4 / DRP20 / SSL00

P9_6 / A14 / DRP10 / SSIBCK0

P9_5 / A13 / DRP11 / SSIFS0

P9_4 / A12 / DRP12 / SSITxD0

P9_3 / A11 / DRP13 / SSIRxD0

P6_4 / DRP00 / AUDIO_CLK

CN4

+

Audio CODEC（U21）

BCLK

LRC

ADCDAT

DACDAT

SCLK

SDIN

CSB/GPIO1

MCLK

LOUT1

ROUT1

L2/GPIO2

R2/GPIO3

MICBIAS

CN3

MODE

3.3V

CLK

11.2896MHz

Socket（X1）

SDRAM / Other（Audio）（U10）

P9_4

P9_5

P9_6

SDRAM / Other（Audio）（U8）

P9_3

SDRAM / Other（Audio）（U5）

P8_4

P8_6

P8_7

3.3V

DIP

SW6-1

P6_4

8

7

MUXOE# S

4A

4B1

4B2

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

1A

1B1

1B2

MUXOE# S

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

DRP / Audio（U6）

P9_6

P8_6

P8_7

P6_4

3.3V

DIP

SW6-2

8

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

To SDRAM

OFF

P9_3

DRP / Audio（U3）

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

P8_4

P9_4

P9_5

CLK

SSL

MOSI

RSPCK

SSIRxD

SSITxD

SSIFS

SSIBCK

CLK

P8_4

P8_6

P8_7

P9_3

P9_4

P9_5

P9_6

Note: Red text indicates a function used.

：Indicates a function not implemented. ：Indicates a SUB board.

+

ON(L):A=B1, OFF(H):A=B2

8

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-34

2018.10.11

2.11 CMOS Camera Interface

RZ/A2M is equipped with an on-chip capture engine unit (CEU) that captures digital image data externally input, and transfers the data to memory. On RTK79210XXB00000BE, CEU pins of RZ/A2M connect with 26 pin MIL pitch connector to enable connection with various CMOS cameras.

X6 can be connected to an oscillator to input a sampling clock externally for the CMOS camera.

A pull-up resistor for I2C-bus is already mounted on RTK79210XXB00000BE, therefore it is not needed for the CMOS camera side.

Figure 2.11.1 shows CMOS camera interface block diagram, and Table 2.11.1 shows a function setting table of DIP switch SW6-4 for system setting.

Figure 2.11.1 CMOS Camera Interface Block Diagram

Table 2.11.1 Function Setting Table of DIP Switch SW6-4 for System Setting

DIP

switch

Function

ON OFF

SW6-4

P6_[3 :1] and PE_[6 :0] are used as Ethernet PHY1 control pins.

P6_[3 :1] and PE_[6 :0] are used as CEU pins. (default setting)

[Note] indicates setting functions.

PE_1

22

P6_1

PE_0

PE_6

P6_3

PE_3

PE_4

PE_2

PE_5

P6_2

D[11:8]

D[1:0]

D[15:12]

Ether1 / CEU（U13）

D[15:8] D[1:0]

Ether1 / CEU（U16）

Ether1 / CEU（U18）

22

10

To EthernetPHY1

P6_3

P6_2

P6_1

PE_3

PE_1

PE_2

PE_0

PE_4

PE_5

CMOS camera connector （CN17）

D[15:0]

CLK

D[15:0]

CLK

HD

FLD

VD

SDA3

HD

VD

FLD

SDA

SCL3

SCL

REFCLK

HD

VD

CLK

D6

D7

D5

FLD

D3

D4

DIP

SW6-4

3.3V

MUXOE# S

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

MUXOE# S

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

SCL3

SDA3

RZ/A2M (U1)

PE_1 / ET0_RXD0/RMII0_RXD0 /

VIO_D7

PE_2 / ET0_RXD1/RMII0_RXD1 /

VIO_D6

PE_3 / ET0_RXER/RMII0_RXER /

VIO_D5

PE_4 / ET0_CRS/RMII0_CRSDV /

VIO_D4

PE_5 / ET0_MDC / VIO_D3

PE_6 / ET0_MDIO / VIO_D2

PE_0 / ET0_RXCLK/REF50CK0 /

VIO_FLD

P6_3 / ET0_TXD1/RMII0_TXD1 /

VIO_HD

P6_2 / ET0_TXD0/RMII0_TXD0 /

VIO_VD

P6_1 / ET0_TXEN/RMII0_TXDEN /

VIO_CLK

PG_[4:7] / VIO_D[15:12]

PG_[3:0] / VIO_D[11:8]

PH_[0:1] / VIO_D[1:0]

PD_6 / RIIC3SCL

PD_7 / RIIC3SDA

3.3V

SCL3 SDA3

CLK

Socket（X6）

3.3V

VCC

GND

OFF

2

To EEPROM, LCD I/F

PE_6

D2

3.3V

Note: Red text indicates a function used .

：Indicates a function not implemented . ：Indicates a SUB board.

ON(L):A=B1, OFF(H):A=B2

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-35

2018.10.11

2.12 SD Card Interface

RTK79210XXB00000BE is equipped with 4-bit SD card slot, and it connects to the channel 1 of the RZ/A2M on-chip SD/MMC host interface (SDHI).

Figure 2.12.1 shows the SD card interface block diagram.

Figure 2.12.1 SD Card Interface Block Diagram

RZ/A2M (U1)

SD1_CLK

SD1_CMD

SD1_DAT[3:0]

8

CLK

CMD

D[3:0]

CLK

D[3:0]

SD card slot（CN10）

CLK

DAT[3:0]

VDD

CMD

CD

Card_DetectP5_4 / SD1_CD

CD

P5_5 / SD1_WP

WP

CD=0 : Card Inserted

WP

W_Protect

WP=0 : Unlock

3.3V

Note: Red text indicates a function used.

：Indicates a function not implemented . ：Indicates a SUB board.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-36

2018.10.11

2.13 LAN Interface

RTK79210XXB00000BE is equipped with Realtek Ethernet PHY RTL8201FL-VB-CG × 2, which can communicate with the channel 0 and channel 1 of the RZ/A2M on-chip ethernet controller (ETHERC).

The Ethernet PHY incorporates the Wake-On-Lan (WOL) functionality, and outputs a WOL signal when a Magic Packet has been detected, allowing the deep standby mode of RZ/A2M to be canceled.

Figure 2.13.1 shows the LAN interface (channel 0) block diagram, Figure 2.13.2 shows the LAN interface (channel 1) block diagram, Table 2.13.1 shows the RZ/A2M CPU board port L function switching table, Table 2.13.2 shows the function setting table of DIP switch SW6-4 for system setting, Table 2.13.3 and Table 2.13.5 show the function setting table of jumper JP1, and Table 2.13.4 shows the function setting table of DIP switch SW6-5 for system setting.

Table 2.13.1 RZ/A2M CPU Board Port L Function Switching Table

Function

High Low

PD_0

PL_[3 :0] is used as system setting pin.

Use PL_[3 :0] is used as RQ input pin.

[Note] indicates setting functions.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-37

2018.10.11

Figure 2.13.1 LAN Interface (Channel 0) Block Diagram

Table 2.13.2 Function Setting Table of DIP Switch SW6-4 for System Setting

DIP

switch

Function

ON OFF

SW6-4

P6_[3 :0] and PE_[6 :0] are used as Ethernet PHY1 control pins.

P6_[3 :0] and PE_[6 :0] are used as CEU pins. (default setting)

[Note] indicates setting functions.

Table 2.13.3 Function Setting Table of Jumper JP1

Jumper

1-2 2-3

2-JP2

JP1

PJ_1 is used as Ethernet PHY1 signal interrupt pin.

PJ_1 is used as Ethernet PHY2 signal interrupt pin.

PJ_1 is used as IRQ0 switch (SW3) interrupt pin. (default setting)

[Note] indicates setting functions.

PE_1

12

P6_1

PE_0

PE_6

P6_3

PE_3

PE_4

PE_2

PE_5

P6_2

Ether1 / CEU（U13）

RXER

RXD0

RXD1

REFCLK

Ether1 / CEU（U16）

MUXOE# S

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

Ether1 / CEU（U18）

MUXOE# S

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

ON(L):A=B1, OFF(H):A=B2

TXD1

TXD0

TXDEN

12

10

To CEU I/F

P6_3

P6_2

P6_1

PE_3

PE_1

PE_2

PE_0

PE_4

PE_5

CRSDV

MDC

MDIO

MDC

TXD[1:0]

TXDEN

REFCLK

RXD1

RXER

CRSDV

RES#

3.3V

INT#

【A】

RXD0

3.3V

NC

3.3V

CLK

50MHz

(X4)

To EthernetPHY2

3.3V

DIP

SW6-4

RJ45（CN8）

3.3V

NC

3.3V

WOL#

RZ/A2M (U1)

PE_1 / ET0_RXD0/RMII0_RXD0 /

VIO_D7

PE_2 / ET0_RXD1/RMII0_RXD1 /

VIO_D6

PE_3 / ET0_RXER/RMII0_RXER /

VIO_D5

PE_4 / ET0_CRS/RMII0_CRSDV /

VIO_D4

PE_5 / ET0_MDC / VIO_D3

PE_6 / ET0_MDIO / VIO_D2

PE_0 / ET0_RXCLK/REF50CK0 /

VIO_FLD

P6_3 / ET0_TXD1/RMII0_TXD1 /

VIO_HD

P6_2 / ET0_TXD0/RMII0_TXD0 /

VIO_VD

P6_1 / ET0_TXEN/RMII0_TXDEN /

VIO_CLK

PL_0 / MD_CLKS / IRQ4

PJ_1 / IRQ0（ DSTBY release）

WOL#

ON

WOL#

IRQ0

WOL2

TD+

TD-

RD+

RD-

CT1 CT2

LED-G

LED-Y

EthernetPHY1（U27）

MDC

MDIO

MDI+[0]

MDI-[0]

Transmit output

Receive input

MDI+[1]

MDI-[1]

TXD[1:0]

RXD[1]

TXC

TXEN

CRS_DV

RXER / FXEN

LED0 / PHYAD[0]

INTB

LED1 / PHYAD[1]

RXD[0]

LI/O/PD (1:Fiber, 0:UTP)

LI/PU

RXD[3] / CLK_CTL

LI/O/PD (1:REFCLK input , 0:output)

LI/PD

LI/O/PD (1:WOL, 0:LED)

RXDV

LI/O/PD (1:RMII, 0:MII)

PHYRSTB

CKXTAL1

CKXTAL2

RXD[2]

PMEB

TXD[3:2] COL

RXC

TXER

IO/PD

I/PU

I/PD

IO/PU

O/PD

O/OD

I/PD O/PD

O/PD

RSET

3.3V

1

3

PE_6

MDIO

3.3V

Note: Red text indicates a function used.

：Indicates a function not implemented . ：Indicates a SUB board.

JP1

JP2

2.49k±1%

PD_0

（IRQ input # / system

setting selection）

【C】

MUXOE# S

1A

1B1

1B2

【C】

L:A=B1, H:A=B2

IRQ input /

System settings (U6)

【A】

【B】

INT#

【B】 To CPU board SW1

Low

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-38

2018.10.11

Figure 2.13.2 LAN Interface (channel 1) Block Diagram

Table 2.13.4 Function Setting Table of DIP Switch SW6-5 for System Setting

DIP

switch

Function

ON OFF

SW6-5

P3_[5 :1] and PH_5, PK_[4 :0] are used as Ethernet PHY2 control pins (default settings).

P3_[5 :1] and PH_5, PK_[4 :0] are used as FLCTL pins.

[Note] indicates setting functions.

Table 2.13.5 Function Setting Table of Jumper JP1

Jumper

1-2 2-3

2-JP2

JP1

PJ_1 is used as Ethernet PHY1 signal interrupt pin.

PJ_1 is used as Ethernet PHY2 signal interrupt pin.

PJ_1 is used as IRQ0 switch (SW3) interrupt pin (default setting).

[Note] indicates setting functions.

PK_4

15

PK_0

PK_3

P3_4

PK_2

P3_1

P3_2

P3_5

P3_3

PK_1

LINK

WOL

PH_5

Ether2 / NAND（U14）

TXD0

EXOUT

TXDEN

RXD1

LINK

WOL#

Ether2 / NAND（U17）

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

Ether2 / NAND（U19）

MUXOE# S

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

ON(L):A=B1, OFF(H):A=B2

MDC

CRSDV

MDIO

RXER

15

11

To NAND flash memory

P3_3

P3_2

P3_4

P3_1

PK_1

PH_5

PK_0

P3_5

PK_2

PK_3

TXD1

REFCLK

INT#

3.3V

DIP

SW6-5

RXD0

PK_4

ON

MDIO

MDC

TXD[1:0]

TXDEN

REFCLK

RXD1

RXER

CRSDV

RES#

3.3V

INT#

RXD0

3.3V

NC

3.3V

CLK

50MHz

(X4)

To EthernetPHY1

RJ45（CN9）3.3V

NC

3.3V

WOL#

IRQ0

WOL1

TD+

TD-

RD+

RD-

CT1 CT2

LED-G LED-Y

EthernetPHY2（U28）

MDC

MDIO

MDI+[0]

MDI-[0]

Transmit output

Receive input

MDI+[1]

MDI-[1]

TXD[1:0]

RXD[1]

TXC

TXEN

CRS_DV

RXER / FXEN

LED0 / PHYAD[0]

INTB

LED1 / PHYAD[1]

RXD[0]

LI/O/PD (1:Fiber, 0:UTP)

LI/PU

RXD[3] / CLK_CTL

LI/O/PD (1:REFCLK input , 0:output)

LI/PD

LI/O/PD (1:WOL, 0:LED)

RXDV

LI/O/PD (1:RMII, 0:MII)

PHYRSTB

CKXTAL1

CKXTAL2

RXD[2]

PMEB

TXD[3:2] COL

RXC

TXER

IO/PD

I/PU

I/PD

IO/PU

O/PD

O/OD

I/PD O/PD

O/PD

RSET

3.3V

WOL#

RZ/A2M (U1)

PK_4 / ET1_RXD0/RMII1_RXD0 /

NAF7

P3_5 / ET1_RXD1/RMII1_RXD1 /

FCLE

P3_1 / ET1_RXER/RMII1_RXER /

FALE

P3_2 / ET1_CRS/RMII1_CRSDV /

FRE

P3_3 / ET1_MDC/ FWE

P3_4 / ET1_MDIO/ FRB

P3_0 / ET1_LINKSTA

PK_1 / ET1_TXD0/RMII1_TXD0 /

NAF4

PK_3 / ET1_RXCLK/REF50CK1 /

NAF6

PH_5 / NAF2 / ET1_EXOUT

PK_2 / ET1_TXD1/RMII1_TXD1 /

NAF5

PH_6 / ET1_WOL

PK_0 / ET1_TXEN/RMII1_TXDEN /

NAF3

PL_1 / MD_CLK / IRQ5

PJ_1 / IRQ0（DSTBY release）

LINK

EXOUT WOL

TP1 TP2

3

1

WOL

3.3V

Note: Red text indicates a function used.

：Indicates a function not implemented. ：Indicates a SUB board.

JP1

JP2

2.49k±1%

PD_0

（IRQ input #/ system

setting selection）

MUXOE# S

2A

2B1

2B2

【C】

L:A=B1, H:A=B2

IRQ input /

System settings (U6)

【A】

INT#

To CPU board SW1

【B】

【A】

【C】

【B】

Low

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-39

2018.10.11

2.14 Key Input Switches

Port P5_6 is set as an analog input pin (AN006), and can be used as a key input switch through an A/D converter (ADC)

Figure 2.14.1 shows the key input switch block diagram, and Table 2.14.1 shows the AD input pin voltage and AD value when each switch is pressed.

Figure 2.14.1 Key Input Switch Block Diagram

Table 2.14.1 AD Input Pin Voltage and AD Values When Switch Is Pressed

Switch

Pin voltage (V)

8 bit AD value

10 bit AD value

12 bit AD value

SW4 0.80 62 248 991

SW5 1.65 128 512 2048

[Note] Calculated at AVcc=3.3V, and AVss= 0V. Errors of resistor and voltage are not included.

AVcc

RZ/A2M (U1)

P5_6 / AN006

SW4 SW5

AVcc

Note: Red text indicates a function used.

：Indicates a function not implemented. ：Indicates a SUB board.

SW4 : 3.3V * 1.5kR / (1.5kR + 4.7kR) = 0.80V SW5 : 3.3V * 4.7kR / (4.7kR + 4.7kR) = 1.65V

1.5k 4.7k

4.7k

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-40

2018.10.11

2.15 VDC6 Interface

RZ/A2M has a digital image signal input pin (DV pin) which supports YCbCr422, YCbCr444, RGB888, RGB666, and RGB565 images. In addition, there is a digital image signal output pin (LCD pin) which supports a maximum image size of 1999 pixels (horizontal) by 2035 lines (vertical). On the RTK79210XXB00000BE, there is a 50 pin MIL connector to connect the DV pins and LCD pins of RZ/A2M.

Figure 2.15.1 shows the VDC6 interface block diagram, and Table 2.15.1 shows the function setting table of DIP switches SW6-6 and SW6-7 for system setting.

Figure 2.15.1 VDC6 Interface Block Diagram

Table 2.15.1 Function Setting Table of DIP Switches SW6-6 and SW6-7 for System Setting

DIP

switch

Function

ON OFF

SW6-6

PJ_[7 :6] is used as VDC6 pin (default setting).

PJ_[7 :6] is used as FLCTL pin.

SW6-7

PA_[7 :4] is used as VDC6 pin (default setting).

NC

[Note] indicates setting functions.

D[23:0]

RZ/A2M (U1)

PH_2 / DV0_DATA22 /

LCD0_DATA1

35

D1

D0

TCON[4:3]

TCON0 TCON[4:3, 0]

LCDCLK

PF_7 / DV0_DATA23 /

LCD0_DATA0

PJ_6 / FCE / LCD0_CLK

PJ_7 / NAF0 / LCD0_EXTCLK

PC_[3:4] / LCD0_TCON[4:3]

P7_7 / DV0_HSYNC /

LCD0_TCON0

PB_[5:0] / DV0_DATA[0:5] /

LCD0_DATA[23:18]

PA_7 / DV0_DATA6 /

LCD0_DATA17

P8_0 / DV0_DATA14/

LCD0_DATA9

PF_[0:6] / DV0_DATA[15:21] /

LCD0_DATA[8:2]

PA_[3:0] / DV0_DATA[10:13] /

LCD0_DATA[13:10]

PA_6 / DV0_DATA7 /

LCD0_DATA16

PA_5 / DV0_DATA8 /

LCD0_DATA15

PA_4 / DV0_DATA9 /

LCD0_DATA14

DVCLK

D[23:18]

PA_7

PA_6

PA_5

PA_4

D[13:10]

D9

D[8:2]

VDC6 / NAND（U15）

PJ_6

PJ_7

LCDCLK

EXTCLK

35

2

To NAND flash memory

PJ_7

PJ_6

VDC6 / Other（U20）

D14

D15

D16

D17

4

PA_4

PA_5

PA_6

PA_7

P7_2 / DV0_CLK

EXTCLK

CLK

Socket（X5）

TCON[4:3, 0]

D[23:18, 13:0] DVCLK

3.3V

DIP

SW6-6

ON

3.3V

DIP

SW6-7

ON

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

MUXOE# S

2A

2B1

2B2

1A

1B1

1B2

SCL3

SDA3

PD_6 / RIIC3SCL

PD_7 / RIIC3SDA

SCL3

SDA3

2

To EEPROM, CEU I/F

VDC6 connector （CN15）

（RSK+RZA1H LCD I/F）

3.3V

5V

SCL3 SDA3

PWM

INT

LCD0TCON[4:3, 0]

LCD0CLK

LCD0DATA[23:0]

SCL0

SDA0

PWM

INT

PWM INT

P5_7 / IRQ3

INT

PWM

P7_6 / DV0_VSYNC / GTIOC3A

RES#

DVCLK

DV0CLK

3.3V

Note: Red text indicates a function used .

：Indicates a function not implemented . ：Indicates a SUB board .

ON(L):A=B1, OFF(H): A=B2

NC

40MHz

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-41

2018.10.11

2.16 LVDS Interface

RTK79210XXB00000BE is equipped with a 1.25mm pitch 20 pin connector, which allows connection with the RZ/A2M LVDS interface. There is also a connector for the LVDS backlight.

Figure 2.16.1 shows the LVDS interface block diagram.

Figure 2.16.1 LVDS Interface Block Diagram

CLKM

RZ/A2M (U1)

P4_0 / TXOUT0P

8

TX0P

P4_1 / TXOUT0M

P4_2 / TXOUT1P

P4_3 / TXOUT1M

P4_4 / TXOUT2P

P4_5 / TXOUT2M

TX0M

TX1P

TX1M

TX2P

TX2M

P4_6 / TXCLKOUTP

P4_7 / TXCLKOUTM

CLKP

CLKM

TX0P

TX0M

TX1P

TX1M

TX2P

TX2M

CLKP

3.3V

5V

3.3V

Back light connector （CN16）

DIMMER

ENABLE VLED

0=Dark, 1=Bright

0=Disable, 1=Enable

LVDS connector（CN14）

RX0+

CLK+

CLK-

VCC

RX0-

RX1+

RX1-

RX2+

RX2-

L/R or RX3-

U/D or RX3+

Note: Red text indicates a function used .

：Indicates a function not implemented . ：Indicates a SUB board.

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications

R20UT4398EJ0100 Rev.1.00 2-42

2018.10.11

2.17 DRP Interface

RTK79210XXB00000BE is equipped with a 40 pin MIL connector, which allows interface with the RZ/A2M DRP interface.

Figure 2.17.1 shows the DRP interface block diagram, and Table 2.17.1 shows the function setting table of DIP switches SW6-1, SW6-2, and SW6-3 for system setting.

Figure 2.17.1 DRP Interface Block Diagram

Table 2.17.1 Function Setting Table of DIP Switches SW6-1, SW6-2, and SW6-3 for System Setting

DIP

switch

Function

ON OFF

SW6-1

P1_0 and P0_[6 :0], P8_[7 :1], P9_[7 :0], P7_[5 :3], P7_[1 :0], P6_7, P6_5 are used as SDRAM control pins.

P1_0 and P0_[6 :0], P8_[7 :1], P9_[7 :0], P7_[5 :3], P7_[1 :0], P6_7, P6_5 are used as DRP pins (default setting).

SW6-2

P8_4 and P8_[7 :6], P6_4, P9_[6 :3] are used as DRP pins.

P8_4 and P8_[7 :6], P6_4, P9_[6 :3] are used as audio interface pins (default settings).

SW6-3

P9_[1 :0] and P1_0, P7_5 are used as DRP pins.

P9_[1 :0] and P7_5 are used as UART or USB interface pins (default settings).

[Note] indicates setting functions.

32

P1_0

DRP[30:24]

DRP[23:21]

P8_4

DRP19

P8_6

P8_7

P9_0

P9_1

DRP[31:0]

DRP connector（CN2）

DRP[31:0]

3.3V

5V

SDRAM / Other（DRP）

DRP02

OE# S

A

B2

P6_4

DRP14

P9_3

32

30

DRP[30:24] DRP[23:21]

8

To Audio I/F

32

P9_4

P9_5

P9_6

DRP09

P7_5

DRP07

DRP06

DRP05

DRP04

DRP03

DRP02

DRP01

P6_4

P1_0 / D7 / DRP31

P0_[6:0] / D[6:0] / DRP[30:24]

P8_[1:3] / A[1:3] / DRP[23:21]

P8_4 / A4 / DRP20 / SSL00

P8_5 / A5 / DRP19 / MISO0

P8_6 / A6 / DRP18 / MOSI0

P8_7 / A7 / DRP17 / RSPCK0

P9_0 / A8 / DRP16 / TxD4

P9_1 / A9 / DRP15/ RxD4

P9_2 / A10 / DRP14

P9_3 / A11 / DRP13 / SSIRxD0

P9_4 / A12 / DRP12 / SSITxD0

P9_5 / A13 / DRP11/ SSIFS0

P9_6 / A14 / DRP10 / SSIBCK0

P9_7 / A15 / DRP09

P7_5 / CKE / DRP08 / CTS1 /

OVRCUR1

P7_4 / CAS / DRP07 / RTS1

P7_3 / RAS / DRP06 / TxD1

P7_1 / RD/WR / DRP05 / RxD1

P7_0 / WE1/DQMU / DRP04 /

SCK1

P6_7 / WE0/DQML / DRP03

P6_6 / DRP02

P6_5 / CS3 / DRP01

P6_4 / DRP00 / AUDIO_CLK

RZ/A2M (U1)

3.3V

DIP

SW6-1

DRP14 DRP09 DRP07 DRP06

OFF

DRP05 DRP04 DRP03 DRP02 DRP01

DRP / Audio（U6）

DRP13

DRP12

DRP11

DRP10

P9_3

P9_4

P9_5

P9_6

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

DRP/ Audio（U3）

DRP20

DRP18

DRP17

DRP00

P8_4

P8_6

P8_7

P6_4

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

DRP/ Other（U11）

DRP16

DRP15

DRP31

DRP08

P9_0

P9_1

P1_0

P7_5

MUXOE# S

4A

4B1

4B2

3A

3B1

3B2

2A

2B1

2B2

1A

1B1

1B2

DIP

SW6-3

3.3V

ON

To UART I/F, USB(ch1)

DIP

SW6-2

3.3V

ON

3

MUX×8

DRP19

Note: Red text indicates a function used.

：Indicates a function not implemented . ：Indicates a SUB board.

ON(L):A=B1, OFF(H):A=B2

B1

30

To SDRAM

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-1

2018.10.11

3. Operating specifications

3.1 Overview of Connector

Figure 3.1.1 and Figure 3.1.2 show connector layout diagrams for RTK79210XXB00000BE.

Figure 3.1.1 RTK79210XXB00000BE Connector Layout Diagram (C Side Top View)

CN1: CPU board

Connector

CN2: DRP

connector

CN3: Mic in

Pin jack

CN5: Serial port connector

(USB Micro-B)

CN8, CN9:

LAN connector (RJ-45)

CN13: USB Mini-B

Port

CN14: LVDS

connector

CN15: Digital image signal

Input/output connector

CN16: LVDS back line

connector

J1: E1

connector

CN4: Line out

Pin jack

J2: GND connector

CN18: DC power

source jack

CN17: CMOS camera

connector

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-2

2018.10.11

Figure 3.1.2 RTK79210XXB00000BE Connector Layout Diagram (S Side Top View)

CN10: SD card slot

CN12: USB Series A

Port

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-3

2018.10.11

3.1.1 CPU Board Connector (CN1)

The RTK79210XXB00000BE can be connected to the RZ/A2M CPU board RTK7921053C00000BE via the CPU board connector (CN1).

Figure 3.1.3 shows the CPU board connection pin layout diagram, and Table 3.1.1 to Table 3.1.3 show CPU board connector pin layout table.

Figure 3.1.3 CPU Board Connector (CN1) Pin Layout Diagram

CN1

1

204

203

2

C side top view

72

71 73

74

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-4

2018.10.11

Table 3.1.1 CPU Board Connector (CN1) Pin Layout Table (1)

Signal name

1 D5V 2 D5V 3 D5V 4 D5V 5 D5V 6 D5V 7 RES# 8 PC_5 / VBUSEN1

9 D3.3V 10 PC_3 / LCD0_TCON4

11 D3.3V 12 AVcc 13 D3.3V 14 P5_6 / AN006

15 P5_3 16 AVss 17 P5_5 / SD1_WP

18 P5_4 / SD1_CD

19 P5_7 / IRQ3

20 PC_4 / LCD0_TCON3

21 D3.3V 22 Vss 23 P6_7 / WE0/DQML / DRP03

24 SD1_CLK

25 P7_0 / WE1/DQMU / DRP04 / SCK1

26 Vss 27 D3.3V 28 SD1_CMD

29 SD1_DAT1

30 Vss 31 SD1_DAT2

32 SD1_DAT3

33 SD1_DAT0

34 Vss 35 Vss 36 P6_4 / DRP00 / AUDIO_CLK

37 P7_2 / DV0_CLK

38 Vss 39 Vss 40 PB_4 / DV0_DATA1 / LCD0_DATA22

41 P7_3 / RAS / DRP06 / TxD1

42 P9_3 / A11 / DRP13 / SSIRxD0

43 PG_2 / VIO_D10

44 P7_7 / DV0_HSYNC / LCD0_TCON0

45 P7_5 / CKE / DRP08 / CTS1 / OVRCUR1

46 Vss

47 Vss 48 PL_1 / MD_CLK / IRQ5

49 P9_6 / A14 / DRP10 / SSIBCK0

50 PL_0 / MD_CLKS / IRQ4

51 Vss 52 Vss 53 P7_6 / DV0_VSYNC / GTIOC3A

54 CKIO 55 P9_5 / A13 / DRP11 / SSIFS0

56 Vss 57 PB_5 / DV0_DATA0 / LCD0_DATA23

58 PD_7 / RIIC3SDA

59 P9_2 / A10 / DRP14

60 PD_6 / RIIC3SCL

61 PB_3 / DV0_DATA2 / LCD0_DATA21

62 Vss 63 PB_1 / DV0_DATA4 / LCD0_DATA19

64 PB_0 / DV0_DATA5 / LCD0_DATA18

65 Vss 66 PB_2 / DV0_DATA3 / LCD0_DATA20

67 PA_6 / DV0_DATA7 / LCD0_DATA16

68 PA_3 / DV0_DATA10 / LCD0_DATA13

69 PA_4 / DV0_DATA9 / LCD0_DATA14

70 Vss 71 PA_5 / DV0_DATA8 / LCD0_DATA15

72 PG_0 / VIO_D8

[Note] : 5V power source, : 3.3V power source, : GND

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-5

2018.10.11

Table 3.1.2 CPU Board Connector (CN1) Pin Layout Table (2)

Signal name

73 PE_1 / ET0_RXD0/RMII0_RXD0 / VIO_D7

74 PA_2 / DV0_DATA11 / LCD0_DATA12

75 Vss 76 PA_7 / DV0_DATA6 / LCD0_DATA17

77 PA_0 / DV0_DATA13 / LCD0_DATA10

78 PE_2 / ET0_RXD1/RMII0_RXD1 / VIO_D6

79 PE_3 / ET0_RXER/RMII0_RXER / VIO_D5

80 PA_1 / DV0_DATA12 / LCD0_DATA11

81 Vss 82 Vss 83 P9_1 / A9 / DRP15 / RxD4

84 P9_0 / A8 / DRP16 / TxD4

85 Vss 86 P8_0 / DV0_DATA14 / LCD0_DATA9

87 P8_7 / A7 / DRP17 / RSPCK0

88 PF_1 / DV0_DATA16 / LCD0_DATA7

89 Vss 90 PF_0 / DV0_DATA15 / LCD0_DATA8

91 PE_4 / ET0_CRS/RMII0_CRSDV / VIO_D4

92 P8_5 / A5 / DRP19 / MISO0

93 PF_2 / DV0_DATA17 / LCD0_DATA6

94 Vss 95 P8_6 / A6 / DRP18 / MOSI0

96 DP1 97 P8_3 / A3 / DRP21

98 DM1 99 Vss 100 Vss 101 P8_4 / A4 / DRP20 / SSL00

102 PE_0 / ET0_RXCLK/REF50CK0 / VIO_FLD

103 PE_5 / ET0_MDC / VIO_D3

104 Vss 105 PH_0 / VIO_D1

106 P6_2 / ET0_TXD0/RMII0_TXD0 / VIO_VD

107 PE_6 / ET0_MDIO / VIO_D2

108 PF_6 / DV0_DATA21 / LCD0_DATA2

109 Vss 110 PK_0 / ET1_TXEN/RMII1_TXDEN / NAF3

111 P6_3 / ET0_TXD1/RMII0_TXD1 / VIO_HD

112 P9_4 / A12 / DRP12 / SSITxD0

113 PF_4 / DV0_DATA19 / LCD0_DATA4

114 Vss 115 PF_5 / DV0_DATA20 / LCD0_DATA3

116 PG_1 / VIO_D9

117 Vss 118 P9_7 / A15 / DRP09

119 P6_1 / ET0_TXEN/RMII0_TXDEN / VIO_CLK

120 P7_4 / CAS / DRP07 / RTS1

121 Vss 122 Vss 123 P7_1 / RD/WR / DRP05 / RxD1

124 PF_3 / DV0_DATA18 / LCD0_DATA5

125 P6_0 126 PH_1 / VIO_D0

127 P6_6 / DRP02

128 P8_1 / A1 / DRP23

129 PG_3 / VIO_D11

130 Vss 131 Vss 132 PK_3 / ET1_RXCLK/REF50CK1 / NAF6

133 PK_2 / ET1_TXD1/RMII1_TXD1 / NAF5

134 Vss 135 P6_5 / CS3 / DRP01

136 PF_7 / DV0_DATA23 / LCD0_DATA0

137 PK_1 / ET1_TXD0/RMII1_TXD0 / NAF4

138 Vss 139 Vss 140 PJ_7 / NAF0 / LCD0_EXTCLK

141 P8_2 / A2 / DRP22

142 Vss 143 PH_2 / DV0_DATA22 / LCD0_DATA1

144 P0_0 / D0 / DRP24

145 Vss 146 P0_4 / D4 / DRP28

147 PJ_6 / FCE / LCD0_CLK

148 P0_3 / D3 / DRP27

149 Vss 150 P0_6 / D6 / DRP30

151 P0_1 / D1 / DRP25

152 Vss 153 P0_5 / D5 / DRP29

154 P3_2 / ET1_CRS/RMII1_CRSDV / FRE

155 P0_2 / D2 / DRP26

156 P3_5 / ET1_RXD1/RMII1_RXD1 / FCLE

[Note] : 5V power source, : 3.3V power source, : GND

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-6

2018.10.11

Table 3.1.3 CPU Board Connector (CN1) Pin Layout Table (3)

Signal name

157 Vss 158 Vss 159 PJ_1 / IRQ0

160 P1_0 / D7 / DRP31

161 PH_5 / NAF2 / ET1_EXOUT

162 Vss 163 PH_6 / ET1_WOL

164 PK_4 / ET1_RXD0/RMII1_RXD0 / NAF7

165 Vss 166 P3_1 / ET1_RXER/RMII1_RXER / FALE

167 PK_5 / NAF1

168 Vss 169 PG_4 / VIO_D15

170 P4_0 / TXOUT0P

171 PG_6 / VIO_D13

172 P4_1 / TXOUT0M

173 P1_4 / D11

174 Vss 175 Vss 176 P4_4 / TXOUT2P

177 P3_3 / ET1_MDC / FWE

178 P4_5 / TXOUT2M

179 P1_1 / D8

180 Vss 181 PG_7 / VIO_D12

182 P4_2 / TXOUT1P

183 PG_5 / VIO_D14

184 P4_3 / TXOUT1M

185 Vss 186 Vss 187 P3_4 / ET1_MDIO / FRB

188 P4_6 / TXCLKOUTP

189 P1_3 / D10

190 P4_7 / TXCLKOUTM

191 P3_0 / ET1_LINKSTA

192 Vss 193 P2_1 / D13

194 PC_0 / VBUSIN1

195 Vss 196 P1_2 / D9

197 PC_1 198 P2_2 / D14

199 P2_3 / D15

200 P2_0 / D12

201 Vss 202 PC_2

203 NMI 204 Vss

[Note] : 5V power source, : 3.3V power source, : GND

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-7

2018.10.11

3.1.2 DRP Connector (CN2)

RTK79210XXB00000BE is equipped with a DRP connector (CN2).

Figure 3.1.4 shows the DRP connector pin layout diagram, and Table 3.1.4 shows the DRP connector pin layout table.

Figure 3.1.4 DRP Connector (CN2) Pin Layout Diagram

1 2

39 40

C side top view

CN2

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-8

2018.10.11

Table 3.1.4 DRP Connector (CN2) Pin Layout Table

Signal name

1 P6_4 / AUDIO_CLK / DRP00

2 P6_5 / CS3 / DRP01

3 P6_6 / DRP02

4 P6_7 / WE0/DQML / DRP03

5 Vss 6 P7_0 / WE1/DQMU / DRP04 / SCK1

7 P7_1 / RD/WR / DRP05 / RxD1

8 P7_3 / RAS / DRP06 / TxD1

9 P7_4 / CAS / DRP07 / RTS1

10 Vss 11 P7_5 / CKE / DRP08 / CTS1 / OVRCUR1

12 P9_7 / A15 / DRP09

13 P9_6 / A14 / DRP10 / SSIBCK0

14 P9_5 / A13 / DRP11 / SSIFS0

15 +3.3V 16 P9_4 / A12 / DRP12 / SSITxD0

17 P9_3 / A11 / DRP13 / SSIRxD0

18 P9_2 / A10 / DRP14

19 P9_1 / A9 / DRP15 / RxD4

20 +3.3V 21 P9_0 / A8 / DRP16 / TxD4

22 P8_7 / A7 / DRP17 / RSPCK0

23 P8_6 / A6 / DRP18 / MOSI0

24 P8_5 / A5 / DRP19 / MISO0

25 +5V 26 P8_4 / A4 / DRP20 / SSL00

27 P8_3 / A3 / DRP21

28 P8_2 / A2 / DRP22

29 P8_1 / A1 / DRP23

30 +5V 31 P0_0 / D0 / DRP24

32 P0_1 / D1 / DRP25

33 P0_2 / D2 / DRP26

34 P0_3 / D3 / DRP27

35 Vss 36 P0_4 / D4 / DRP28

37 P0_5 / D5 / DRP29

38 P0_6 / D6 / DRP30

39 P1_0 / D7 / DRP31

40 Vss

[Note] Red characters indicate functions in use.

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-9

2018.10.11

3.1.3 Mic-in Pin Jack (CN3)

RTK79210XXB00000BE is equipped with the mic-in pin jack (CN3).

Figure 3.1.5 shows the mic pin jack layout diagram, and Table 3.1.5 shows the mic-in pin jack layout table.

Figure 3.1.5 Mic-in Pin Jack (CN3) Layout Diagram

Table 3.1.5 Mic-in Pin Jack (CN3) Layout Table

Signal name

1 GND (AVss)

2

L2 (audio CODEC Lch analog input pin)

3 R2 (audio CODEC Rch analog input pin)

1

2

3

CN3

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-10

2018.10.11

3.1.4 Line out Pin Jack (CN4)

RTK79210XXB00000BE is equipped with the line out pin jack (CN4).

Figure 3.1.6 shows the line out pin jack layout diagram, and Table 3.1.6 shows the line out pin jack layout table.

Figure 3.1.6 Line Out Pin Jack (CN4) Layout Diagram

Table 3.1.6 Line Out Pin Jack Layout Table

Signal name

1 GND (AVss)

2

LOUT1 (audio CODEC Lch analog output pin)

3 ROUT1 (audio CODEC Rch analog output pin)

1

2

3

CN4

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-11

2018.10.11

3.1.5 Serial Board Connector (CN5)

RTK79210XXB00000BE is equipped with a serial board (USB Micro-B) connector (CN5).

Figure 3.1.7 shows the serial board connector pin layout diagram, and Table 3.1.7 shows the serial board connector pin layout table.

Figure 3.1.7 Serial Board Connector (CN5) Pin Layout Diagram

Table 3.1.7 Serial Board Connector (CN5) Pin Layout Table

Signal name

1 VBus (UVBUS)

2

D- (UDM0)

3 D+ (UDP0)

4 ID (NC)

5

GND (Vss)

CN5

1

5

Side view

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-12

2018.10.11

3.1.6 LAN Connector (CN8, CN9)

RTK79210XXB00000BE is equipped with the LAN connectors (CN8, CN9).

Figure 3.1.8 shows the LAN connector pin layout diagram, and Table 3.1.8 shows the LAN connector pin layout table.

Figure 3.1.8 LAN Connector (CN8, CN9) Pin Layout Figure

Table 3.1.8 LAN Connector (CN8, CN9) Pin Layout Table

Signal name

CN8 CN9

1 LED-A (Y) (+3.3V)

LED-A (Y) (+3.3V)

2 LED-K (Y) (LED0/PHYAD[0])

LED-K (Y) (LED0/PHYAD[0])

3 TD+ (MDI+[0])

TD+ (MDI+[0])

4 TD- (MDI-[0])

TD- (MDI-[0])

5 CT1 CT1

6 CT2 CT2

7 RD+ (MDI+[1])

RD+ (MDI+[1])

8 RD- (MDI-[1])

RD- (MDI-[1])

9 NC NC 10

CAP CAP

11

LED-K (G) (LED1/PHYAD[1])

LED-K (G) (LED1/PHYAD[1]

and P3_0 / ET1_LINKSTA)

12

LED-A (G) (+3.3V)

[Note] Red characters indicate functions in use.

CN8

CN9

112112

Side view

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-13

2018.10.11

3.1.7 SD Card Slot (CN10)

RTK79210XXB00000BE is equipped with the SD card slot (CN10).

Figure 3.1.9 shows the SD card slot pin layout diagram, and Table 3.1.9 shows the SD card slot pin layout table.

Figure 3.1.9 SD Card Slot (CN10) Pin Layout Diagram

Table 3.1.9 SD Card Slot (CN10) Pin Layout Table

Signal name

1 CD/DAT3 (SD1_DAT3)

2 CMD (SD1_CMD)

3 VSS1 (Vss)

4 VDD (+3.3V)

5 CLK (SD1_CLK)

6 VSS2 (Vss)

7 DAT0 (SD1_DAT0)

8 DAT1 (SD1_DAT1)

9 DAT2 (SD1_DAT2)

10 Write_Protect (P5_5 / SD1_WP)

11 Card_Detect (P5_4 / SD1_CD)

12 COMMON (Vss)

[Note] Red characters indicate functions in use.

19 2 3 4 5 6 78

CN10

10

1211

S side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-14

2018.10.11

3.1.8 USB Connector (CN12, CN13)

RTK79210XXB00000BE is equipped with the series A port (CN12) and Mini-B port (CN13).

Figure 3.1.10 shows the series A port pin layout diagram, and Figure 3.1.11 shows the Mini-B port pin layout diagram. Table 3.1.10 shows the series A port pin layout table, and Table 3.1.11 shows the Mini-B port pin layout table.

Figure 3.1.10 Series A Port (CN12) Pin Layout Diagram

Table 3.1.10 Series Port (CN12) Pin Layout Table

Signal name

1 VBus 2 D- (DM1)

3 D+ (DP1)

4 GND (Vss)

14

CN12

Side view

S side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-15

2018.10.11

Figure 3.1.11 Mini-B Port (CN13) Pin Layout Diagram

Table 3.1.11 Mini-B Port (CN13) Pin Layout Table

Signal name

1 VBus (PC_0 / VBUSIN1)

2 D- (DM1)

3 D+ (DP1)

4 IC (connects to test pin TP3)

5 GND (Vss)

[Note] Red characters indicate functions in use.

CN13

1

5

Side view

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-16

2018.10.11

3.1.9 LVDS Connector (CN14, CN16)

RTK79210XXB00000BE is equipped with the LVDS connector (CN14) and the back light connector (CN16) for power supply.

Figure 3.1.12 shows the LVDS connector and LVDS backlight connector pin layout diagram, Table 3.1.12 shows the LVDS connector pin layout table, and Table 3.1.13 shows the LVDS back light connector pin layout table.

Figure 3.1.12 LVDS Connector (CN14, CN15) Pin Layout Diagram

Table 3.1.12 LVDS Connector (CN14) Pin Layout Table

Signal name

1 Vcc (+3.3V)

2 Vcc (+3.3V)

3 GND (Vss)

4 GND (Vss)

5 RX0- (P4_1 / TXOUT0M)

6 RX0+ (P4_0 / TXOUT0P)

7 GND (Vss)

8 RX1- (P4_3 / TXOUT1M)

9 RX1+ (P4_2 / TXOUT1P)

10 GND (Vss)

11 RX2- (P4_5 / TXOUT2M)

12 RX2+ (P4_4 / TXOUT2P)

13 GND (Vss)

14 CLK- (P4_7 / TXCLKOUTM)

15 CLK+ (P4_6 / TXCLKOUTP)

16 GND (Vss)

17 L/R or RX3- (connects to +3.3V via 680Ω resistor)

18 U/D or RX3+ (connects to +3.3V via 680Ω resistor)

19 GND (Vss)

20 GND (Vss)

[Note] Red characters indicate functions in use.

120

1

6

CN14

CN16

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-17

2018.10.11

Table 3.1.13 LVDS Back Light Connector (CN16) Pin Layout Table

Signal name

1 VLED (5V) (+5V)

2 VLED (5V) (+5V)

3 DIMMER (Brightness Adjust) (connects to +3.3V via 10kΩ resistor)

4 ENABLE (connects to +3.3V via 10kΩ resistor)

5 GND (Vss)

6 GND (Vss)

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-18

2018.10.11

3.1.10 Digital Image Input/output Connector (CN15)

RTK79210XXB00000BE is equipped with the digital image input/output connector (CN15).

Figure 3.1.13 shows the digital image input/output connector pin layout diagram, and Table 3.1.14 shows the digital image input/output connector pin layout.

Figure 3.1.13 Digital Image Input/output Connector (Cn15) Pin Layout Diagram

CN15

2 1

50 49

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-19

2018.10.11

Table 3.1.14 Digital Image Input/output Connector (CN15) Pin Layout Table

Signal name

1 DATA0 (PF_7 / DV0_DATA23 / LCD0_DATA0)

2 DATA1 (PH_2 / DV0_DATA22 / LCD0_DATA1)

3 DATA2 (PF_6 / DV0_DATA21 / LCD0_DATA2)

4 DATA3 (PF_5 / DV0_DATA20 / LCD0_DATA3)

5 DATA4 (PF_4 / DV0_DATA19 / LCD0_DATA4)

6 DATA5 (PF_3 / DV0_DATA18 / LCD0_DATA5)

7 DATA6 (PF_2 / DV0_DATA17 / LCD0_DATA6)

8 DATA7 (PF_1 / DV0_DATA16 / LCD0_DATA7)

9 DATA8 (PF_0 / DV0_DATA15 / LCD0_DATA8)

10 DATA9 (P8_0 / DV0_DATA14 / LCD0_DATA9)

11 DATA10 (PA_0 / DV0_DATA13 / LCD0_DATA10)

12 DATA11 (PA_1 / DV0_DATA12 / LCD0_DATA11)

13 DATA12 (PA_2 / DV0_DATA11 / LCD0_DATA12)

14 DATA13 (PA_3 / DV0_DATA10 / LCD0_DATA13)

15 DATA14 (PA_4 / DV0_DATA9 / LCD0_DATA14)

16 DATA15 (PA_5 / DV0_DATA8 / LCD0_DATA15)

17 DATA16 (PA_6 / DV0_DATA7 / LCD0_DATA16)

18 DATA17 (PA_7 / DV0_DATA6 / LCD0_DATA17)

19 DATA18 (PB_0 / DV0_DATA5 / LCD0_DATA18)

20 DATA19 (PB_1 / DV0_DATA4 / LCD0_DATA19)

21 DATA20 (PB_2 / DV0_DATA3 / LCD0_DATA20)

22 DATA21 (PB_3 / DV0_DATA2 / LCD0_DATA21)

23 DATA22 (PB_4 / DV0_DATA1 / LCD0_DATA22)

24 DATA23 (PB_5 / DV0_DATA0 / LCD0_DATA23)

25 RESET (RES#)

26 LCD_CLK (PJ_6 / FCE / LCD0_CLK)

27 TCON1 (PC_3 / LCD0_TCON4)

28 TCON2 (PC_4 / LCD0_TCON3)

29

TCON3 (P7_7 / DV0_HSYNC / LCD0_TCON0)

30 Hi (DITHB) (connects to +3.3V via 10kΩ resistor) DV_HSYNC (P7_7 / DV0_HSYNC / LCD0_TCON0)

31 Hi (MODE) (connects to +3.3V via 10kΩ resistor)

32 Hi (L/R) (connects to +3.3V via 10kΩ resistor)

33 Low (U/D) (connects to Vss via 10kΩ resistor)

34 PWM (P7_6 / DV0_VSYNC / GTIOC3A)

DV_VSYNC (P7_6 / DV0_VSYNC / GTIOC3A)

35 NC 36 NC 37 SDA (PD_7 / RIIC3SDA)

38 SCL (PD_6 / RIIC3SCL)

39 TP_INT (P5_7 / IRQ3)

40 NC 41 NC 42 NC 43 NC 44 DV_CLK (P7_2 / DV0_CLK)

45 Vcc (+3.3V)

46 Vcc (+3.3V)

47 GND (Vss)

48 GND (Vss)

49 5V (+5V)

50 5V (+5V)

[Note] Red characters indicate functions in use.

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-20

2018.10.11

3.1.11 CMOS Camera Connector (CN17)

RTK79210XXB00000BE is equipped with a CMOS camera connector (CN17). Figure 3.1.14 shows the CMOS camera connector pin layout diagram, and Table 3.1.15 shows the CMOS camera

connector pin layout.

CMOS camera connector (CN17) does not have a reverse insertion prevention guide, so be sure to insert in the direction of the #1 pin during connection. Moreover, confirm that the camera device signal pin is compatible with the circuit board.

Figure 3.1.14 CMOS Camera Connector (CN17) Pin Layout Diagram

Table 3.1.15 CMOS Camera Connector (CN17) Pin Layout Table

Signal name

1 Vcc (+3.3V)

2 GND (Vss)

3 SCL (PD_6 / RIIC3SCL)

4 SDA (PD_7 / RIIC3SDA)

5 VSYNC (P6_2 / ET0_TXD0/RMII0_TXD0 /

VIO_VD)

6 HSYNC (P6_3 / ET0_TXD1/RMII0_TXD1 /

VIO_HD)

7 PCLK (P6_1 / ET0_TXEN/RMII0_TXDEN /

VIO_CLK)

8 XCLK

9 D7 (PE_1 / ET0_RXD0/RMII0_RXD0 / VIO_D7)

10 D6 (PE_2 / ET0_RXD1/RMII0_RXD1 / VIO_D6)

11 D5 (PE_3 / ET0_RXER/RMII0_RXER / VIO_D5)

12 D4 (PE_4 / ET0_CRS/RMII0_CRSDV / VIO_D4)

13 D3 (PE_5 / ET0_MDC / VIO_D3)

14 D2 (PE_6 / ET0_MDIO / VIO_D2)

15 D1 (PH_0 / VIO_D1)

16 D0 (PH_1 / VIO_D0)

17 GND (Vss)

18 I/O (PE_0 / ET0_RXCLK/REF50CK0 / VIO_FLD)

19

I/O (PG_4 / VIO_D15)

20

I/O (PG_5 / VIO_D14)

D15 (PG_4 / VIO_D15)

D14 (PG_5 / VIO_D14)

21 D13 (PG_6 / VIO_D13)

22 D12 (PG_7 / VIO_D12)

23 D11 (PG_3 / VIO_D11)

24 D10 (PG_2 / VIO_D10)

25 D7 (PG_1 / VIO_D9)

26 D8 (PG_0 / VIO_D8)

[Note] Red characters indicate functions in use.

CN17

1 2

25 26

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-21

2018.10.11

3.1.12 DC Power Supply Jack (CN18)

RTK79210XXB00000BE is equipped with the DC power supply jack (CN18) for providing power to the system.

Figure 3.1.15 shows the power supply connector pin layout diagram, and Table 3.1.16 shows the power supply connector pin layout table.

Figure 3.1.15 Power Supply Connector (CN18) Pin Layout Figure

Table 3.1.16 Power Voltage Connector (CN18) Pin Layout Table

Signal name

1 GND (Vss)

2 GND (Vss)

3 +5V

1

2

3

CN18

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-22

2018.10.11

3.2 Operational Component Layout

Figure 3.2.1 shows the RTK79210XXB00000BE operational component layout diagram.

Figure 3.2.1 RTK79210XXB00000BE Operational Component Layout Diagram (C Side Top View)

SW6: DIP switch for

system setting

SW1: Power switch

SW2: NMI Switch

SW3: IRQ0 switch

SW4: Key input switch

SW5: Key input switch

JP1 and JP2:

IRQ0 selection jumper

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-23

2018.10.11

3.2.1 Jumpers (JP1 and JP2)

RTK79210XXB00000BE is equipped with two system setting jumpers.

Figure 3.2.2 shows the jumper layout diagram, and Table 3.2.1 shows the jumper setting table.

Figure 3.2.2 RTK79210XXB00000BE Jumper Layout Diagram

Table 3.2.1 Jumper Setting Table (JP1 and JP2)

Jumper

Settings

Function

JP1

IRQ0 input selection

1-2

Ethernet PHY1 (U27) WOL pin

2-3

Ethernet PHY2 (U28) WOL pin

2-JP2

IRQ0 switch (SW3)

[Note] displayed during initial settings.

Be sure to turn off the power before altering the jumper settings.

JP1

1 3

JP2

C side top view

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-24

2018.10.11

3.2.2 Switch Functions

RTK79210XXB00000BE is equipped with six switches.

Figure 3.2.3 shows the mounted switch layout diagram, Table 3.2.2 lists the mounted switches, and Table 3.2.3 provides the explanation of DIP switch functions.

Figure 3.2.3 RTK79210XXB00000BE Mounted Switch Layout Diagram

SW5 SW4 SW3 SW2

C side top view

SW6

ON

1 2 3 4 5 6 7 8 9 10

SW1

1 3

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-25

2018.10.11

Table 3.2.2 Mounted RTK79210XXB00000BE Switch Overview

Numbers Function

Note

SW1

Power supply switch

SW2

NMI switch

Refer to section 2.6 for details.

SW3

IRQ0 switch SW4

Key input switch

Refer to section 2.14 for details.

SW5

Key input switch

SW6

DIP switch for system settings

Refer to

Table

3.2.3 for further details

Table 3.2.3 Explanation of DIP Switch Functions (SW6)

Numbers

Settings

Function

SW6-1

P9_[7 :0]、P8_[7 :1]、 P2_2、P2_0、P1_3、 P1_[1 :0]、P0_[6 :0]、

P6_7、P6_5、P7_[1 :0]、

P7[5 :3] connection address

selection

OFF

SDRAM#/Other = “H”

Used as DRP, audio, UART, and USB interface pins

ON

SDRAM#/Other = “L”

Used as SDRAM control pin

SW6-2

P8_4、P8_[7:6]、P6_4、

P9_[6:3] connection

address selection

OFF

DRP#/Audio = “H”

Used as audio interface pin

ON

DRP#/Audio = “L”

Used as DRP pin

SW6-3

P9_[1 :0]、P1_0、P7_5

connection address selection

OFF

DRP#/Other = “H”

Used as UART and USB interface pins

ON

DRP#/Other = “L”

Used as DRP pin

SW6-4

P6_[3:1]、PE_[6:0]

connection address selection

OFF

Ether1#/CEU = “H”

Used as CEU pin

ON

Ether1#/CEU = “L”

Used as Ethernet PHY1 control pin

SW6-5

P3_[5:1]、PH_5、PK_[4:0]

connection address selection

OFF

Ether2#/NAND = “H”

Used as FLCTL pin

ON

Ether2#/NAND = “L”

Used as Ethernet PHY2 control pin

SW6-6

PJ_[7:6] connection

address selection

OFF

VDC6#/NAND = “H”

Used as FLCTL pin

ON

VDC6#/NAND = “L”

Used as VDC6 pin

SW6-7

P7_[7:4] connection

address selection

OFF

VDC6#/Other = “H”

NC

ON

VDC6#/Other = “L”

Used as VDC6 pin

SW6-8

OFF

NC

ON

NC

SW6-9

P5_3

OFF

P5_3 = “H”

Generic input port P5_3 = “H”

ON

P5_3 = “L”

Generic input board P5_3 = “L”

SW6-10

PC_2

OFF

PC_2 = “H”

Generic input port PC_2 = “H”

ON

PC_2 = “L”

Generic input port PC_2 = “L”

[Note] indicates default setting.

Be sure to turn the board power to off before altering the DIP switch setting.

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

R20UT4398EJ0100 Rev.1.00 3-26

2018.10.11

3.3 External Dimensions

Figure 3.3.1 shows the external dimensions of the RTK79210XXB00000BE C side top view.

＜C side top view＞ unit: mm

Figure 3.3.1 RTK79210XXB00000BE External Dimensions Diagram

RZ/A2M SUB Board RTK79210XXB00000BE Appendix 1

R20UT4398EJ0100 Rev.1.00 Appendix 1-1

2018.10.11

Appendix 1 RTK79210XXB00000BE Connection Diagram

RZ/A2M SUB Board RTK79210XXB00000BE Appendix 1

R20UT4398EJ0100 Rev.1.00 Appendix 1-2

2018.10.11

1

2

3

4

5

RZ/A2M SUB board RTK79210XXB00000BE SCHEMATICS

A A

TITLE

Index Mating MUX1(SDRAM#/Other(=MUX2))

B B

MUX2(DRP#/Audio, CAN, UART, USB) DRP, Audio, CAN, UART Ethernet SD, SIM, USB EEPROM, NAND, SDRAM CMOS, LCD, LVDS Switch

PAGE

1 2 3 4 5 6 7 8 9 10

Note:

Digital GND (GND)

Analog GND (AVss)

Not mounted

D5V = Digital 5V (System Power) D3.3V = Digital 3.3V AVcc = Analog 3.3V for RZ/A2M A3.3V = Analog 3.3V for Audio CODEC EA3.3V = Analog 3.3V for Ethernet PHY

R = Fixed Resistors RA = Resistor Array C = Ceramic Caps CE = Tantalum Electrolytic Caps

C C

CP = Decoupling Caps

D D

Renesas Electronics Corporation.

CHANGE

Renesas Electronics Corporation.

APPROVED

CHECKEDDRAWN

SCALE

DATE

18-10-09

1

2

3

CHECKEDDRAWN

DESIGNED

4

APPROVED

RZ/A2M SUB board

INDEX

R20UT4395EJ0100

5

(

/)

110

(

/)

110

(

/)

110

5

P0_[6:0][3]

P1_[4:0][3,8]

D D

P2_[3:0][3,8]

P3_[5:0][4,6]

P4_[7:0][9]

P5_[7:3][7,9,10]

P6_[7:0][3,4,5]

C C

P7_[7:0][3,9]

P8_[7:0][3,9]

P9_[7:0][3]

IRQ[5:4][6]

B B

P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6

P1_0 P1_1 P1_2 P1_3 P1_4

P2_0 P2_1 P2_2 P2_3

P3_0 P3_1 P3_2 P3_3 P3_4 P3_5

P4_0 P4_1 P4_2 P4_3 P4_4 P4_5 P4_6 P4_7

P5_3 P5_4 P5_5 P5_6 P5_7

P6_0 P6_1 P6_2 P6_3 P6_4 P6_5 P6_6 P6_7

P7_0 P7_1 P7_2 P7_3 P7_4 P7_5 P7_6 P7_7

P8_0 P8_1 P8_2 P8_3 P8_4 P8_5 P8_6 P8_7

P9_0 P9_1 P9_2 P9_3 P9_4 P9_5 P9_6 P9_7

IRQ4 IRQ5

RES#[6,9]

P5_3(SUB's SW6-9) P5_5/SD1_WP P5_7/IRQ3

P6_7/WE0/DQML/DRP03 P7_0/WE1/DQMU/DRP04/SCK1

P7_2/[DV0_CLK]

P7_3/RAS/DRP06/TxD1 PG_2/VIO_D10 P7_5/CKE/DRP08/CTS1/OVRCUR1

P9_6/A14/DRP10/[SSIBCK0]

P7_6/DV0_VSYNC/GTIOC3A P9_5/A13/DRP11/SSIFS0 PB_5/DV0_DATA0/LCD0_DATA23 P9_2/A10/DRP14 PB_3/DV0_DATA2/LCD0_DATA21 PB_1/DV0_DATA4/LCD0_DATA19

PA_6/DV0_DATA7/LCD0_DATA16/SCI_SCK0 PA_4/DV0_DATA9/LCD0_DATA14/SCI_TXD0 PA_5/DV0_DATA8/LCD0_DATA15/SCI_RXD0

PE_1/RMII0_RXD0/VIO_D7

PA_0/DV0_DATA13/LCD0_DATA10 PE_3/RMII0_RXER/VIO_D5

P9_1/A9/DRP15/RxD4

P8_7/A7/DRP17/[RSPCK0]

PE_4/RMII0_CRSDV/VIO_D4 PF_2/DV0_DATA17/LCD0_DATA6 P8_6/A6/DRP18/MOSI0 P8_3/A3/DRP21

P8_4/A4/DRP20/SSL00 PE_5/ET0_MDC/VIO_D3 PH_0/VIO_D1 PE_6/ET0_MDIO/VIO_D2

P6_3/RMII0_TXD1/VIO_HD PF_4/DV0_DATA19/LCD0_DATA4 PF_5/DV0_DATA20/LCD0_DATA3

P6_1/RMII0_TXDEN/[VIO_CLK]

P7_1/RD/WR/DRP05/RxD1 P6_0(CPU's LED-R) P6_6/DRP02 PG_3/VIO_D11

PK_2/RMII1_TXD1/NAF5 P6_5/CS3/DRP01 PF_7/DV0_DATA23/LCD0_DATA0 PK_1/RMII1_TXD0/NAF4

P8_2/A2/DRP22 PH_2/DV0_DATA22/LCD0_DATA1

PJ_6/FCE/[LCD0_CLK]

P0_1/D1/DRP25 P0_5/D5/DRP29 P0_2/D2/DRP26

PJ_1/IRQ0 PH_5/NAF2/ET1_EXOUT PH_6/ET1_WOL

PK_5/NAF1 PG_4/VIO_D15 PG_6/VIO_D13 P1_4/D11

P3_3/ET1_MDC/FWE P1_1/D8/CAN0RX PG_7/VIO_D12 PG_5/VIO_D14

P3_4/ET1_MDIO/FRB P1_3/D10/CAN0TX P3_0/ET1_LINKSTA P2_1/D13

PC_1(CPU's LED-G)

P5_3 P5_5 P5_7 PC_4

P6_7 P7_0

SD1_D1 SD1_D2 SD1_D3 SD1_D0

P7_2

P7_3 PG_2 P7_7 P7_5

P9_6

P7_6 P9_5 PB_5 P9_2 PB_3 PB_1

PA_6 PA_4 PA_5

PE_1

PA_0 PE_3

P9_1

P8_7 PF_1

PE_4 P8_5 PF_2 P8_6 P8_3

P8_4 PE_0 PE_5 PH_0 P6_2 PE_6 PF_6

P6_3 P9_4 PF_4 PF_5 PG_1

P6_1

P7_1 P6_0 PH_1 P6_6 P8_1 PG_3

PK_2 P6_5 PF_7 PK_1

P8_2 PH_2 P0_0

PJ_6

P0_1 P0_5 P0_2

PJ_1 P1_0 PH_5 PH_6

PK_5 PG_4 PG_6 P1_4

P3_3 P4_5 P1_1 PG_7 P4_2 PG_5

P3_4 P1_3 P3_0 P2_1

PC_1 P2_2 P2_3

NMI[10]

4

Front Back

D5VD3.3V D5V AVcc

CN1 2013297-1

TE

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172

737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

169

170

171

172

173

174

175

176

177

178

179

180

181

182

183

184

185

186

187

188

189

190

191

192

193

194

195

196

197

198

199

200

201

202

203

204

FG1

FG2

205

206

3

PA_[7:0] [4,9]

PB_[5:0] [9]

PC_[5:0] [7,9,10]

PD_[7:6] [8,9]

PE_[6:0] [4]

PF_[7:0] [9]

PG_[7:0] [9]

PH_[2:0] [9]

PH_[6:5] [4,6]

PJ_1/DSTBY [6]

PJ_[7:6] [4]

PK_[5:0] [4,8]

SD1_D[3:0] [7]

D3.3V

R173 2.2kΩ

PA_0 PA_1 PA_2 PA_3 PA_4 PA_5 PA_6 PA_7

PB_0 PB_1 PB_2 PB_3 PB_4 PB_5

PC_0 PC_1 PC_2 PC_3 PC_4 PC_5

R174 2.2kΩ

PD_6 PD_7

PE_0 PE_1 PE_2 PE_3 PE_4 PE_5 PE_6

PF_0 PF_1 PF_2 PF_3 PF_4 PF_5 PF_6 PF_7

PG_0 PG_1 PG_2 PG_3 PG_4 PG_5 PG_6 PG_7

PH_0 PH_1 PH_2

PH_5 PH_6

PJ_1

PJ_6 PJ_7

PK_0 PK_1 PK_2 PK_3 PK_4 PK_5

SD1_D0 SD1_D1 SD1_D2 SD1_D3

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

PC_5 PC_3

P5_6

P5_4

P6_4

PB_4 P9_3

IRQ5 IRQ4

PD_7 PD_6

PB_0 PB_2 PA_3

PG_0

PA_2 PA_7 PE_2 PA_1

P9_0 P8_0

PF_0

PK_0

P9_7 P7_4

PF_3

PK_3

PJ_7

P0_4 P0_3 P0_6

P3_2 P3_5

PK_4 P3_1

P4_0 P4_1

P4_4

P4_3

P4_6 P4_7

PC_0 P1_2

P2_0 PC_2

PC_5/VBUSEN1 PC_3/LCD0_TCON4

P5_6/AN006

P5_4/SD1_CD PC_4/LCD0_TCON3

SD1_CLK [7]

SD1_CMD [7]

P6_4/[AUDIO_CLK]/DRP00

PB_4/DV0_DATA1/LCD0_DATA22 P9_3/A11/DRP13/SSIRxD0 P7_7/LCD0_TCON0/DV0_HSYNC

PL_1/MD_CLK/IRQ5 PL_0/MD_CLKS/IRQ4

CKIO [8]

PD_7/RIIC3SDA PD_6/RIIC3SCL

PB_0/DV0_DATA5/LCD0_DATA18 PB_2/DV0_DATA3/LCD0_DATA20 PA_3/DV0_DATA10/LCD0_DATA13

PG_0/VIO_D8

PA_2/DV0_DATA11/LCD0_DATA12 PA_7/DV0_DATA6/LCD0_DATA17/(SCI_RST) PE_2/RMII0_RXD1/VIO_D6 PA_1/DV0_DATA12/LCD0_DATA11

P9_0/A8/DRP16/TxD4 P8_0/DV0_DATA14/LCD0_DATA9 PF_1/DV0_DATA16/LCD0_DATA7 PF_0/DV0_DATA15/LCD0_DATA8 P8_5/A5/DRP19/MISO0

DP1 [7] DM1 [7]

PE_0/[REF50CK0]/VIO_FLD

P6_2/RMII0_TXD0/VIO_VD PF_6/DV0_DATA21/LCD0_DATA2 PK_0/RMII1_TXDEN/NAF3 P9_4/A12/DRP12/SSITxD0

PG_1/VIO_D9 P9_7/A15/DRP09 P7_4/CAS/DRP07/RTS1

PF_3/DV0_DATA18/LCD0_DATA5 PH_1/VIO_D0 P8_1/A1/DRP23

PK_3/[REF50CK1]/NAF6

PJ_7/NAF0/[LCD0_EXTCLK]

P0_0/D0/DRP24 P0_4/D4/DRP28 P0_3/D3/DRP27 P0_6/D6/DRP30

P3_2/RMII1_CRSDV/FRE P3_5/RMII1_RXD1/FCLE

P1_0/D7/[CAN_CLK]/DRP31

PK_4/RMII1_RXD0/NAF7 P3_1/RMII1_RXER/FALE

P4_0/TXOUT0P P4_1/TXOUT0M

P4_4/TXOUT2P P4_5/TXOUT2M

P4_2/TXOUT1P P4_3/TXOUT1M

P4_6/TXCLKOUTP P4_7/TXCLKOUTM

PC_0/VBUSIN1 P1_2/D9 P2_2/D14/CAN1TX P2_0/D12/CAN1RXP2_3/D15 PC_2(SUB's SW6-10)

D5V D3.3V AVcc

2

1

+

CE16 _47µF/10V

A A

SCALE

CHANGE

5

4

DATE

+

CE17 _47µF/10V

CE18 _47µF/10V

CE19 _47µF/10V+CE21 _47µF/10V

CE20 _47µF/10V

CE22 _47µF/10V

18-10-09

3

Renesas Electronics Corporation.

2

APPROVED

DRAWN

DESIGNEDCHECKED

RZ/A2M SUB board

SODIMM Connector

R20UT4395EJ0100

1

( / )210

5

4

3

2

1

P0_[6:0][2]

P1_[4:0][2,8]

D D

P2_[3:0][2,8]

P6_[7:0][2,4,5]

P7_[7:0][2,9]

P8_[7:0][2,9]

P9_[7:0][2]

C C

B B

A A

P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6

P1_0 P1_1 P1_2 P1_3 P1_4

P2_0 P2_1 P2_2 P2_3

P6_0 P6_1 P6_2 P6_3 P6_4 P6_5 P6_6 P6_7

P7_0 P7_1 P7_2 P7_3 P7_4 P7_5 P7_6 P7_7

P8_0 P8_1 P8_2 P8_3 P8_4 P8_5 P8_6 P8_7

P9_0 P9_1 P9_2 P9_3 P9_4 P9_5 P9_6 P9_7

SDRAM#/Other

SWx-1[10]

DB9

DB11

DB13

DB15

DRP2

P0_0

P0_1

P0_2

P0_3

P0_4

P0_5

P0_6

P1_0

P1_1

P1_3

P2_0

P2_2

P6_5

P6_7

P7_0

P7_1

P7_3

P7_4

P7_5

D3.3V

CP1

0.1µF

CP4

0.1µF

CP7

0.1µF

CP9

0.1µF

CP12

0.1µF

4

7

9

12

16

4

7

9

12

16

4

7

9

12

16

4

7

9

12

16

4

7

9

12

16

SDRAM#/Other

U1 SN74CB3Q3257

Texas Instruments

1A

2A

3A

4A

Vcc

U4 SN74CB3Q3257

Texas Instruments

1A

2A

3A

4A

Vcc

U7 SN74CB3Q3257

Texas Instruments

1A

2A

3A

4A

Vcc

U9 SN74CB3Q3257

Texas Instruments

1A

2A

3A

4A

Vcc

U12 SN74CB3Q3257

Texas Instruments

1A

2A

3A

4A

Vcc

MUX

S1OE

MUX

S1OE

MUX

S1OE

MUX

S1OE

MUX

S1OE

1B1

1B2 2B1

2B2 3B1

3B2 4B1

4B2

GND

15

1B1

1B2 2B1

2B2 3B1

3B2 4B1

4B2

GND

15

1B1

1B2 2B1

2B2 3B1

3B2 4B1

4B2

GND

15

1B1

1B2 2B1

2B2 3B1

3B2 4B1

4B2

GND

15

1B1

1B2 2B1

2B2 3B1

3B2 4B1

4B2

GND

15

U2 SN74CB3Q3257

2

DB0

3

DRP24

5

DB1

6

DRP25

11

DB2

10

DRP26

14

DB3

13

DRP27

8

2

DB4

3

DRP28

5

DB5

6

DRP29

11

DB6

10

DRP30

14

DB7

2_P1_0

13

8

2

DB8

3 5

DB10

6 11

DB12

10 14

DB14

13

8

2

3

DRP1

5

6

DRP3

1_P7_0

11

10

DRP4

1_P7_1

14

13

DRP5

8

1_P7_3

2

3

DRP6

1_P7_4

5

6

DRP7

1_P7_5

11

2_P7_5

10 14

13

8

P8_1

4

P8_2

7

P8_3

9

12

D3.3V

16

CP2

0.1µF

P8_4

4

P8_5

7

P8_6

9

P8_7

12

D3.3V

16

CP5

0.1µF

P9_0

4

P9_1

7

P9_2

9

P9_3

12

D3.3V

16

CP8

0.1µF

P9_4

4

P9_5

7

P9_6

9

P9_7

12

D3.3V

16

CP10

0.1µF

2_P1_1/CAN0RX [5] 2_P1_3/CAN0TX [5] 2_P2_0/CAN1RX [5] 2_P2_2/CAN1TX [5]

Texas Instruments

1A

2A

3A

4A

MUX

S1OE

MUX

S1OE

MUX

S1OE

MUX

S1OE

GND

15

GND

15

GND

15

GND

15

CAN

Vcc

U5 SN74CB3Q3257

Texas Instruments

1A

2A

3A

4A

Vcc

U8 SN74CB3Q3257

Texas Instruments

1A

2A

3A

4A

Vcc

U10 SN74CB3Q3257

Texas Instruments

1A

2A

3A

4A

Vcc

2

A1

1B1

3

DRP23

1B2

5

A2

2B1

6

DRP22

2B2

11

A3

3B1

10

DRP21

3B2

14

4B1

13

4B2

8

2

A4

1B1

2_P8_4

3

1B2

5

A5

2B1

6

DRP19

2B2

11

A6

3B1

2_P8_6

10

3B2

14

A7

4B1

2_P8_7

13

4B2

8

2

A8

1B1

2_P9_0

3

1B2

5

A9

2B1

2_P9_1

6

2B2

11

A10

3B1

10

DRP14

3B2

14

A11

4B1

2_P9_3

13

4B2

8

2

A12

1B1

2_P9_4

3

1B2

5

A13

2B1

2_P9_5

6

2B2

11

A14

3B1

2_P9_6

10

3B2

14

A15

4B1

13

DRP9

4B2

8

DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15

1_P7_0 1_P7_1

1_P7_3 1_P7_4 1_P7_5

1_P6_5/CS3 [8] 1_P6_7/DQML [8]

DB[15:0] [2,8]

A[15:1] [8]

1_P7_[1:0] [8]

P7_0/WE1/DQMU/(DRP04)/(SCK1) P7_1/RD/WR/(DRP05)/(RxD1)

1_P7_[5:3] [8]

P7_3/RAS/(DRP06)/(TxD1) P7_4/CAS/(DRP07)/(RTS1) P7_5/CKE/(DRP08)/(CTS1)

SDRAM

DRP#/Audio

SWx-2[10]

DRP#/USB, CAN, UART

SWx-3[10]

DRP#/Audio

U3 SN74CB3Q3257

Texas Instruments

2_P8_4

4

1A

2_P8_6

7

2A

2_P8_7

9

3A

P6_4

12

4A

D3.3V

2_P9_3

2_P9_4

2_P9_5

2_P9_6

D3.3V

CP3

0.1µF

CP6

0.1µF

MUX

16

Vcc

S1OE

U6 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

12

4A

MUX

16

Vcc

S1OE

DRP#/UART, CAN, USB

U11 SN74CB3Q3257

Texas Instruments

2_P9_0

4

1A

2_P9_1

7

2A

2_P1_0

9

3A

2_P7_5

12

4A

D3.3V

CP11

0.1µF

MUX

16

Vcc

S1OE

DRP0

2

DRP20

1B1

3

1B2

5

2B1

6

2B2

11

3B1

10

3B2

14

4B1

13

4B2

8

GND

15

2

1B1

3

1B2

5

2B1

6

2B2

11

3B1

10

3B2

14

4B1

13

4B2

8

GND

15

2

1B1

3

1B2

5

2B1

6

2B2

11

3B1

10

3B2

14

4B1

13

4B2

8

GND

15

P8_4/(A4)/(DRP20)/SSL00

22_P8_4/SSL00 [5]

DRP18

P8_6/(A6)/(DRP18)/MOSI0

22_P8_6

DRP17

P8_7/(A7)/(DRP17)/RSPCK0

22_P8_7

DRP0

2_P6_4/AUDIO_CLK [5]

P6_4/(DRP00)/AUDIO_CLK

DRP13

P9_3/(A11)/(DRP13)/SSIRxD0

22_P9_3

DRP12

P9_4/(A12)/(DRP12)/SSITxD0

22_P9_4

DRP11

P9_5/(A13)/(DRP11)/SSIFS0

22_P9_5

DRP10

P9_6/(A14)/(DRP10)/SSIBCK0

22_P9_6

DRP16

22_P9_0/TxD4 [5]

DRP15

22_P9_1/RxD4 [5]

DRP31

22_P1_0/CAN_CLK [5]

DRP8

22_P7_5/OVRCUR1 [7]

DRP1

DRP2

DRP3 DRP4 DRP5 DRP6 DRP7

DRP8

DRP9

DRP10 DRP11 DRP12 DRP13

DRP14

DRP15 DRP16 DRP17 DRP18

DRP19

DRP20

DRP21 DRP22 DRP23 DRP24 DRP25 DRP26 DRP27 DRP28 DRP29 DRP30

DRP31

22_P8_6 22_P8_7

22_P9_3 22_P9_4 22_P9_5 22_P9_6

DRP[31:0] [2,5]

22_P8_[7:6] [5]

22_P9_[6:3] [5]

CHANGE

Renesas Electronics Corporation.

2

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-09

5

4

18-10-09

3

DRAWN

DESIGNEDCHECKED

RZ/A2M SUB board

MUX1(SDRAM#/Other)

R20UT4395EJ0100

1

( / )310

5

4

3

2

1

P6_[7:0][2,3,5]

PE_[6:0][2]

D D

P3_[5:0][2,6]

PH_[6:5][2,6]

PK_[5:0][2,8]

PJ_[7:6][2]

PA_[7:0][2,9]

C C

P6_0 P6_1 P6_2 P6_3 P6_4 P6_5 P6_6 P6_7

PE_0 PE_1 PE_2 PE_3 PE_4 PE_5 PE_6

P3_0 P3_1 P3_2 P3_3 P3_4 P3_5

PH_5 PH_6

PK_0 PK_1 PK_2 PK_3 PK_4 PK_5

PJ_6 PJ_7

PA_0 PA_1 PA_2 PA_3 PA_4 PA_5 PA_6 PA_7

Ether1#/CEU

SWx-4[10]

P6_1

P6_2

P6_3

PE_0

PE_1

PE_2

PE_3

PE_4

PE_5

PE_6

D3.3V

CP13

0.1µF

CP16

0.1µF

CP18

0.1µF

12

16

12

16

12

16

Ether1#/CEU

U13 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

4A

MUX

Vcc

S1OE

15

U16 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

4A

MUX

Vcc

S1OE

15

U18 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

4A

MUX

Vcc

S1OE

15

Ether2#/NAND

U14 SN74CB3Q3257

1_P6_1

2

1B1

2_P6_1

3

1B2

1_P6_2

5

2B1

2_P6_2

6

2B2

1_P6_3

11

3B1

2_P6_3

10

3B2

14

4B1

13

4B2

8

GND

1_PE_0

2

1B1

2_PE_0

3

1B2

1_PE_1

5

2B1

2_PE_1

6

2B2

1_PE_2

11

3B1

2_PE_2

10

3B2

1_PE_3

14

4B1

2_PE_3

13

4B2

8

GND

1_PE_4

2

1B1

2_PE_4

3

1B2

1_PE_5

5

2B1

2_PE_5

6

2B2

1_PE_6

11

3B1

2_PE_6

10

3B2

14

4B1

13

4B2

8

GND

Ether2#/NAND

SWx-5[10]

P3_1

P3_2

P3_3

P3_4

P3_5

PH_5

PK_0

PK_1

PK_2

PK_3

PK_4

D3.3V

CP14

0.1µF

CP17

0.1µF

CP19

0.1µF

Texas Instruments

4

1A

7

2A

9

3A

12

4A

MUX

16

Vcc

S1OE

U17 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

12

4A

MUX

16

Vcc

S1OE

U19 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

12

4A

MUX

16

Vcc

S1OE

1_P3_1

2

1B1

2_P3_1

3

1B2

1_P3_2

5

2B1

2_P3_2

6

2B2

1_P3_3

11

3B1

2_P3_3

10

3B2

1_P3_4

14

4B1

2_P3_4

13

4B2

8

GND

15

1B1

1B2 2B1

2B2 3B1

3B2 4B1

4B2

GND

15

1B1

1B2 2B1

2B2 3B1

3B2 4B1

4B2

GND

15

VDC6#/NAND

SWx-6[10]

1_P3_5

2

2_P3_5

3

1_PH_5

5

2_PH_5

6

1_PK_0

11

2_PK_0

10

1_PK_1

14

2_PK_1

13

8

1_PK_2

2

2_PK_2

3

1_PK_3

5

2_PK_3

6

1_PK_4

11

2_PK_4

10 14

13

8

VDC6#/SIM

SWx-7[10]

PJ_6

PJ_7

PA_4

PA_5

PA_6

PA_7

D3.3V

CP20

0.1µF

CP15

0.1µF

VDC6#/NAND

U15 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

12

4A

MUX

16

Vcc

S1OE

VDC6#/SIM

U20 SN74CB3Q3257

Texas Instruments

4

1A

7

2A

9

3A

12

4A

MUX

16

Vcc

S1OE

1_P6_1 1_P6_2

1_PJ_6

2

1B1

2_PJ_6

3

1B2

1_PJ_7

5

2B1

2_PJ_7

6

2B2

11

3B1

10

3B2

14

4B1

13

4B2

8

GND

15

1_PA_4

2

1B1

2_PA_4

3

1B2

1_PA_5

5

2B1

2_PA_5

6

2B2

1_PA_6

11

3B1

2_PA_6

10

3B2

1_PA_7

14

4B1

2_PA_7

13

4B2

8

GND

15

1_P6_3

1_PE_0 1_PE_1 1_PE_2 1_PE_3 1_PE_4 1_PE_5 1_PE_6

2_P6_1 2_P6_2 2_P6_3

2_PE_0 2_PE_1 2_PE_2 2_PE_3 2_PE_4 2_PE_5 2_PE_6

1_P3_1 1_P3_2 1_P3_3 1_P3_4 1_P3_5

1_PH_5

1_PK_0 1_PK_1 1_PK_2 1_PK_3 1_PK_4

2_P3_1 2_P3_2 2_P3_3 2_P3_4 2_P3_5

2_PH_5

2_PK_0 2_PK_1 2_PK_2 2_PK_3 2_PK_4

2_PJ_6 2_PJ_7

1_PJ_6 1_PJ_7

1_PA_4 1_PA_5 1_PA_6 1_PA_7

2_PA_4 2_PA_5 2_PA_6 2_PA_7

1_P6_[3:1] [6]

1_PE_[6:0] [6]

2_P6_[3:1] [9]

2_PE_[6:0] [9]

1_P3_[5:1] [6]

1_PH_5 [6]

1_PK_[4:0] [6]

2_P3_[5:1] [8]

2_PH_5 [8]

2_PK_[4:0] [8]

2_PJ_[7:6] [8]

1_PJ_[7:6] [9]

1_PA_[7:4] [9]

2_PA_[7:4] [7]

Ether1

CEU

Ether2

NAND

VDC6

SIM

B B

A A

Renesas Electronics Corporation.

CHANGE

Renesas Electronics Corporation.

2

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-09

5

4

18-10-09

3

DRAWN

DESIGNEDCHECKED

RZ/A2M SUB board

MUX2(Ether#, VDC6#/CEU, NAND, SIM)

R20UT4395EJ0100

( / )410

1

( / )410

5

DRP[31:0][2,3]

D D

22_P8_[7:6][3]

22_P9_[6:3][3]

C C

P1_3/(D10)/CAN0TX

P1_1/(D8)/CAN0RX

B B

P2_2/(D14)/CAN1TX

P2_0/(D12)/CAN1RX

A A

DRP0

DRP1

DRP2

DRP3 DRP4 DRP5 DRP6 DRP7

DRP8

DRP9

DRP10 DRP11 DRP12 DRP13

DRP14

DRP15 DRP16 DRP17 DRP18

DRP19

DRP20

DRP21 DRP22 DRP23 DRP24 DRP25 DRP26 DRP27 DRP28 DRP29 DRP30

DRP31

22_P8_6 22_P8_7

22_P9_3 22_P9_4 22_P9_5 22_P9_6

2_P1_3/CAN0TX[3]

2_P1_1/CAN0RX[3]

2_P2_2/CAN1TX[3]

2_P2_0/CAN1RX[3]

DRP

D5V D5V

DRP0 DRP2

DRP5 DRP7

DRP8 DRP10

DRP13 DRP15 DRP16 DRP18

DRP21 DRP23 DRP24 DRP26

DRP29

DRP31

Audio

X2

D3.3V D3.3V

_SG-8002DC

EPSON

VCC

GND

4

CAN1

U24 _TJF1051T/3

NXP

TxD

RxD

VIO

8

CAN2

U26 _TJF1051T/3

NXP

TxD

RxD

VIO

8

1

OE

5

OUT

CANH

CANL

VCC

GND

S

2

CANH

CANL

VCC

GND

S

2

8

CP30

0.1µF

D3.3V

22kΩ

R31

R28

1

4

5

CP35

0.1µF

D3.3V

22kΩ

R41

R40

1

4

D3.3V D5V

5

CP39

0.1µF

CP22 0.1µF

7

6

3

7

6

3

D3.3V

CP23 0.1µF

R24

22Ω

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

D5VD3.3V

CP36

0.1µF

CP40

0.1µF

4

DRP

CN2 HIF3FC-40PA-2.54DSA

HRS

P1_0/(D7)/(DRP31)/CAN_CLK

D3.3V

CP24 0.1µF

22_P1_0/CAN_CLK [3]

1 2 3

62Ω

R33

R34

C21

0.1µF

1 2 3

62Ω

R42

R43

C23

0.1µF

CN6 _B3P-SHF-1AA(LF)(SN)

JST

CN7 _B3P-SHF-1AA(LF)(SN)

JST

CP25 0.1µF

DRP1 DRP3 DRP4 DRP6

DRP9

DRP11 DRP12

DRP14

DRP17

DRP19

DRP20

DRP22

DRP25 DRP27 DRP28 DRP30

P9_1/(A9)/(DRP15)/RxD4

22_P9_1/RxD4[3]

P9_0/(A8)/(DRP16)/TxD4

22_P9_0/TxD4[3]

3

P9_6/(A14)/(DRP10)/SSIBCK0

P9_4/(A12)/(DRP12)/SSITxD0

P9_3/(A11)/(DRP13)/SSIRxD0

P8_7/(A7)/(DRP17)/RSPCK0

P8_6/(A6)/(DRP18)/MOSI0

P8_4/(A4)/(DRP20)/SSL00

3.3V <- 5V

U22

D3.3V USB5V

SN74LVC2T45DCT

TI

VCCA1VCCB

2

A0

3

A1 GND4DIR

CP31 0.1µF

3.3V -> 5V

U25 SN74LVC2T45DCT

TI

VCCA1VCCB

2

A0

3

A1 GND4DIR

R36 22kΩ

R35 22kΩ

CP33 0.1µF

P6_4/(DRP00)/AUDIO_CLK

2_P6_4/AUDIO_CLK[3]

X1 SG-8002DC_11.2896MHz

D3.3V D3.3V

EPSON

8

OE

VCC

CP21

0.1µF

22_P8_4/SSL00[3]

B0 B1

22_P9_6

22_P9_4

22_P9_5

22_P9_3

22_P8_7

22_P8_6

OUT

GND

4

R175 22Ω R176 22Ω R177 22Ω

8 7 6 5

R26 22kΩ

R25 22kΩ

CP32 0.1µF

USB5VD3.3V

8 7 6 5

CP34 0.1µF

1

5

22kΩ

R5

R11

X3 CX2520DB12000

KCD

C19

D3.3V

22kΩ

R8

R6

R7

R13

R12

C13

_18pF

_22kΩ

R23

R27 1MΩ

R29 0Ω

1 3

2

4

10pF

2

R1 22Ω R2 22Ω

CE1

22µF/10V

Audio CODEC

A3.3V D3.3V

+

U21 WM8978GEFL/V

11

8

10

7

9

R16 22Ω

18

16

17

27

15

+

CE6

4.7µF/10V

MCLK

BCLK

DACDAT

LRC

ADCDAT

MODE

SCLK

SDIN

VMID

CSB/GPIO1

PAD

33

13

31

AVDD

DCVDD

AGND

12

28

14

DGND

26

32

MICBIAS

DBVDD

SPKVDD

2

LIN

1

LIP

3

L2/GPIO2

5

RIN

4

RIP

6

R2/GPIO3

19

C11 0.1µF

AUXL

20

C12 0.1µF

AUXR

LOUT1

ROUT1

LOUT2

ROUT2

OUT3

OUT4

SPKGND

24

30

CE4 47µF/10V

29

CE5 47µF/10V

25

23

22

21

+

C9 1µF

C10 1µF

R17 47kΩ

R18 47kΩ

R21 20kΩ

C14 220pF

R14 2.2kΩ

R22 20kΩ

CE3

4.7µF/10V

R15 2.2kΩ

AGND

R19 220Ω

R20 220Ω

C15 220pF

AGND

U23 RL78/G1C

Renesas

16

P51 / INTP2 / SO00 / TXD0 / TOOLTXD / (TI01) / (TO01)

15

P50 / INTP1 / SI00 / RXD0 / TOOLRXD / SDA00 / (TI02) / (TO02)

5

P121 / X1

4

P122 / X2 / EXCLK

3

P137 / INTP0

9

P60 / SCLA0

R3222kΩ

10

P61 / SDAA0

11

P62

12

P31 / TI03 / TO03 / INTP4 / PCLBUZ0

13

C20

10pF

P70 / PCLBUZ1

14

P30 / INTP3 / SCK00 / SCL00 / (TI03) / (TO03) / (PCLBUZ0)

17

P17 / TI02 / TO02

18

P16 / TI01 / TO01 / INTP5

19

IC1

20

IC2

25

P24 / ANI4

26

P23 / ANI3

27

P22 / ANI2

28

P21 / ANI1 / AVREFM

29

P20 / ANI0 / AVREFP

30

P01 / ANI16 / TO00 / INTP9 / SCK01 / SCL01 / (SCLA0)

31

P00 / ANI17 / TI00 / INTP8 / SI01 / SDA01 / (SDAA0)

32

P120 / ANI19 / SO01 / (PCLBUZ1)

P40 / TOOL0

EXP

33

C22 1µF

RESET#

REGC6VSS

7

UVBUS

UDM0 UDP0

UVDD

R30 100Ω

22 23 24

C17 1µF

C18 1µF

1 2

USB5V

8

VDD

21

+

CE9 10µF/16V

CP37 0.33µF

CP38 0.1µF

+

USB5V

R39 100kΩ

CE2

+

22µF/10V

2

3 1

2

3 1

R184

0Ω

USB Micro-B

CN5 ZX62-B-5PA(11)

HRS

1 2 3 5

1

AGND

VBus DD+ GND

R37 10kΩ

R3 47kΩ

D1 _1N4148W-V

DNF

C1

0.1µF

C5 220pF

FRAME

R38 1kΩ

C2

0.1µF

C6 220pF

R9 47kΩ

CN3 STX-3500-3NTR

KyconP9_5/(A13)/(DRP11)/SSIFS0

CN4 STX-3500-3NTR

CP26 0.1µF

CP27 0.1µF

AGND

L1 BLM21PG300SN1D

4

ID

9

FG3

8

FG2

7

FG1

6

USB5V

R10 47kΩ

CE7 10µF/16V

J1 _WM-6-5P

MAC8

1 2 3 4 5

DNF

C4

C3

0.1µF

C7 220pF

R4 47kΩ

C8 220pF

AGND

D3.3VA3.3V

+

CE8 10µF/16V

CP29 0.1µF

CP28 0.1µF

A3.3VD3.3V

C16

0.1µF

AGND

CHANGE

Renesas Electronics Corporation.

2

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-09

5

4

18-10-09

3

DRAWN

DESIGNEDCHECKED

RZ/A2M SUB board

DRP, Audio, CAN, UART

R20UT4395EJ0100

1

( / )510

5

4

3

2

1

1_P6_[3:1][4]

1_PE_[6:0][4]

D D

C C

B B

IRQ[5:4][2]

1_P3_[5:1][4]

1_PH_5[4]

1_PK_[4:0][4]

P3_[5:0][2,4]

PH_[6:5][2,4]

1_P6_1 1_P6_2 1_P6_3

1_PE_0 1_PE_1 1_PE_2 1_PE_3 1_PE_4 1_PE_5 1_PE_6

IRQ4 IRQ5

1_P3_1 1_P3_2 1_P3_3 1_P3_4 1_P3_5

1_PH_5

1_PK_0 1_PK_1 1_PK_2 1_PK_3 1_PK_4

P3_0

PH_6 PH_6

Ether1

Ether1 & 2

Ether2

1_PH_5

TP1 ET1_EXOUT

TP2 ET1_WOL

PH_5/(NAF2)/ET1_EXOUT

PH_6/ET1_WOL

2.2kΩ

4.7kΩ

R44

PE_5/ET0_MDC/(VIO_D3) PE_6/ET0_MDIO/(VIO_D2)

PE_0/REF50CK0/(VIO_FLD) P6_2/RMII0_TXD0/(VIO_VD) P6_3/RMII0_TXD1/(VIO_HD)

P6_1/RMII0_TXDEN/(VIO_CLK)

PE_1/RMII0_RXD0/(VIO_D7) PE_2/RMII0_RXD1/(VIO_D6)

PE_3/RMII0_RXER/(VIO_D5)

PE_4/RMII0_CRSDV/(VIO_D4)

PL_0/(MD_CLKS)/IRQ4

RES#[2,9]

PJ_1/DSTBY[2]

PJ_1/IRQ0

JP1 A2-3PA-2.54DSA(71)

1

2 3

JP2 A2-1PA-2.54DSA(71)

HRS

CP49

0.1µF

PJ_1/IRQ0 [10]

X4 KC2016K50.000

D3.3V D3.3V

Kyocera

4

1

Vcc

EN

3

OUT

GND

2

P3_0/ET1_LINKSTA

R59 22Ω

R71 22Ω

P3_3/ET1_MDC/(FWE) P3_4/ET1_MDIO/(FRB)

PK_3/REF50CK1/(NAF6) PK_1/RMII1_TXD0/(NAF4) PK_2/RMII1_TXD1/(NAF5)

PK_0/RMII1_TXDEN/(NAF3)

PK_4/RMII1_RXD0/(NAF7) P3_5/RMII1_RXD1/(FCLE)

P3_1/RMII1_RXER/(FALE)

P3_2/RMII1_CRSDV/(FRE)

PL_1/(MD_CLK)/IRQ5

1_PE_5 1_PE_6

1_PE_0 1_P6_2 1_P6_3

1_P6_1

1_PE_1

0:LED, 1:WOL

1_PE_2

0:REFCLK OUT, 1:IN 0:MII, 1:RMII 0:UTP, 1:Fiber

1_PE_3

1_PE_4

IRQ4

P3_0

1_P3_3 1_P3_4

1_PK_3 1_PK_1 1_PK_2

1_PK_0

1_PK_4

0:LED, 1:WOL

1_P3_5

0:REFCLK OUT, 1:IN 0:MII, 1:RMII 0:UTP, 1:Fiber

1_P3_1

1_P3_2

IRQ5

R52

R54

R55

R72

R73

R74

R45

22Ω

4.7kΩ _4.7kΩ

R57

R56

4.7kΩ

2.2kΩ

R61

R60

22Ω

4.7kΩ _4.7kΩ

R75

R76

Analog power supply for Ethernet PHY

D3.3V EA3.3V

L2 BLM21PG300SN1D

D3.3V

4.7kΩ

Ethernet PHY1(Adr=0x07)

U27 RTL8201FL

R47

R48

Realtek

R46

30

MDC (I/PU)

31

MDIO (IO/PU)

22

TXC (O/PD)

23

TXD[0] (I/PD)

24

TXD[1] (I/PD)

NC

25

TXD[2] (I/PD)

NC

26

TXD[3] (I/PD)

27

TXEN (I/PD)

NC

12

TXER (I/PD)

NC

19

RXC (O/PD)

14

RXD[0] (O/PD)

16

RXD[1] (LI/O/PD)

NC

17

RXD[2] (O/PD)

NC

18

RXD[3]/CLK_CTL (LI/O/PD)

13

RXDV (LI/O/PD)

39

RXER/FXEN (LI/O/PD)

36

CRS/CRS_DV (O/PD)

NC

38

COL (O/PD)

32

INTB (O/OD)

10

PMEB (O/OD)

29

PHYRSTB (I/HZ)

43

CKXTAL2 (IO)

42

CKXTAL1 (I)

D3.3V D3.3V

4.7kΩ

Ethernet PHY2(Adr=0x07)

U28 RTL8201FL

R63

R62

R64

Realtek

30

MDC (I/PU)

31

MDIO (IO/PU)

22

TXC (O/PD)

23

TXD[0] (I/PD)

24

TXD[1] (I/PD)

NC

25

TXD[2] (I/PD)

NC

26

TXD[3] (I/PD)

27

TXEN (I/PD)

NC

12

TXER (I/PD)

NC

19

RXC (O/PD)

14

RXD[0] (O/PD)

16

RXD[1] (LI/O/PD)

NC

17

RXD[2] (O/PD)

NC

18

RXD[3]/CLK_CTL (LI/O/PD)

13

RXDV (LI/O/PD)

39

RXER/FXEN (LI/O/PD)

36

CRS/CRS_DV (O/PD)

NC

38

COL (O/PD)

32

INTB (O/OD)

10

PMEB (O/OD)

29

PHYRSTB (I/HZ)

43

CKXTAL2 (IO)

42

CKXTAL1 (I)

+

LED0/PHYAD[0] (LI/O/PU) LED1/PHYAD[1] (LI/O/PD)

DVDD10OUT

AVDD10OUT

GND

GND33GND

RSET (I)

7

20

47

46

R58

2.49kΩ, 1%

LED0/PHYAD[0] (LI/O/PU) LED1/PHYAD[1] (LI/O/PD)

DVDD10OUT

AVDD10OUT

GND

GND33GND

RSET (I)

7

20

47

46

R77

2.49kΩ, 1%

CE10 22µF/10V

MDI+[0]

MDI-[0]

MDI+[1]

MDI-[1]

AVDD33 AVDD33

DVDD33 DVDD33 DVDD33

DVDD10

MDI+[0]

MDI-[0]

MDI+[1]

MDI-[1]

AVDD33 AVDD33

DVDD33 DVDD33 DVDD33

DVDD10

D3.3V

4.7kΩ

CN8 J3011G21DNL

R50

Pulse

R49

CP43 0.1µF

R66 0Ω

CP52 0.1µF

D3.3V

CP44 0.1µF

D3.3V

CP53 0.1µF

C24

0.01µF

C25

0.01µF

CP45 0.1µF

D3.3V

4.7kΩ

R67

C26

0.01µF

C27

0.01µF

CP54 0.1µF

4.7kΩ

R68

CP46 0.1µF

CP55 0.1µF

CP47 0.1µF

CP56 0.1µF

2

11

3

TD+

5

CT1

4

TD-

7

RD+

6

CT2

8

RD-

10

CAP

CP48 0.1µF

CN9 J3011G21DNL

Pulse

2

11

3

TD+

5

CT1

4

TD-

7

RD+

6

CT2

8

RD-

10

CAP

CP57 0.1µF

LED-K(Y) LED-K(G)

0.01uF

34 35

1

2

3

NC1

8

NC2

4

5

9

NC3

11

NC4

44

NC5

45

EA3.3V

NC6

6 41

15 21 37

40 28

48

CP42 0.1µF

CP41 0.1µF

R65 _0Ω

34 35

1

2

3

NC1

8

NC2

4

5

9

NC3

11

NC4

44

NC5

45

EA3.3V

NC6

6 41

15 21 37

40 28

48

CP50 0.1µF

CP51 0.1µF

LED-A(Y) LED-A(G)

PAD113PAD2

14

LED-A(Y)

LED-A(G)

PAD113PAD2

14

1 12

TX+

TX-

RX+

RX-

9

NC

1 12

TX+

TX-

RX+

RX-

9

NC

D3.3V

R51 510Ω

R69 510Ω

R53 510Ω

R70 510Ω

A A

Renesas Electronics Corporation.

CHANGE

Renesas Electronics Corporation.

2

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-09

5

4

18-10-09

3

DRAWN

DESIGNEDCHECKED

RZ/A2M SUB board

Etrhernet

R20UT4395EJ0100

1

( / )610

1

2

3

4

5

SD1_D[3:0][2]

P5_[7:3][2,9,10]

PC_[5:0][2,9,10]

A A

2_PA_[7:4][4]

B B

SD1_D0 SD1_D1 SD1_D2 SD1_D3

P5_3 P5_4 P5_5 P5_6 P5_7

PC_0 PC_1 PC_2 PC_3 PC_4 PC_5

2_PA_4 2_PA_5 2_PA_6 2_PA_7

P7_5/(CKE)/(DRP08)/(CTS1)/OVRCUR1

SD card

USB

SIM

PC_5/VBUSEN1

SD1_D3 SD1_CMD

SD1_CLK

SD1_DAT0 SD1_DAT1 SD1_DAT2

P5_5/SD1_WP P5_4/SD1_CD

PC_5

22_P7_5/OVRCUR1[3]

SD1_D3

SD1_CMD[2]

SD1_CLK[2]

SD1_D0 SD1_D1 SD1_D2

P5_5 P5_4

R97 22kΩ

R96 22kΩ

D3.3V

_22kΩ

R78

22kΩ

R81

R82

R80

R79

U29 MIC2025-1YM

MICREL

1

EN

2

FLG

3

GND

NC14NC2

FLG=Open-drain

22kΩ

R83

D3.3VD3.3V

22kΩ

R84

OUT2

OUT1

R85

D3.3V

R86

22Ω

R87

22Ω

R88

22Ω

R89

22Ω

R90

22Ω

R91

22Ω

R92

22Ω

R93

22Ω

D5V

8

7

IN

6

5

CP60

0.1µF

C28

0.1µF

SD Card Slot

CN10 DM1B-DSF-PEJ

HRS

1

CD/DAT3

2

CMD

3

VSS1

4

VDD

5

CLK

6

VSS2

7

DAT0

8

DAT1

9

DAT2

10

W_Protect

11

Card_Detect

12

COMMON

+

CE11 150µF/16V

PAD1 PAD2 PAD3 PAD4 PAD5 PAD6

13 14 15 16 17 18

PA_6/(DV0_DATA7)/(LCD0_DATA16)/SCI_SCK0 PA_4/(DV0_DATA9)/(LCD0_DATA14)/SCI_TXD0 PA_5/(DV0_DATA8)/(LCD0_DATA15)/SCI_RXD0 PA_7/(DV0_DATA6)/(LCD0_DATA17)/RES-Ctrl

2_PA_6 2_PA_4 2_PA_5 2_PA_7

D3.3V

microSIM Card

1 2

JP3 _HWP-2P- G

CN11 _78646-3001

R95 1kΩ

R94 22kΩ

molex

R179 22kΩ

C3

CLK

C7

I/O

C2

RST

GNDC9GND

GND

C10

C11

C12

C13

C14

D3.3V D3.3V

C1

Vcc

C6

Vpp

C4

CP58

RFU1

C8

RFU2

C5

GND

0.1µF

CP59

0.1µF

L3

DNF

_L600

DNF

DM1[2]

PC_0

DP1[2]

PC_0/VBUSIN1

C C

D D

CHANGE

1

L4

14

_DLW21HN900SQ2

C30

R99

4.7µF

1.8kΩ

2

23

4

3

1 5

2

R98

1kΩ

C29 1µF

DNF

D2

_HZM6.2Z4MFA

USB Socket-A (Reverse Type)

CN12 UBA-R4R-D14-4D

JST

1

VBus

2

D-

3

D+

4

GND

USB Mini-B

CN13 KMBX-SMT-5S-S-30TR

Kycon

VBUS

1

VBus

2

D-

3

D+

5

GND

DNF

L5

_L600

SCALE

DATE

18-10-09

FRAME

3

6

FG2

5

FG1

4

ID

9

FG3

8

FG2

7

FG1

6

TP3 USB_ID

Renesas Electronics Corporation.

4

APPROVED

DRAWN

DESIGNEDCHECKED

RZ/A2M SUB board

SD, SIM, USB

R20UT4395EJ0100

5

( / )710

1

2

3

4

5

1_P7_[1:0][3]

1_P7_[5:3][3]

PD_[7:2][2,9]

2_P3_[5:1][4]

A A

2_PH_5[4]

2_PJ_[7:6][4]

2_PK_[4:0][4]

PK_[5:0][2,4]

B B

1_P7_0 1_P7_1

1_P7_3 1_P7_4 1_P7_5

PD_6 PD_7

2_P3_1 2_P3_2 2_P3_3 2_P3_4 2_P3_5

2_PH_5

2_PJ_6 2_PJ_7

2_PK_0 2_PK_1 2_PK_2 2_PK_3 2_PK_4

PK_0 PK_1 PK_2 PK_3 PK_4 PK_5

SDRAM

EEPROM

NAND

DB[15:0][2,3]

DB[15:0]

DB15 DB14 DB13 DB12

DB11 DB10 DB9 DB8

DB7 DB6 DB5 DB4

DB3 DB2 DB1 DB0

RA1

1 2 3 4 5

MNR14_22kΩ

RA3

1 2 3 4 5

MNR14_22kΩ

RA5

1 2 3 4 5

MNR14_22kΩ

RA7

1 2 3 4 5

MNR14_22kΩ

D3.3V

8 7 6

RA2

1

DB4

2

DB5

3

DB6

4 5

DB7 D7

MNR14_22Ω

RA4

1

DB8

2

DB9

3

DB10

4 5

DB11

MNR14_22Ω

RA6

1

DB12 D12

2

DB13 D13

3

DB14 D14

4 5

DB15 D15

MNR14_22Ω

RA8

1

DB0 D0

2

DB1 D1

3

DB2 D2

4 5

DB3 D3

MNR14_22Ω

D[15:0]

A[15:1][3]

8

D4

7

D5

6

D6

D3.3V

8

D8

7

D9

6

D10 D11

R101 22kΩ

R105 22kΩ

R106 22kΩ

R102 22kΩ

R104 22kΩ

R103 22kΩ

8 7 6

P6_5/(DRP01)/CS3 P7_3/RAS/(DRP06/TxD1) P7_4/CAS/(DRP07/RTS1) P7_1/RD/WR/(DRP05/RxD1)

P7_0/WE1/DQMU/(DRP04/SCK1) P6_7/WE0/DQML/(DRP03)

P7_5/CKE/(DRP08/CTS1/OVRCUR1)

1_P6_5/CS3[3]

1_P6_7/DQML[3]

CKIO[2]

1_P7_3 1_P7_4 1_P7_1

1_P7_0

1_P7_5

R100 _22kΩ

C31 _18pF

R107 22kΩ

R108 _22kΩ

R109 _22kΩ

D3.3V

A15 A14

A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1

SDRAM (64MB)

U30 IS42S16320F

ISSI

21

BA1

20

BA0

36

A12

35

A11

22

A10

34

A9

33

A8

32

A7

31

A6

30

A5

29

A4

26

A3

25

A2

24

A1

23

A0

19

CS

18

RAS

17

CAS

16

WE

39

DQMH

15

DQML

37

CKE

38

CLK

VSS28VSS41VSS54VSSQ6VSSQ12VSSQ46VSSQ

R110 22kΩ R111 22kΩ R112 22kΩ R113 22kΩ R114 22kΩ R115 22kΩ R116 22kΩ R117 22kΩ R118 22kΩ R119 22kΩ R120 22kΩ R121 22kΩ R122 22kΩ R123 22kΩ R124 22kΩ

53

D15

DQ15

51

D14

DQ14

50

D13A13

DQ13

48

D12

DQ12

47

D11

DQ11

45

D10

DQ10

44

D9

DQ9

42

D8

DQ8

13

D7

DQ7

11

D6

DQ6

10

D5

DQ5

8

D4

DQ4

7

D3

DQ3

5

D2

DQ2

4

D1

DQ1

2

D0

DQ0

40

NC

D3.3V

1

VDD

14

VDD

27

VDD

3

VDDQ

9

VDDQ

43

VDDQ

49

VDDQ

52

CP61 0.1µF

CP62 0.1µF

CP63 0.1µF

CP64 0.1µF

CP65 0.1µF

CP66 0.1µF

CP67 0.1µF

D3.3V

+

CE12 4.7µF/10V

NAND-flash

U31 _S34ML04G1

Spansion

R131 22kΩ

R129 22kΩ

R127 22kΩ

R125 22kΩ

R126 22kΩ

R128 22kΩ

R132 0Ω R133 0Ω

R135 0Ω R136 0Ω

CP72 0.1µF

CP71 0.1µF

R130 22kΩ

44

I/O7

43

I/O6

42

I/O5

41

I/O4

32

I/O3

31

I/O2

30

I/O1

29

I/O0

18

WE

17

ALE

16

CLE

8

RE

7

R/B

9

CE

19

WP

13

Vss1

36

Vss2

25

Vss3(ONFI)

48

Vss4(ONFI)

37

VCC1

12

VCC2

34

VCC3(ONFI)

39

VCC4(ONFI)

RZ/A2M SUB board

Memory(EEPROM, NAND, SDRAM)

R20UT4395EJ0100

NC10 NC11 NC12 NC13 NC14 NC15 NC16

NC18 NC19 NC20

NC22 NC23

NC25 NC26 NC27 NC28

1

NC1

2

NC2

3

NC3

4

NC4

5

NC5

6

NC6

10

NC7

11

NC8

14

NC9

15 20 21 22 23 24 26

27 28 33

35 38

40 45 46 47

5

( / )810

PK_4/(RMII1_RXD0)/NAF7 PK_3/(REF50CK1)/NAF6 PK_2/(RMII1_TXD1)/NAF5 PK_1/(RMII1_TXD0)/NAF4 PK_0/(RMII1_TXDEN)/NAF3

C C

EEPROM(16KB)

U32 R1EX24128ASA00A

PD_6/RIIC3SCL

PD_7/RIIC3SDA

D D

SCALE

CHANGE

1

2

DATE

RENESAS

PD_6

6

A2

SCL

5

7

3

SDA

WP

VSS4VCC

A1 A0

PD_7

R134 22kΩ

18-10-09

3 2 1

D3.3V

8

CP68

0.1µF

Renesas Electronics Corporation.

DRAWN

PH_5/NAF2/(ET1_EXOUT) PK_5/NAF1 PJ_7/NAF0/(LCD0_EXTCLK)

P3_3/(ET1_MDC)/FWE P3_1/(RMII1_RXER)/FALE P3_5/(RMII1_RXD1)/FCLE P3_2/(RMII1_CRSDV)/FRE

P3_4/(ET1_MDIO)/FRB PJ_6/FCE/(LCD0_CLK)

CE13

4.7µF/10V

DESIGNEDCHECKED

D3.3V

4

+

2_PK_4 2_PK_3 2_PK_2 2_PK_1 2_PK_0 2_PH_5

PK_5

2_PJ_7

2_P3_3 2_P3_1 2_P3_5 2_P3_2

2_P3_4 2_PJ_6

CP69 0.1µF

APPROVED

CP70 0.1µF

1

2

3

4

5

P4_[7:0][2]

P5_[7:3][2,7,10]

A A

P7_[7:0][2,3]

P8_[7:0][2,3]

PA_[7:0][2,4]

1_PA_[7:4][4]

B B

C C

D D

PB_[5:0][2]

PC_[5:0][2,7,10]

PF_[7:0][2]

1_PJ_[7:6][4]

PD_[7:2][2,8]

PG_[7:0][2]

PH_[2:0][2]

2_P6_[3:1][4]

2_PE_[6:0][4]

P4_0 P4_1 P4_2 P4_3 P4_4 P4_5 P4_6 P4_7

P5_3 P5_4 P5_5 P5_6 P5_7

P7_0 P7_1 P7_2 P7_3 P7_4 P7_5 P7_6 P7_7

P8_0 P8_1 P8_2 P8_3 P8_4 P8_5 P8_6 P8_7

PA_0 PA_1 PA_2 PA_3 PA_4 PA_5 PA_6 PA_7

1_PA_4 1_PA_5 1_PA_6 1_PA_7

PB_0 PB_1 PB_2 PB_3 PB_4 PB_5

PC_0 PC_1 PC_2 PC_3 PC_4 PC_5

PF_0 PF_1 PF_2 PF_3 PF_4 PF_5 PF_6 PF_7

1_PJ_6 1_PJ_7

PD_6 PD_7

PG_0 PG_1 PG_2 PG_3 PG_4 PG_5 PG_6 PG_7

PH_0 PH_1 PH_2

2_P6_1 2_P6_2 2_P6_3

2_PE_0 2_PE_1 2_PE_2 2_PE_3 2_PE_4 2_PE_5 2_PE_6

LVDS

LCD

LCD & CEU

CEU

P4_1/TXOUT0M P4_0/TXOUT0P

P4_3/TXOUT1M P4_2/TXOUT1P

P4_5/TXOUT2M P4_4/TXOUT2P

P4_7/TXCLKOUTM P4_6/TXCLKOUTP

P4_1 P4_0

P4_3 P4_2

P4_5 P4_4

P4_7 P4_6

100Ω-1%

R141

100Ω-1%

R142

100Ω-1%

R143

100Ω-1%

R144

D3.3V

680Ω

R145

_620Ω

R181

D3.3V

10kΩ

R152

680Ω

R180

_620Ω

R146

10kΩ

R153

D3.3V

D5V

CP73 0.1µF

CP80 0.1µF

CP74 0.1µF

CP81 0.1µF

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

21 22

1

2

3

4

5

6

7

8

D3.3V

LVDS

CN14 DF14A-20P-1.25H

HRS

VCC(3.3V) VCC(3.3V) GND GND RX0RX0+ GND RX1RX1+ GND RX2RX2+ GND CLKCLK+ GND L/R or RX3U/D or RX3+ GND GND

FG FG

LVDS Backlight

CN16 53261-0671

Molex

VLED(5V) VLED(5V) DIMMER(Brightness Adjust) ENABLE GND GND

FG

PD_6/RIIC3SCL PD_7/RIIC3SDA P6_2/(RMII0_TXD0)/VIO_VD P6_3/(RMII0_TXD1)/VIO_HD P6_1/(RMII0_TXDEN)/VIO_CLK PE_1/(RMII0_RXD0)/VIO_D7 PE_3/(RMII0_RXER)/VIO_D5 PE_5/(ET0_MDC)/VIO_D3 PH_0/VIO_D1

PG_4/VIO_D15 PG_6/VIO_D13 PG_3/VIO_D11 PG_1/VIO_D9

PF_7/DV0_DATA23/LCD0_DATA0 PH_2/DV0_DATA22/LCD0_DATA1 PF_6/DV0_DATA21/LCD0_DATA2 PF_5/DV0_DATA20/LCD0_DATA3 PF_4/DV0_DATA19/LCD0_DATA4 PF_3/DV0_DATA18/LCD0_DATA5 PF_2/DV0_DATA17/LCD0_DATA6 PF_1/DV0_DATA16/LCD0_DATA7 PF_0/DV0_DATA15/LCD0_DATA8 P8_0/DV0_DATA14/LCD0_DATA9 PA_0/DV0_DATA13/LCD0_DATA10 PA_1/DV0_DATA12/LCD0_DATA11 PA_2/DV0_DATA11/LCD0_DATA12 PA_3/DV0_DATA10/LCD0_DATA13 PA_4/DV0_DATA9/LCD0_DATA14/(SCI_TXD0) PA_5/DV0_DATA8/LCD0_DATA15/(SCI_RXD0) PA_6/DV0_DATA7/LCD0_DATA16/(SCI_SCK0) PA_7/DV0_DATA6/LCD0_DATA17/(SCI_RST) PB_0/DV0_DATA5/LCD0_DATA18 PB_1/DV0_DATA4/LCD0_DATA19 PB_2/DV0_DATA3/LCD0_DATA20 PB_3/DV0_DATA2/LCD0_DATA21 PB_4/DV0_DATA1/LCD0_DATA22 PB_5/DV0_DATA0/LCD0_DATA23

PC_3/LCD0_TCON4 PC_4/LCD0_TCON3 P7_7/DV0_HSYNC/LCD0_TCON0

P5_7/IRQ3

CMOS Camera

D3.3V

PD_6 PD_7

2_P6_2 2_P6_3 2_P6_1

R156

2_PE_1 2_PE_2

22Ω

2_PE_3 2_PE_4 2_PE_5 2_PE_6

PH_0 PH_1

PG_4 PG_5 PG_6 PG_7 PG_3 PG_2 PG_1 PG_0

CN17 HIF3FB-26DA-2.54DSA

HRS

1 3 5 7

9 11 13 15 17 19 21 23 25

CP83 0.1µF

X6

D3.3V D3.3V

_SG-8002DC

EPSON

8

VCC

CP82

0.1µF

GND

4

PF_7 PH_2 PF_6 PF_5 PF_4 PF_3 PF_2 PF_1 PF_0 P8_0 PA_0 PA_1 PA_2 PA_3 1_PA_4 1_PA_5 1_PA_6 1_PA_7 PB_0 PB_1 PB_2 PB_3 PB_4 PB_5

RES#[2,6]

PC_3 PC_4 P7_7

PD_7 PD_6 P5_7

2 4 6 8 10 12 14 16 18 20 22 24 26

1

OE

R155

5

OUT

22Ω

D3.3VD5V D3.3V D5V

R137 _10kΩ

R138 10kΩ

R149 _10kΩ

R148 10kΩ

CP75 0.1µF

PE_2/(RMII0_RXD1)/VIO_D6 PE_4/(RMII0_CRSDV)/VIO_D4 PE_6/(ET0_MDIO)/VIO_D2 PH_1/VIO_D0 PE_0/(REF50CK0)/VIO_FLD

2_PE_0

PG_5/VIO_D14 PG_7/VIO_D12 PG_2/VIO_D10 PG_0/VIO_D8

D3.3V

LCD

CN15 SFH11-PBPC-D25-RA-BK

SULLINS

2

112

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

23

24

26

252526

28

272728

Hi

30

292930

Hi Lo P7_6/DV0_VSYNC/GTIOC3A NC NC

NC

CP76 0.1µF

X5 SG-8002DC_40MHz

D3.3V

EPSON

8

CP79

0.1µF

313132 333334 353536 373738 393940 414142 434344 454546 474748 494950

VCC

GND

4

Hi

32 34 36 38

NC

40

NCNC

42 44 46 48 50

CP77 0.1µF

D3.3V

1

OE

5

OUT

CP78 0.1µF

R140 10kΩ

R139 10kΩ

1_PJ_6

R178 22Ω

R147 0Ω

R151 _10kΩ

R150 _10kΩ

R154 22Ω

PJ_6/(FCE)/LCD0_CLK

P7_6

PD_6/RIIC3SCLPD_7/RIIC3SDA

P7_2/DV0_CLK

P7_2

1_PJ_7

PJ_7/(NAF0)/LCD0_EXTCLK

CHANGE

Renesas Electronics Corporation.

4

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-09

1

2

18-10-09

3

DRAWN

DESIGNEDCHECKED

RZ/A2M SUB board

CMOS, LCD, LVDS

R20UT4395EJ0100

5

( / )910

1

2

3

4

5

P5_[7:3][2,7,9]

PC_[5:0][2,7,9]

A A

AC Adaptor

CN18 KLDX-SMT2-0202-A

Kycon

VBUS

B B

C C

SDRAM#/Other DRP#/Audio DRP#/USB, CAN, UART Ether1#/CEU Ether2#/NAND VDC6#/NAND VDC6#/SIM

D D

P5_3 P5_4 P5_5 P5_6 P5_7

PC_0 PC_1 PC_2 PC_3 PC_4 PC_5

Power

R182 22kΩ

R183 22kΩ

R165 22kΩ

Switch

SW1 MS-12AAP1

2

R167 22kΩ

R169 22kΩ

R168 22kΩ

R166 22kΩ

D3 CMS01

Toshiba

3 2 1

D4 CMS01

Toshiba

SWx-1[3] SWx-2[3] SWx-3[3] SWx-4[4] SWx-5[4] SWx-6[4] SWx-7[4]

P5_3 PC_2

R170 22kΩ

1

3

D3.3V

R171 22kΩ

R172 22kΩ

D5V

C32 22µF/16V

SW6 A6H-0101

OMRON

1 2 3 4 5 16 6 7

9

10 11

20 19 18 17

15 14 138 12

Anti-resonant circuit

D5V D3.3V

RQ1

5.1Ω

CQ1

0.1µF

2

Board fixed hole.

RQ2

5.1Ω

CQ2

0.1µF

NMI SWITCH

SW2 B3S-1000

31 4

IRQ0 SWITCH

SW3 B3S-1000

31 4

SW4 B3S-1000

31 4

MH1

for Corner x 4 (M3)

HOLE

MH2

HOLE

MH3

HOLE

MH4

HOLE

RQ3

5.1Ω

CQ3

0.1µF

R163

1.5kΩ

R158

220Ω

R160

220Ω

2

RQ4

5.1Ω

CQ4

0.1µF

D3.3V

SW5 B3S-1000

RQ5

5.1Ω

CQ5

0.1µF

+

CE14

2.2µF/10V

+

CE15

2.2µF/10V

J2 HWP-3P-G

MAC8

R157 10kΩ

R159 10kΩ

AVcc AVcc

31 4

3 2 1

RQ6

5.1Ω

CQ6

0.1µF

U33B

SN74LVC2G17

TI

D3.3V

2 5

U33A

SN74LVC2G17

TI

R161

4.7kΩ

R164

4.7kΩ

RQ7

5.1Ω

CQ7

0.1µF

43

61

RQ8

5.1Ω

CQ8

0.1µF

U33C

SN74LVC2G17

TI

CP84

0.1µF

D5 RB520S-30

D6 RB520S-30

R162 100Ω

RQ9

5.1Ω

CQ9

0.1µF

RQ10

5.1Ω

CQ10

0.1µF

C33

0.1µF

P5_6

NMI [2]

PJ_1/IRQ0 [6]

P5_6/AN006

CHANGE

Renesas Electronics Corporation.

4

APPROVED

DESIGNEDCHECKED

DRAWN

SCALE

DATE

18-10-09

1

2

18-10-09

3

DRAWN

DESIGNEDCHECKED

RZ/A2M SUB board

Power, SW

R20UT4395EJ0100

5

( / )10 10

RZ/A2M SUB Board RTK79210XXB00000BE Appendix 2

R20UT4398EJ0100 Rev.1.00 Appendix 2-1

2018.10.11

Appendix 2 RTK79210XXB00000BE Component Installation Diagram

RZ/A2M SUB Board RTK79210XXB00000BE Appendix 2

R20UT4398EJ0100 Rev.1.00 Appendix 2-2

2018.10.11

Renesas RTK79210**B00000BE, RZ/A2M User Manual

Notice

General Preca ut ions in the Handling of Microprocessing Unit and Microcontroller Unit Products

WEEE Directive

How to use this manual

CONTENTS

RZ/A2M SUB Board RTK79210XXB00000BE 1. Overview

1.1 Overview

1.2 Configuration

1.3 Features

1.4 Outside View

1.5 Block Diagram

1.6 Layout of Components

1.7 Memory Mapping

1.8 Absolute Maximum Ratings

1.9 Operating Conditions

2. Functional Specifications

2.1 Overview of Functions

2.2 CPU

2.2.1 Overview of RZ/A2M

2.2.2 List of RZ/A2M Pin Functions Used on RTK79210XXB00000BE

2.2.3 RTK79210XXB00000BE Interface Use Combination List

2.3 Memory

2.3.1 SDRAM

2.3.2 NAND Flash Memory Interface

2.3.3 EEPROM Interface

2.4 USB Interface

2.5 Serial Interface

2.6 Interrupt Switches

2.7 Clock Configuration

2.8 Reset Control

2.9 Power Voltage Configuration

2.10 Audio Interface

2.11 CMOS Camera Interface

2.12 SD Card Interface

2.13 LAN Interface

2.14 Key Input Switches

2.15 VDC6 Interface

2.16 LVDS Interface

2.17 DRP Interface

RZ/A2M SUB Board RTK79210XXB00000BE 3. Operating specifications

3.1 Overview of Connector

3.1.1 CPU Board Connector (CN1)

3.1.2 DRP Connector (CN2)

3.1.3 Mic-in Pin Jack (CN3)

3.1.4 Line out Pin Jack (CN4)

3.1.5 Serial Board Connector (CN5)

3.1.6 LAN Connector (CN8, CN9)

3.1.7 SD Card Slot (CN10)

3.1.8 USB Connector (CN12, CN13)

3.1.9 LVDS Connector (CN14, CN16)

3.1.10 Digital Image Input/output Connector (CN15)

3.1.11 CMOS Camera Connector (CN17)

3.1.12 DC Power Supply Jack (CN18)

3.2 Operational Component Layout

3.2.1 Jumpers (JP1 and JP2)

3.2.2 Switch Functions

3.3 External Dimensions

Appendix 1 RTK79210XXB00000BE Connection Diagram

Appendix 2 RTK79210XXB00000BE Component Installation Diagram