This application note describes the differences in peripheral functions between RL78/G13 and RL78/G23.
Target Device
RL78/G13, RL78/G23
For detailed information on peripheral functions and electrical characteristics, refer to the User's Manual:
Hardware and Technical Updates.
When using this application note with other Renesas MCUs, careful evaluation is recommended after making
modifications to comply with the alternate MCU.
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Contents
1. Differences in peripheral functions between RL78/G13 and RL78/G23.................................... 3
2. Comparison of RL78/G13 and RL78/G23 registers .................................................................. 6
2.1 Port Functions ......................................................................................................................................... 6
2.8 Serial Array Unit .................................................................................................................................... 13
2.9 Serial Interface IICA .............................................................................................................................. 15
2.13 Reset Function ...................................................................................................................................... 18
2.15 Voltage Detector .................................................................................................................................... 19
RL78/G13, RL78/G23 Migration Guide from RL78/G13 to RL78/G23
RL78/G13
RL78/G23
Register name
Register name
Remark
register
Port registers (Pxx)
Port registers (Pxx)
None
(PUxx)
Addition of PIM84 bit to PIM8 register.
Addition of POM120 bit to POM12 register.
Port digital input disable
registers (PDIDISxx)
New addition
(PMCxx)
(PMCAxx)
(PMCTxx)
(PMCExx)
A/D port configuration register
(ADPC)
Deleted item
2. Comparison of RL78/G13 and RL78/G23 registers
Table 2.1 to Table 2.19 show register comparison between RL78/G13 and RL78/G23 for peripheral
functions other than additions, changes and deletions described in chapter "1. Differences in peripheral
functions between RL78/G13 and RL78/G23". For details of each register function, refer to the User's
Manual: Hardware.
Also, the registers and bits mounted on the microcontroller differ depending on the product. For the
registers and bits mounted in each product, refer to the User's Manual: Hardware.
2.1 Port Functions
Table 2.1 Registers Controlling Port Function (1/2)
Port mode registers (PMxx) Port mode registers (PMxx) Addition of PM121 and PM122 bits to PM12
Pull-up resistor option registers
(PUxx)
Port input mode registers
(PIMx)
Port output mode registers
(POMx)
-
Port mode control registers
-
-
Pull-up resistor option registers
Port input mode registers
(PIMxx)
Port output mode registers
(POMxx)
Port mode control A registers
Port mode control T registers
Port mode control E registers
-
Addition of PU121 and PU122 bits to PU12
register
Addition of PIM33 bit to PIM3 register.
Addition of PIM41 bit to PIM4 register.
Addition of PIM71 bit to PIM7 register.
Addition of POM34 bit to POM3 register.
Addition of POM42 bit to POM4 register.
Addition of POM72 bit to POM7 register.
Addition of POM83 bit to POM8 register.
Changed applicable pins
New addition
New addition
Note : The register name is unchanged. : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of each register function, refer to the User's Manual: Hardware.
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RL78/G13
RL78/G23
Register name
Register name
Remark
register (PIOR)
Global digital input disable
Global digital input disable
register (GDIDIS)
None
register (CCDE)
(CCSx)
Port overdrive register (PTDC)
New addition
Port function output enable registers
(PFOEx)
New addition
Port mode select register (PMS)
New addition
Table 2.2 Registers Controlling Port Function (2/2)
Peripheral I/O redirection
register (PIOR)
register (GDIDIS)
-
-
-
-
-
Peripheral I/O redirection
Output current control enable
Output current select registers
None
New addition
New addition
Note : The register name is unchanged. : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of each register function, refer to the User's Manual: Hardware.
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RL78/G13
RL78/G23
Register name
Register name
Remark
(CMC)
(CMC)
Addition of MCS1 bit to bit 1.
Clock operation status control register
(CSC)
Clock operation status control register
(CSC)
Addition of MIOEN bit to bit 1
status register (OSTC)
status register (OSTC)
register (OSTS)
register (OSTS)
Peripheral enable register 0 (PER0)
Peripheral enable register 0 (PER0)
Change of bit 7 to RTCWEN bit
Peripheral enable register 1 (PER1)
New addition
values.
(CKSEL)
frequency select register (HOCODIV)
frequency select register (HOCODIV)
Middle-speed on-chip oscillator
frequency select register (MOCODIV)
Change of the contents of IF0H,
IF1L, IF1H (ITIF → ITLIF bit),
IF2L (PIF10 → FLIF bit), IF2H and
Change of the contents of MK0H,
MK1L, MK1H (ITMK → ITLMK bit),
MK2L (PMK10 → FLMK bit),
Change of the contents of PR00H,
PR10H, PR01L, PR11L, PR01H,
PR11H (ITPR0, ITPR1 → ITLPR0,
ITLPR1 bit), PR02L, PR12L
(PPR010, PPR110
FLPR1 bit), PR02H, PR12H,
PR03L and PR13L.
→ FLPR0,
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RL78/G13
RL78/G23
Register name
Register name
Remark
Key return control register
(KRCTL)
New addition
Key return mode register (KRM)
Key return mode register 0
(KRM0)
Key return flag register (KRF)
New addition
Port mode register 7 (PM7)
Port mode register 7 (PM7)
None
RL78/G13
RL78/G23
Register name
Register name
Remark
Subsystem clock supply mode
Subsystem clock supply mode
undefined values.
Oscillation stabilization time
counter status register (OSTC)
Oscillation stabilization time
counter status register (OSTC)
None
Oscillation stabilization time
select register (OSTS)
Oscillation stabilization time
select register (OSTS)
None
Standby mode release setting
register (WKUPMD)
New addition
Memory power reduction control
register (PSMCR)
New addition
2.11 Key Interrupt Function
Table 2.13 Register Controlling the Key Interrupt
-
Changed applicable pins
-
Note : The register name is unchanged. : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of each register function, refer to the User's Manual: Hardware.
2.12 Standby Function
Table 2.14 Registers Controlling Standby Function
Addition of HIPREC bit to bit 0.
control register (OSMC)
-
-
Note : The register name is unchanged. : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of each register function, refer to the User's Manual: Hardware.
control register (OSMC)
Bits 1 and 2 are changed to
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RL78/G13
RL78/G23
Register name
Register name
Remark
Reset control flag register (RESF)
Reset control flag register (RESF)
None
Power-on-reset status register
(PORSR)
New addition
Peripheral reset control register 0
(PRR0)
New addition
Peripheral reset control register 1
(PRR1)
New addition
2.13 Reset Function
Table 2.15 Registers for Confirming Reset Sources
-
-
-
Note : The register name is unchanged. : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of each register function, refer to the User's Manual: Hardware.
2.14 Power-On-Reset Circuit
There is no register that controls the power-on-reset circuit.
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RL78/G13
RL78/G23
Register name
Register name
Remark
User option byte
(Settings related to LVD.)
User option byte
(Settings related to LVD.)
Changed functions of option bytes.
Voltage detection register
Voltage detection register
Bit 3 has been changed to DLVD1F bit.
LVD detection flag clearing
register (LVDFCLR)
New addition
Voltage detection level register
Voltage detection level register
Bit 7 is changed to LVD1EN bit.
2.15 Voltage Detector
Table 2.16 Registers Controlling Voltage Detector
000C1H/010C1H
000C1H/040C1H
Changed address when using the
boot swap operation.
Bit 0 has been changed to LVD0F bit.
(LVIM)
-
(LVIS)
(LVIM)
(LVIS)
Bit 1 has been changed to LVD1F bit.
Bit 2 has been changed to DLVD0F bit.
Bit 0 is changed to LVD1V0 bit.
Bit 1 is changed to LVD1V1 bit.
Bit 2 is changed to LVD1V2 bit.
Bit 3 is changed to LVD1V3 bit.
Bit 4 is changed to LVD1V4 bit.
Bit 6 is changed to LVD1SEL bit.
Note : The register name is unchanged : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of each register function, refer to the User's Manual: Hardware.
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RL78/G13
RL78/G23
Register name
Register name
Remark
Flash memory CRC control
register (CRC0CTL)
Flash memory CRC control
register (CRC0CTL)
None
Flash memory CRC operation
result register (PGCRCL)
Flash memory CRC operation
result register (PGCRCL)
None
CRC input register (CRCIN)
CRC input register (CRCIN)
None
CRC data register (CRCD)
CRC data register (CRCD)
None
Code flash memory guard
register (GFLASH0)
New addition
Data flash memory guard
register (GFLASH1)
New addition
Flash security area guard
register (GFLASH2)
New addition
RAM parity error control register
(RPECTL)
RAM parity error control register
(RPECTL)
None
Invalid memory access detection
control register (IAWCTL)
Invalid memory access detection
control register (IAWCTL)
None
Guard register of IAWCTL
register (GIAWCTL)
New addition
Timer input select register 0
(TIS0)
Timer input select register 0
(TIS0)
None
A/D test register (ADTES)
A/D test register (ADTES)
None
Analog input channel
specification register (ADS)
Analog input channel
specification register (ADS)
None
Port mode select register (PMS)
New addition
UART loopback select register
(ULBS)
New addition
2.16 Safety Functions
Table 2.17 Registers Used by Safety Functions
-
-
-
-
-
-
Note : The register name is unchanged. : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of each register function, refer to the User's Manual: Hardware.
2.17 Regulator
There is no register that controls the regulator.
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RL78/G13
RL78/G23
Option byte area
Option byte area
Remark
000C0H-000C3H
000C0H-000C3H
Changed functions of option bytes.
User option bytes
User option bytes
000C0H/010C0H
(Settings related to WDT.)
000C0H/040C0H
(Settings related to WDT.)
000C1H/010C1H
(Settings related to LVD.)
000C1H/040C1H
(Settings related to LVD.)
000C2H/010C2H
HOCO.)
000C2H/040C2H
HOCO.)
On-chip debug option byte
On-chip debug option byte
RL78/G13
RL78/G23
Register name
Register name
Remark
BCD correction result register
(BCDADJ)
BCD correction result register
(BCDADJ)
None
2.18 Option Bytes
There is no register that controls the option bytes. The function of option bytes is set using the option byte
area. Table 2.18 shows a comparison of RL78/G13 and RL78/G23 option byte areas.
Table 2.18 Option Byte Area
(Normal/Boot swap operation)
/010C0H-010C3H
000C0H-000C2H
/010C0H-010C2H
(Settings related to flash and
000C3H/010C3H
Note : The option bytes name is unchanged. : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of the function of each option bytes, refer to the User's Manual: Hardware.
(Normal/Boot swap operation)
/040C0H-040C3H
000C0H-000C2H
/040C0H-040C2H
(Settings related to flash and
000C3H/040C3H
Changed address when using the
boot swap operation.
2.19 On-Chip Debugging
There is no register that controls the on-chip debugging function.
2.20 BCD Correction Circuit
Note : The register name is unchanged. : Additional contents : Changed contents
: Deleted contents -: There is no corresponding register.
Caution. For details of each register function, refer to the User's Manual: Hardware.
Table 2.19 Register Used by BCD Correction Circuit
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3. Other changes and notes
3.1 RL78/G23 instruction set
"Multiply and accumulation register (MACR)", which is used in the multiply and accumulation instructions, is
added on RL78/G23. (The MACR register is composed of multiply and accumulation register (H)/(L):
MACRH/MACRL).
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4. Documents for Reference
RL78/G13 User's Manual: Hardware (R01UH0146)
RL78/G23 User's Manual: Hardware (R01UH0896)
RL78 Family User's Manual: Software (R01US0015)
(The latest versions of the documents are available on the Renesas Electronics Website.)
Technical Updates/Technical Brochures
(The latest versions of the documents are available on the Renesas Electronics Website.)
R01AN5378EJ0100 Rev.1.00 Page 23 of 24
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Rev.
Date
Description
Page
Summary
1.00
Apr.13.21
-
First edition issued
Revision History
R01AN5378EJ0100 Rev.1.00 Page 24 of 24
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General Precautions in the Handling of Microprocessing Unit and Microcontroller
Unit Products
The following usage notes are applicable to all Microprocessing unit and Microcontroller unit products from Renesas. For detailed usage notes on the
products covered by this document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products.
1. Precaution against Electrostatic Discharge (ESD)
A strong electrical field, when exposed to a CMOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps
must be taken to stop the generation of static electricity as much as possible, and quickly dissipate it when it occurs. Environmental control must be
adequate. When it is dry, a humidifier should be used. This is recommended to avoid using insulators that can easily build up static electricity.
Semiconductor devi ces must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and
measurement tools including work benches and floors must be grounded. The operator must also be grounded using a wrist strap. Semiconductor
devices must not be touched with bare hands. Similar precautions must be taken for printed circuit boards with mounted semiconductor devices.
2. Processing at power-on
The state of the product is undefined at the time when power is supplied. The states of internal circuits in the LSI are indeterminate and the states of
register settings and pins are undefined at the time when power is supplied. In a finished product where the reset signal is applied to the external reset
pin, the states of pins are not guaranteed from the time when power is supplied until the reset process is completed. In a similar way, the states of pins
in a product that is reset by an on-chip power-on reset function are not guaranteed from the time when power is supplied until the power reaches the
level at which resetting is specified.
3. Input of signal during power-off state
Do not input signals or an I/O pull-up power supply while the device is powered off. The current injection that results from input of such a signal or I/O
pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal
elements. Follow the guideline for input signal during power-off state as described in your product documentation.
4. Handling of unused pins
Handle unused pins in accordance with the directions given under handling of unused pins in the manual. The input pins of CMOS products are
generally in the high-impedance state. In operation with an unused pi n in the open-circuit state, extra electromagnetic noise is induced in the vicinity of
the LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal
become possible.
5. Clock signals
After applying a reset, only release the reset line after the operating clock signal becomes stable. When switching the clock signal during program
execution, wait until the target clock signal is stabilized. When the clock signal is generated with an external resonator or from an external oscillator
during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Additionally, when switching to a clock signal
produced with an external resonator or by an external oscillator while program execution is in progress, wait until the target clock signal is stable.
6. Voltage application waveform at input pin
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V
(Max.) and V
input level is fixed, and also in the transition period when the input level passes through the area between V
7. Prohibition of access to reserved addresses
Access to reserved addresses is prohibited. The reserved addresses are provided for possible future expansion of functions. Do not access these
addresses as the correct operation of the LSI is not guaranteed.
8. Differences between products
Before changing from one product to another, for example to a product with a different part number, confirm that the change will not lead to problems.
The characteristics of a microprocessing unit or microcontroller unit products in the same group but having a different part number might differ in terms
of internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values,
operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system-
evaluation test for the given product.
(Min.) due to noise, for example, the device may malfunction. Take care to prevent chattering noise from entering the device when the
IH
(Max.) and VIH (Min.).
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