Renesas RAA278842, RAA278843 Datasheet

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Short-Form Datasheet
To request the full datasheet, visit the RAA278842, RAA278843 device pages.
RAA278842, RAA278843
LCD Video Processor with Decoder, LVDS, TTL, MIPI, Image Enhancement, and Video Integrity Diagnostic
and RAA278843 are highly

Applications

• Automotive display
• Industrial/military displays

Features

Analog Video Decoder
• Supports NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N combination), PAL (60), SECAM with automatic format detection
• High quality adaptive 2D comb filter for both NTSC and PAL inputs
• 10-bit ADC and analog clamping circuit
• Fully programmable static gain or automatic gain control for the CVBS channel
• Programmable white peak control for the CVBS channel
• Four single-ended or 2 differential CVBS input
• PAL delay line for color phase error correction
• Image enhancement with 2D dynamic peaking/CTI
• Digital subcarrier PLL for accurate color decoding
• Programmable hue, brightness, saturation, contrast, and sharpness
• Digital horizontal PLL and advanced synchronization processing for superior VCR playback and weak signal performance
Digital Input Support
• Supports two parallel digital input ports up to 32 bits total, with many combinations (24 + 8, 16 + 16, etc.)
• Portable/consumer displays
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• Supports BT.656, 8-bit and 16-bit BT.601, and BT.1120 video formats
• Supports YCbCr/RGB 24-bit input up to 1080p resolution
• Dual channel LVDS open LDI inputs - up to 150MHz per channel or in Dual mode (75MHz per channel)
• MIPI-CSI2 input
One four lane single channel MIPI-CSI2 input port
(1Gb/lane)
Dual two lane channel MIPI-CSI2 input port
(1Gb/lane)
• Supports 1.8 ~ 3.3V logic thresholds
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RAA278842, RAA278843
TFT Panel Support
• Supports 3, 4, 6, or 8 bits per pixel up to 16.8 million colors with built-in dithering engine
• Supports single channel LVDS panels up to 1920x1080 resolution (150MHz)
• Supports dual channel LVDS up to 1920x1080 resolution (150MHz)
MIPI-CSI2 Output – RAA278842 only
• Four lane MIPI-CSI2 output port (1.2Gb/lane)
• Supports YUV422 and 24-bit RGB data formats
Pseudo BT.656 Output – RAA278843 only
• Independent BT.656 compatible YCbCr(4:2:2) output format
• YCbCr(4:2:2) output generated from all input paths
• Output processed through scaler bypass mode
Font Based On-Screen Display
• Four windows font OSD with bordering/shadow
• 13824 bytes programmable font RAM and 1024 characters display RAM
• 1/2/3/4 bits per pixel
• Supports variable width (12/16), height (2~32)
SPI Flash Based On-Screen Display
• Supports fast register initialization by SPI-DMA
• Nine bitmap-based OSD windows in two layers through SPI with alpha blending between layers
• Supports 4/6/8 bits/pixel
• Supports RLE decompression for two windows
• Shares pins with EEPROM interface
EEPROM Interface
• EEPROM interface for fast boot register initialization
• Shares pins with SPI Flash memory interface
Image Processing
• A high quality scaler with both up/down scaling support
• Built-in 2D de-interlacing function
• Supports programmable cropping of input video and graphics
• Independent RGB gain and offset controls
• 10-bit per color processing
• 10-bit image enhancement processing and 10-bit Gamma correction
Clock Generation
• Spread spectrum PLL integrated to each scaler path
• Programmable modulation frequency and spread width
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RAA278842, RAA278843
Miscellaneous
• Fast mode plus I
• Short diagnostics
Short to battery
Short to ground
• Up to four 10-bit PWMs
•GPIOs
• Programmable drive strength for LVTTL and LVDS
• Pin swapping (MSB LSB)
• Two separate input measurement engines with continuous measurement and hardware interrupt capability
• Smooth input switching via shadow registers
• 1.2V internal operation
• 1.8/3.3V I/O support
• Single 27MHz crystal
• 128 Ld LQFP with exposed thermal pad
2
C interface up to 1.2Mbps with zero hold time
• RAA2788423HFP#AA0 and RAA2788433HFP#AA0 are AEC-Q100
qualified
Figure 1. RAA278842, RAA278843 Functional Block Diagram
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RAA278842, RAA278843 1. Revision History

1. Revision History
Rev. Date Description
2.0 Apr 4, 2021 Added Revision History and updated file number with Short-Form Datasheet file numbering scheme.
1.0 Aug 23, 2019 Initial release
R33DO0001EU0200 Rev.2.0 Page 4 of 4 Apr 4, 2021
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