Renesas R2J20605ANP Schematics

Preliminary
R2J20605ANP
Integrated Driver – MOS FET (DrMOS)
REJ03G1821-0300
Rev.3.00
Feb 26, 2010
The R2J20605ANP multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in a single QFN package. The on and off timing of the power MOS FET is optimized by the built-in driver, making this device suitable for large-current buck converters. The chip also incorporates a high-side bootstrap switch, eliminating the need for an external SBD for this purpose.
Integrating a driver and both high-side and low-side power MOS FETs, the new device is also compliant with the package standard "integrated Driver – MOS FET (DrMOS)" proposed by Intel Corporation.
Features
Built-in power MOS FET suitable for Notebook, Desktop, Server application Built-in driver circuit which matches the power MOS FET Low-side MOS FET with built-in SBD for lower loss and reduced ringing Built-in tri-state input function which can support a number of PWM controllers VIN operating-voltage range: 27 V max High-frequency operation (above 1 MHz) possible Large average output current (Max. 40 A) Achieve low power dissipation Controllable driver: Remote on/off Low-side MOS FET disabled function for DCM operation Built-in thermal warning Built-in bootstrapping switch Small package: QFN56 (8 mm 8 mm 0.95 mm) Terminal Pb-free/Halogen-free
Outline
Reg5V
DISBL#
LSDBL#
PWM
VINGHBOOTVCIN
MOS FET Driver
THWN CGND GL PGND
VSWH
56
43
114
15
Driver PAD
42 29
QFN56 package 8 mm × 8 mm
High-side MOS PAD
Low-side MOS PAD
28
(Bottom view)
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 1 of 16
R2J20605ANP Preliminary
Block Diagram
Driver Chip
THWN
DISBL#
LSDBL#
PWM
THWN
20 μA
CGND
150 k
Reg5V
Input Logic (TTL Level) (3 state in)
Reg5V
VCIN BOOT GH
UVL
Reg5V
Boot
SW
Reg5V
Supervisor
Level Shifter
25 k
Overlap Protection. & Logic
Reg5V
VIN
High Side MOS FET
VSWH
Low Side MOS FET
20 μA
PGND
GLCGND
Notes: 1. Truth table for the DISBL# pin. 2. Truth table for the LSDBL# pin.
DISBL# Input Driver Chip Status
"L" Shutdown (GL, GH = "L") "Open" Shutdown (GL, GH = "L") "H" Enable (GL, GH = "Active")
LSDBL# Input GL Status
"L" "L" "Open" "Active" "H" "Active"
3. Output signal from the UVL block 4. Output signal from the THWN block
VHVL
For active
VCIN
Thermal Warning Logic Level
"H"
"L"
Normal operating
Thermal Warning
T
(°C)
IC
TwarnHTwarnL
UVL output Logic Level
"H"
For shutdown
"L"
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 2 of 16
R2J20605ANP Preliminary
Pin Arrangement
VIN
VIN
VSWH
PGND
PGND
VIN
15 16 17 18 19 20 21 22 23 24 25 26 27 28
NC
VIN
VSWH
GH
PGND
BOOT
CGND
VCIN
CGNDVIN
PGND
(Top view)
LSDBL#
NC
VSWH
CGND
114 13 12 11 10 9 8 7 6 5 4 3 2
4229 30 31 32 33 34 35 36 37 38 39 40 41
VSWH
56
PWM
55
DISBL#
54
Reg5V
53
THWN
52
GL
51
CGND
50
VSWH
49 48 47 46 45 44 43
VSWH
Note: All die-pads (three pads in total) should be soldered to PCB.
Pin Description
Pin Name Pin No. Description Remarks
CGND 1, 6, 51, Pad Control signal ground Should be connected to PGND externally LSDBL# 2 Low-side gate disable When asserted "L" signal, Low-side gate disable NC 3, 8 No connect VCIN 4 Control input voltage Driver Vcc input BOOT 5 Bootstrap voltage pin To be supplied +5 V through internal BOOT SW GH 7 High-side gate signal Pin for Monitor VIN 9 to 20, Pad Input voltage VSWH 21, 40 to 50, Pad Phase output/Switch output PGND 22 to 39 Power ground GL 52 Low-side gate signal Pin for Monitor THWN 53 Thermal warning Reg5V 54 +5 V logic power supply output DISBL# 55 Signal disable Disabled when DISBL# is "L" PWM 56 PWM drive logic input 5 V logic input
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 3 of 16
R2J20605ANP Preliminary
Absolute Maximum Ratings
(Ta = 25°C)
Item Symbol Rating Units Note
Pt(25) 25 Power dissipation Pt(110) 8
Average output current Iout 40 A
VIN(DC) –0.3 to +27 2 Input voltage VIN(AC) 30 VSWH(DC) 27 2 Switch node voltage VSWH(AC) 30 VBOOT(DC) 32 2 BOOT voltage
VBOOT(AC) 36 Supply voltage VCIN –0.3 to +27 V 2 PWM voltage Vpwm
Other I/O voltage
Reg5V voltage Vreg5V –0.3 to +6 V 7 Reg5V current Ireg5V –20 to +0.1 mA 3 THWN current Ithwn 0 to 1.0 mA 3 Operating junction temperature Tj-opr –40 to +150 °C Storage temperature Tstg –55 to +150 °C Notes: 1. Pt(25) represents a PCB temperature of 25°C, and Pt(110) represents 110C.
2. Rated voltages are relative to voltages on the CGND and PGND pins.
3. For rated current, (+) indicates inflow to the chip and (–) indicates outflow.
4. This rating is when UVL (Under Voltage Lock out) is ineffective (normal operation mode).
5. This rating is when UVL (Under Voltage Lock out) is effective (lock out mode).
6. The specification values indicated "AC" are limited within 100 ns.
7. This rating is when the external power-source is applied to Reg5V pin.
8. Reg5V + 0.3 V < 6 V
Vdisble, Vlsdbl,
Vthwn
–0.3 to +5.5 @UVL OFF
–0.3 to +0.3 @UVL ON
–0.3 to Reg5V + 0.3
–0.3 to VCIN + 0.3 V 2
W 1
V
2, 4, 6
V
2, 4, 6
V
2, 4, 6
V
2, 4 2, 5
2, 7, 8
Safe Operating Area 50 45 40 35 30 25 20
VOUT = 1.3 V VIN = 12 V
15
VCIN = Reg5V = 5 V
10
L = 0.45 μH
5
Average Output Current (A)
fsw = 600 kHz
0
0 25 50 75 100 125 150 175
PCB Temperature (°C)
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 4 of 16
R2J20605ANP Preliminary
Recommended Operating Condition
Item Symbol Rating Units Note
Input voltage VIN 4.5 to 22 V Supply voltage VCIN
4.5 to 5.5
V
or
When the usage of VCIN = 4.5 V to 5.5 V, VCIN should be connected to Reg5V (Refer to "Pin Connection")
8 to 22
Electrical Characteristics
(Ta = 25C, VCIN = 12 V, VSWH = 0 V, unless otherwise specified)
Item Symbol Min Typ Max Units Test Conditions
Supply
PWM input
5 V regulator
DISBL# input
LSDBL# input
Thermal warning
Note: 1. Reference values for design. Not 100% tested in production.
VCIN start threshold VH 7.0 7.4 7.8 V VCIN shutdown threshold VL 6.6 7.0 7.4 V UVLO hysteresis dUVL 0.4 V VH – VL VCIN operating current I
52 mA
CIN
f
PWM
= 1 MHz,
Ton_pwm = 120 ns
VCIN disable current I
— — 2.5 mA
CIN-DISBL
DISBL# = 0 V, PWM = 0 V,
LSDBL# = Open PWM rising threshold V PWM falling threshold V PWM input resistance R Tri-state shutdown window V Shutdown hold-off time t
3.0 3.4 3.8 V
H-PWM
0.9 1.2 1.5 V
L-PWM
10 20 40 k PWM = 1 V
IN-PWM
V
IN-SD
*1 — 100 — ns
HOLD-OFF
L-PWM
— V
H-PWM
V
Output voltage Vreg 4.95 5.2 5.45 V Line regulation Vreg-line –10 0 10 mV VCIN = 12 V to 16 V Load regulation Vreg-load –10 0 10 mV Ireg = 0 to 10 mA Disable threshold V Enable threshold V Input current I Low-side activation threshold V Low-side disable threshold V Input current I Warning temperature T Temperature hysteresis T THWN on resistance R THWN leakage current I
0.9 1.2 1.5 V
DISBL
1.9 2.4 2.9 V
ENBL
10 20 40 A DISBL# = 1 V
DISBL
1.9 2.4 2.9 V
LSDBLH
0.9 1.2 1.5 V
LSDBLL
–56 –28 –14 A LSDBL# = 1 V
LSDBL
*1 95 115 135 °C Driver IC temperature
THWN
*1 — 15 — °C
HYS
*1 0.2 0.5 1.0 k THWN = 0.2 V
THWN
0.001 1.0 A THWN = 5 V
LEAK
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 5 of 16
R2J20605ANP Preliminary
Typical Application
(1) Desktop/Server Application
+12 V
+5 V
PWM Control Circuit
PWM1
PWM2
PWM3
PWM4
VCIN THWN
DISBL# Reg5V
R2J20605ANP
PWM
CGND GL
VCIN THWN
DISBL# Reg5V
LSDBL#
GH
R2J20605ANP
PWM
CGND GL
LSDBL#
GH
BOOT
VIN
VSWH
PGND
BOOT
VIN
VSWH
PGND
+1.3 V
VCIN THWN
DISBL# Reg5V
R2J20605ANP
PWM
LSDBL#
CGND GL
VCIN THWN
DISBL# Reg5V
GH
R2J20605ANP
PWM
LSDBL#
CGND GL
GH
BOOT
VSWH
PGND
BOOT
VSWH
PGND
VIN
Power GND Signal GND
VIN
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 6 of 16
R2J20605ANP Preliminary
Typical Application (cont.)
(2) Notebook Application
+19 V
+5 V
PWM Control Circuit
PWM1
PWM2
PWM3
VCIN THWN
DISBL# Reg5V
R2J20605ANP
PWM
CGND GL
VCIN THWN
DISBL# Reg5V
LSDBL#
GH
R2J20605ANP
PWM
CGND GL
LSDBL#
GH
BOOT
VIN
VSWH
PGND
BOOT
VIN
VSWH
PGND
+1.1 V
VCIN THWN
DISBL# Reg5V
R2J20605ANP
PWM
CGND GL
LSDBL#
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 7 of 16
BOOT
VIN
VSWH
PGND
GH
Power GND Signal GND
R2J20605ANP Preliminary
Pin Connection
(1) Typical Desktop/Server Application
0.1 μF
VIN
12 V
1.0 μF
0 to 10Ω
CGND
Low Side Disable Signal INPUT
CGND
VCIN
PGND
NC
VSWH
1234567891011121314
CGND
LSDBL#
DISBL#
Reg5V THWN
CGND VSWH
VSWH
PWM
56
55
1.0 μF
54
53
52
GL
51
50
49
48
47
46
45
44
43
Thermal Warning
PWM INPUT
DISBL# INPUT
51 kΩ
+5 V
10 μF × 4
PGND
NC
VIN
15
16
17
18
19
20
VIN
21
VSWH
22
PGND
23
24
25
26
27
28
PGND
29 30 31 32 33 34 35 36 37 38 39 40 41 42
VIN
PAD
R2J20605ANP
VIN
VSWH
PAD
GH
BOOT
CGND
CGND
PAD
0.45 μH Vout
PGND
PGND
(2) Typical Notebook Application
VIN
19 V
10 μF × 4
VIN
15
16
17
18
PGND
19
20
VIN
21
VSWH
22
PGND
23
24
25
26
27
28
PGND
29 30 31 32 33 34 35 36 37 38 39 40 41 42
PGND
0 to 10Ω
NC
GH
VIN
VIN
PAD
CGND
BOOT
CGND
PAD
R2J20605ANP
VSWH
PAD
VCIN
PGND
NC
VSWH
0.1 μF
1234567891011121314
CGND
LSDBL#
DISBL#
Reg5V THWN
CGND VSWH
VSWH
PWM
Low Side Disable Signal INPUT
CGND
56
55
54
53
52
GL
51
50
49
48
47
46
45
44
43
DISBL# INPUT
Thermal Warning
PWM INPUT
1.0 μF
5.0 V
External
Power Supply
51 kΩ
+5 V
0.45 μH Vout
PGND
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 8 of 16
R2J20605ANP Preliminary
Test Circuit
I
IN
Vinput
Vcont
5 V pulse
A
V
V
IN
I
CIN
A
V
V
CIN
VCIN
DISBL#
R2J20605ANP
Reg5V LSDBL#
PWM
CGND
GH
GL
BOOT
VSWH
THWN PGND
VIN
Electric load
I
O
Note: P
= IIN × VIN + I
IN
P
= IO × V
OUT
Efficiency = P P
(DrMOS) = PIN – P
LOSS
Ta = 27°C
O
OUT
CIN
/ P
× V
IN
CIN
OUT
Averaging circuit
Average Output Voltage
V
V
O
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 9 of 16
R2J20605ANP Preliminary
Typical Data
Power Loss vs. Output Current
10
VIN = 12 V
9
VCIN = Reg5V = 5 V VOUT = 1.3 V
8
f
= 600 kHz
PWM
L = 0.45 μH
7 6 5 4
Power Loss (W)
3 2 1 0
0 5 10 15 20 25 30 40
Output Current (A)
Power Loss vs. Output Voltage
1.6
VIN = 12 V
1.5
VCIN = Reg5V = 5 V f
= 600 kHz
PWM
1.4
L = 0.45 μH IOUT = 30 A
1.3
Power Loss vs. Input Voltage
1.6
VCIN = Reg5V = 5 V
1.5
VOUT = 1.3 V f
= 600 kHz
PWM
1.4
L = 0.45 μH IOUT = 30 A
1.3
1.2
1.1
@ VIN = 12 V
1.0
0.9
Normalized Power Loss
0.8
0.7
35 4 6 8 10 2012 14 2216 18
Input Voltage (V)
Power Loss vs. Switching Frequency
1.6
VIN = 12 V
1.5
VCIN = Reg5V = 5 V VOUT = 1.3 V
1.4
L = 0.45 μH IOUT = 30 A
1.3
1.2
1.1
1.0
@ VOUT = 1.3 V
0.9
Normalized Power Loss
0.8
0.7
0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 Output Voltage (V)
1.2
= 600 kHz
1.1
PWM
1.0
@ f
0.9
Normalized Power Loss
0.8
4.4 250 500 750 1000 1250
0.7
Switching Frequency (kHz)
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 10 of 16
R2J20605ANP Preliminary
Typical Data (cont.)
Power Loss vs. Output Inductance
1.6
VIN = 12 V
1.5
VCIN = Reg5V = 5 V VOUT = 1.3 V
1.4
f
= 600 kHz
PWM
IOUT = 30 A
1.3
1.2
1.1
@ L = 0.45 μH
1.0
0.9
Normalized Power Loss
0.8
0.7
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Output Inductance (μH)
Average ICIN vs. Switching Frequency
80
VIN = 12 V VCIN = Reg5V = 5 V
70
VOUT = 1.3 V L = 0.45 μH
60
IOUT = 0 A
Power Loss vs. VCIN
1.6
VIN = 12 V
1.5
VOUT = 1.3 V f
= 600 kHz
PWM
1.4
L = 0.45 μH IOUT = 30 A
1.3
VCIN = Reg5V
1.2
1.1
@ VCIN = 5 V
1.0
0.9
Normalized Power Loss
0.8
1.0 4.5 5.0 5.5 6.0
0.7
VCIN (V)
50
40
30
Average ICIN (mA)
20
10
250 500 750 1000 1250
Switching Frequency (kHz)
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 11 of 16
R2J20605ANP Preliminary
Description of Operation
The DrMOS multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in a single QFN package. Since the parasitic inductance between each chip is extremely small, the module is highly suitable for use in buck converters to be operated at high frequencies. The control timing between the high-side MOS FET, low­side MOS FET, and driver is optimized so that high efficiency can be obtained at low output-voltage.
VCIN & DISBL#
The VCIN pin is connected to the UVL (under-voltage lockout) module, so that the buit-in 5 V regulator is disabled as long as VCIN is 7.4 V or less. On cancellation of UVL, the built-in 5 V regulator remains enabled until the UVL input is driven to 7.0 V or less.
The built-in 5 V regulator is a series regulator with temperature compensation. A ceramic capacitor with a value of 0.1 F or more must be connected between the CGND plane and the Reg5V Pin.
The output of 5 V regulator is monitored by the internal Supervisor circuits. When the Supervisor detects this output is more than 4.2 V (typ.), the driver state becomes active (figure1.1).
Figure 1.2 shows the application when the external 5 V regulator is used. When the Reg5V pin is applied into external 5 V, the Supervisor can activate the driver. In this application usage, VCIN should be connected to Reg5V.
The signal on pin DISBL# also enables or disables the circuit. When UVL disables the circuit, the built-in 5 V regulator does not operate, but when the signal on DISBL# disables the circuit, only output-pulse generation is terminated, and the 5 V regulator is not disabled.
Voltages from –0.3 V to VCIN + 0.3 V can be applied to the DISBL# pin, so on/off control by a logic IC or the use of a resistor, etc., to pull the DISBL# line up to VCIN are both possible.
VCIN DISBL# REG5V Driver State
L 0 Disable (GL, GH = L) H L Active Disable (GL, GH = L) H H Active Active H Open Active Disable (GL, GH = L)
12 V
VCIN
VCIN > 7.4 V
VCIN
5 V
IN
UVL &
5 V Regulator
To Internal
Logic
Supervisor
Reg5V
OUT
Figure 1.1 Typical 12 V Input Application
To Internal
Logic
IN
UVL &
5 V Regulator
Supervisor
OUT
Reg5V
External 5 V
Figure 1.2 External 5 V Application
(Activate Built-in 5 V Regulator)
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 12 of 16
R2J20605ANP Preliminary
PWM & LSDBL#
The PWM pin is the signal input pin for the driver chip. When the PWM input is high, the gate of the high-side MOS FET (GH) is high and the gate of the low-side MOS FET (GL) is low.
PWM GH GL
L L H H H L
The LSDBL# pin is the Low Side Gate Disable pin for "Discontinuous Conduction Mode (DCM)" when LSDBL# is low.
Figure 2 shows the Typical high side and low side gate switching and Inductor current (IL) during "Continuous Conduction Mode (CCM)" and low side gate disabled when asserting LSDBL# signal. This pin is internally pulled up to Reg5V with 150 k resistor.
When low side disable function is not used, keep this pin open or pulled up to VCIN.
CCM Operation (LSDBL# = "H" or Open mode)
IL
GH
GL
Figure 2.1 Typical Signals during CCM
DCM Operation (LSDBL# = "L")
IL
0 A
GH
GL
Figure 2.2 Typical Signals during DCM
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 13 of 16
R2J20605ANP Preliminary
The PWM input is TTL level and has hysteresis. When the PWM input signal is abnormal, e.g., when the signal route from the control IC is abnormal, the tri-state function turns off the high- and low-side MOS FETs. This function operates when the PWM input signal stays in the input hysteresis window for 100 ns (typ.). After the tri-state mode has been entered and GH and GL have become low, a PWM input voltage of 3.4 V or more is required to make the circuit return to normal operation.
PWM
GH
GL
PWM
3.4 V
1.2 V
3.4 V
1.2 V
100 ns (t
100 ns (t
HOLD-OFF
HOLD-OFF
)
)
100 ns (t
100 ns (t
HOLD-OFF
HOLD-OFF
)
)
GH
GL
Figure 3 PWM Shutdown-Hold Time Signal
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 14 of 16
R2J20605ANP Preliminary
The equivalent circuit for the PWM-pin input is shown in the next figure. M1 is in the ON state during normal operation; after the PWM input signal has stayed in the hysteresis window for 100 ns (typ.) and the tri-state detection signal has been driven high, the transistor M1 is turned off.
When VCIN is powered up, M1 is started in the OFF state regardless of PWM Low or Open state. After PWM is asserted high signal, M1 becomes ON and shifts to normal operation.
VCIN
DISBL#
Tri-state detection signal
To internal control
PWM Pin
M1
20 k
Input
Logic
20 k
Figure 4 Equivalent Circuit for the PWM-pin Input
THWN
This Thermal Warning feature is the indication of the high temperature status. THWN is an open drain logic output signal and need to connect a pull-up resistor (ex.51 k) to THWN for Systems
with the thermal warning implementation. When the chip temperature of the internal driver IC becomes over 115°C, Thermal warning function operates. This signal is only indication for the system controller and does not disable DrMOS operation. When thermal warning function is not used, keep this pin open.
115100
Thermal Warning
TIC (°C)
THWN output Logic Level
"H"
Normal operating
"L"
Figure 5
MOS FETs
The MOS FETs incorporated in R2J20605ANP are highly suit abl e fo r sy nch r on ous- rect i fi cati on buck conversion. For the high-side MOS FET, the drain is connected to the VIN pin and the source is connected to the VSWH pin. For the low-side MOS FET, the drain is connected to the VSWH pin and the source is connected to the PGND pin.
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 15 of 16
R2J20605ANP Preliminary
Package Dimensions
P-HVQFN56-8x8-0.50 0.2g
H
D
D
E
E
H
56
1
Index mark
1
c
c
y
PVQN0056KA-A
2942
2843
15
E
Z
14
Z
D
A
1
A
RENESAS CodeJEITA Package Code Previous Code
MASS[Typ.]
29
28
15
14
b b
1
3.0
0.0
42
43
3.0
e
0.0
0.3
0.4C
0.4
1.0
1.0
Dimension in Millimeters
p
L
3.0
56
1
3.0
Reference
Symbol
D E A A A b b e L x y y
t H H
Z Z
c
c
2
1
1
p
1
D E D E
1
MaxNomMin
8.058.007.95
8.058.007.95
0.95
0.005
0.20
0.25
0.30
0.23
0.50
0.40 0.50 0.60
0.05
8.20
8.10
8.30
8.308.208.10
0.75
0.75
0.22
0.17 0.27
0.20
Ordering Information
Part Name Quantity Shipping Container
R2J20605ANP#G3 2500 pcs Taping Reel
REJ03G1821-0300 Rev.3.00 Feb 26, 2010 Page 16 of 16
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5. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations.
6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein.
7. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc.
"Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; safety equipment; and medical equipment not specifically
designed for life support.
"Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical
implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life.
8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges.
9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you.
10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations.
11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries.
(Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.
SALES OFFICES
Refer to "http://www.renesas.com/" for the latest and detailed information.
Renesas Electronics America Inc.
2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A. Tel: +1-408-588-6000, Fax: +1-408-588-6130
Renesas Electronics Canada Limited
1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada Tel: +1-905-898-5441, Fax: +1-905-898-3220
Renesas Electronics Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K Tel: +44-1628-585-100, Fax: +44-1628-585-900
Renesas Electronics Europe GmbH
Arcadiastrasse 10, 40472 Düsseldorf, Germany Tel: +49-211-65030, Fax: +49-211-6503-1327
Renesas Electronics (China) Co., Ltd.
7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China Tel: +86-10-8235-1155, Fax: +86-10-8235-7679
Renesas Electronics (Shanghai) Co., Ltd.
Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898
Renesas Electronics Hong Kong Limited
Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong Tel: +852-2886-9318, Fax: +852 2886-9022/9044
Renesas Electronics Taiwan Co., Ltd.
7F, No. 363 Fu Shing North Road Taipei, Taiwan Tel: +886-2-8175-9600, Fax: +886 2-8175-9670
Renesas Electronics Singapore Pte. Ltd.
1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632 Tel: +65-6213-0200, Fax: +65-6278-8001
Renesas Electronics Malaysia Sdn.Bhd.
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: +60-3-7955-9390, Fax: +60-3-7955-9510
Renesas Electronics Korea Co., Ltd.
11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea Tel: +82-2-558-3737, Fax: +82-2-558-5141
© 2010 Renesas Electronics Corporation. All rights reserved.
http://www.renesas.com
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