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Requests for Safety Design
Precautions on Using This Manual
Revision History SH7086 CPU Board M3A-HS86User's Manual
1.8 Absolute Maximum Ratings...................................................................................................................................... 1-11
2.4 Serial Port Interface.................................................................................................................................................... 2-8
2.6 Power Supply Circuit................................................................................................................................................ 2-13
3.1.2 Serial Port Connector (J3)................................................................................................................................. 3-5
3.1.3 External Power Supply Connectors for the SH7086 (J4) ..................................................................................3-6
3.1.4 Power Supply Connector (J5) ........................................................................................................................... 3-7
3.1.5 User I/O Connector (J6-J8)...............................................................................................................................3-8
3.2 Outline of Switches and LEDs.................................................................................................................................. 3-17
3.2.1 SH7086 Power Supply Select Jumpers (JP1)................................................................................................. 3-18
3.2.3 Switch and LED Functions.............................................................................................................................. 3-20
3.3 Board Dimensions of M3A-HS86.............................................................................................................................. 3-22
The M3A-HS86 is the CPU board designed for users to evaluate the functionality and performance of the SH7086
group of Renesas Technology original microcomputers, as well as develop and evaluate the applic ation software for
this group of microcomputers. The SH7086's data bus, address bus and various internal peripheral circuit function pins
are connected to the extension connector of the M3A-HS86, allowing users to evaluate the timing relationship with
peripheral devices using measurement instruments or develop extension boards tailored to suit development
purposes. Furthermore, the E10A-USB or the on-chip emulator made by Renesas Technology can also be connected
to the M3A-HS86.
1.2 Configuration
Figure1.2.1 shows an example of system configuration using the M3A-HS86.
*
Serial Port
Connector
SH7086 CPU Board
M3A-HS86
5V DC
Power Supply
(1.5A min.)
Overview
H-UDI Connector
(14-pin or 36-pin)
SH7086
Extension
Board
* Can be created according
to applications
High-performance
Embeded Workshop(HEW)
SuperH RISC engine
C/C++ Compiler Package
*: It is necessary to buy separately for software development.
Extension
Connector
HEW
debugger
*
*
Host
Computer
Figure1.2.1 System Configuration Example of M3A-HS86
USB
*
E10A-USB
*
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1
1.3 External Specifications
Table1.3.1 lists external specifications of M3A-HS86.
Table1.3.1 External Specifications of M3A-HS86
No. Item Content
SH7086
• Input(XIN) clock : 10MHz
• Bus clock : 40MHz,max
1 CPU
Memory
2
*M3A-HS86(3.3V version) only
3 Connectors
4 LED
5 Switches
6 Package Dimensions
• CPU clock : 80MHz,max
• On-chip memory
Flash memory : 512KB
RAM : 32KB
• SDRAM : 16 Mbytes.(16-bit bus width) 1pc
• External flash memory enabled to mount
• Extension connector (Bus, I/O, VCC, GND)
• User I/O connector (SH7086’s MTU2 and A/D function pins)
• Serial port connector (D-sub 9pins)
• H-UDI connector (36pins)
• H-UDI connector (14pins)
• POWER LED (1pc.)
• LED for interrupt switch (1pc.)
• User LED (7pcs.)
• Reset switch (1pc.)
• NMI switch (1pc.)
• IRQ1 switch (1pc.)
• DIP switch for system setting (1pc.,4 poles)
• DIP switch for users (1pc.,4 poles)
• Dimensions :100mm x 100mm
• Mounting form :6-layer, double-side mounted
• Board configuration :1 board
Overview
1.3 External Specifications
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1.4 External View
Figure1.4.1 shows the external view of M3A-HS86.
Overview
1.4 External View
Figure1.4.1 External View of M3A-HS86 (IC socket mounted version)
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1.5 M3A-HS86 Block Diagram
Figure1.5.1 shows the system block diagram of M3A-HS86.
H-UDI Connector
(36pin)
H-UDI Connector
(14pin)
Serial Port
Connector
Overview
1.5 M3A-HS86 Block Diagram
User I/O
Connector
AUD
Flash Memory
(Not mounted)
16
SH7086 CPU Board
M3A-HS86
*
Bus Clock: 40MHz
Figure1.5.1 System Block Diagram of M3A-HS86
H-UDI
SH7086
(80MHz)
16 or 3216
16 or 32
Extension Connectors
SDRAM
16MB
* : Only for M3A-HS86 (3.3V version)
*
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1.6 M3A-HS86 Board Overview
Figure1.6.1 shows the M3A-HS86 board overview.
< Top View of the Component Side >
U2 Clock Buffer
J3
Serial Port
Connector
U5
RS232C Driver
J14
Extension Connector
J7,J8
User I/O Connector
User LED
6 - 8
*1
*1
JP2
FWE Pin
Select
Jumper
*1
JP1
Ppower Supply
Select Jumper
U1
SH7086
J5
Power Supply
Connector
SW1
Power Switch
Overview
1.6 M3A-HS86 Board Overview
LED1
Power LED
SW4
DIP Switch
for System Setting
J1
H-UDI Connector
(36-pin)
J2
H-UDI Connector
(14-pin)
SW2
RESET
Switch
< Top View of the Solder Side >
U8 3.3V
Voltage Regulator
J11
Extension Connector
J9
Extension Connector
*1
*1
SW3
DIP Switch
for Users
U6
Reset IC
LED2-5
User LED
LED9
LED for Interrupt
Confirmation
J13
Extension Connector
U3
Flash Memory
SW5
NMI
Switch
*1
U4
SDRAM
*3
*2
SW7
MRES
Switch
SW6
IRQ1
Switch
*1
J12
Extension Connector
J6
User I/O Connector
*1
*1
J10
Extension Connector
Notes: *1: Not mounted *2: 3.3V v er s io n only *3: Can be mounted only for 3.3V version
*1
Figure1.6.1 M3A-HS86 Board Overview
Rev.1.0 Feb 6, 2007 1-6
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Table1.6.1 lists main components mounted in the M3A-HS86.
Table1.6.1 Main Components Mounted in the M3A-HS86
Symbol Parts Name Remarks Recommended parts number for
U1 CPU SH7086 (Renesas)
U1 CPU socket NQPACK176SD
U2 Clock buffer Not mounted CY2305SC-1 (Cypress)
Not mounted
U3 Flash memory
U4 SDRAM 3.3V version only
U5 RS-232C driver
U6 Reset IC M51957BFP (Renesas)
U7 Logic IC
U8 3.3V voltage regulator
X1 Oscillator 10.00MHz
J1 H-UDI connector 36-pin type
J2 H-UDI connector 14-pin type
J3 Serial port connector
J4 External power supply connector Not mounted A2-2PA-2.54DSA (Hirose)
J5 Power supply connector
J6 User I/O connector Not mounted XG4C-2634 (Omron)
J7,J8
J9,J11,J12
J10.J13
J14
LED1 Power LED Blue
LED2-8 User LED Green
LED9 LED for interrupt confirmation
SW1 Power switch
SW2 Reset switch
SW3 DIP switch for users
SW4 DIP switch for system setting
SW5 NMI switch
SW6 IRQ1 switch
SW7 MRES switch Not mounted B3SN-3012 (Omron)
User I/O connector
Extension connector
Extension connector
Extension connector
(Can be mounted only
for 3.3V version)
Not mounted A2-3PA-2.54DSA (Hirose)
Not mounted XG4C-2031 (Omron)
Not mounted XG4C-4031 (Omron)
Not mounted
Red/Yellow green
(Two colors)
1.6 M3A-HS86 Board Overview
not-mounted components
3428-6002LCSC
(Sumitomo 3M)
Overview
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1.7 M3A-HS86 Memory Mapping
1.7 M3A-HS86 Memory Mapping
Figure1.7.1, Figure1.7.2 and Figure1.7.3 show a memory mapping example of SH7086 in the M3A-HS86.
H'0000 0000
H'0007 FFFF
H'0008 0000
Logical space of the SH7086
MCU mode 3
(Single Chip mode)
H'0000 0000
On-chip ROM (512KB)
H'0007 FFFF
H'0008 0000
Memory Mapping
of the M3A-HS86
On-chip ROM (512KB)
Overview
H'FFFF 3FFF
H'FFFF 4000
H'FFFF BFFF
H'FFFF C000
H'FFFF FFFF
Reserved
H'FFFF 3FFF
On-chip RAM
(32KB)
On-chip peripheral Module
H'FFFF 4000
H'FFFF BFFF
H'FFFF C000
H'FFFF FFFF
On-chip RAM
On-chip peripheral Module
Figure1.7.1 Memory Mapping Example of SH7086 (MCU mode 3)
Reserved
(32KB)
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H'0000 0000
H'03FF FFFF
H'0400 0000
H'07FF FFFF
H'0800 0000
H'0BFF FFFF
H'0C00 0000
H'0FFF FFFF
H'1000 0000
H'13FF FFFF
H'1400 0000
H'17FF FFFF
H'1800 0000
H'1BFF FFFF
H'1C00 0000
H'1FFF FFFF
H'2000 0000
Logical space of the SH7086
MCU mode 0,1
(On-chip ROM disabled mode)
CS0 space: 64MB
CS1 space: 64MB
CS2 space: 64MB
CS3 space: 64MB
CS4 space: 64MB
CS5 space: 64MB
CS6 space: 64MB
CS7 space: 64MB
Overview
1.7 M3A-HS86 Memory Mapping
Memory Mapping
of the M3A-HS86
H'0000 0000
H'007F FFFF
H'03FF FFFF
H'0400 0000
H'07FF FFFF
H'0800 0000
H'0BFF FFFF
H'0C00 0000
H'0CFF FFFF
H'0FFF FFFF
H'1000 0000
H'13FF FFFF
H'1400 0000
H'17FF FFFF
H'1800 0000
H'1BFF FFFF
H'1C00 0000
H'1FFF FFFF
H'2000 0000
Flash Memory (8MB)
User Area
User Area
User Area
SDRAM(16MB)
User Area
User Area
User Area
User Area
User Area
*1
*2
Reserved
H'3FFF FFFF
H'4000 0000
H'7FFF FFFF
H'8000 0000
H'FFF7 FFFF
H'FFF8 0000
H'FFF9 FFFF
H'FFFA 0000
H'FFFF 3FFF
H'FFFF 4000
H'FFFF BFFF
H'FFFF C000
H'FFFF FFFF
CS8 space: 1GB
Reserved
SDRAM Mode setting
Reserved
On-chip RAM
(32KB)
On-chip peripheral Module
H'3FFF FFFF
H'4000 0000
H'7FFF FFFF
H'8000 0000
H'FFF7 FFFF
H'FFF8 0000
H'FFF9 FFFF
H'FFFA 0000
H'FFFF 3FFF
H'FFFF 4000
H'FFFF BFFF
H'FFFF C000
H'FFFF FFFF
On-chip peripheral Module
Notes
*1: For the case that 8MB flash memory is mounted (M3A-HS86(3.3V version) only)
*2: M3A-HS86(3.3V version) only
Figure1.7.2 Memory Mapping Example of SH7086 (MCU mode 0,1)
- Operational specifications Connectors, switches and LEDs
• SDRAM : 16 Mbytes(16-bit bus width) 1pc.
• External flash memory enabled to mount
• SH7086 extension connector
• Switches and LEDs
• H-UDI connector
Detailed in Chapter 3.
Rev.1.0 Feb 06. 2007 2-2
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Functional Overview
2
2.2 CPU
The M3A-HS86 contains the 32-bit RISC microcomputer SH7086 that operates with a maximum 80MHz of CPU
clock frequency. The SH7086 includes 512-Kbyte flash memory, and 32-Kbyte SRAM, making it useful in a wide
range of applications from data processing to equipment control.
The M3A-HS86 can be operated with a maximum 80MHz of CPU clock frequency (external bus 40MHz, max) using
a 10MHz input clock.
Figure2.2.1 shows the SH7086 block diagram in the M3A-HS86.
The SH7086 includes 512-Kbyte flash memory and 32-Kbyte SRAM.
2.3.2 SDRAM
The M3A-HS86 (3.3V version) mounts 16MB SDRAM as standard equipment. SDRAM is controlled by the bus
state controller built into SH7086. Table2.3.1 lists SDRAM specifications used in M3A-HS86. Figure2.3.1 shows the
block diagram of SDRAM connection.
Table2.3.1 SDRAM Specifications
Specifications Contents
Configuration 16 Mbytes (16-bit bus) x 1pc.
Capacity 16 Mbytes
Access Time 5.4ns
CAS Latency 2(at 40MHz bus clock)
Refresh Interval 4,096 refresh cycles every 64ms
Row Address A11- A0
Column Address A8 - A0
Number of Banks 4-bank operation controlled by BA0 and BA1
2.3 Memory
SH7086
A14
A13
A12-A1
CK
CKE
CS3
RASL
CASL
RDWR
DQMLU
DQMLL
D15-D0
11
16
SDRAM
(8M Word x 16bit)
BA1
BA1
BA0
BA0
A11-A0
A11-A0CLK
CLK
CKE
CKE
CS#
CS
RAS#
RAS
CAS
CASWE#
WE
DQMU
DQMU
DQML
DQML
DQ15-DQ0
Figure2.3.1 Block Diagram of SDRAM Connection
Rev.1.0 Feb 06. 2007 2-4
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Functional Overview
2
Table2.3.2 lists an example of bus state controller settings for operation with the SH7086 Bus clock at 40MHz.
Table2.3.2 Example of Bus State Controller Settings at SDRAM
User Area SDRAM Controller Settings
CS3 CS3 Space Bus Control Register(CS3BCR)
Initial value :H'36DB 0600
Recommended set value : H'1000 4400
- Specify idle cycles between write-read cycles and write-write cycles
IWW[2:0] = 001 ; 1 idle cycle inserted
- Specify memory type : TYPE[2:0] = 100 ;SDRAM
- Data bus size : BSZ[1:0] = B'10 ;16-bit size
CS3 Space Wait Control Register(CS3WCR)
Initial value : H'0000 0500
Recommended set value :H'0000 4891
- Number of Auto-Precharge Completion Wait Cycles
TRP[1:0] = 10 ;3 cycles
- Wait Cycles between ACTV Command and READ(A)/WRIT(A) Command
TRCD[1:0] = 10 ;3 cycles
Initial value : H'0000 0000
Recommended set value : H'0000 0809
- Refresh control
RFSH = 1 ; Refresh enabled
- Refresh control
RMODE = 0 ; Auto refresh
- Bank active mode
BACTV = 0 ;Auto precharge mode
- Number of area3 row address bits
A3ROW[1:0] = 01 ;12 bits
- Number of area3 column address bits
A3COL[1:0] = 01 ;9 bits
Refresh Timer Control/Status Register(RTCSR)
Initial value : H'0000 0000
Recommended set value : H’A55A 0010
- Clock select
CKS[2:0] = 010 ;Bφ/16
- Refresh times
RRC[2:0] = 000 ; 1 time
Refresh Time Constant Register(RTCOR)
Initial value : H'0000 0000
Recommended set value : H'A55A 0027
*The following shows refresh request intervals in cases when clock select is set to Bφ/16.
1 cycle :400nsec(40MHz/16 = 2.5MHz)
Refresh request intervals for the SDRAM : every 15.625μsec
15.625μsec /400nsec = 39(0x27) cycles / refresh
→Number of
ACTV/REF/MRS Command cycles.
2.3 Memory
Rev.1.0 Feb 06. 2007 2-5
REJ10J0916-0100
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