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User’s Manual
SH7619 CPU Board
M3A-HS19
User’s Manual
Renesas 32-Bit RISC Microcomputers
SuperH™ RISC engine Family/SH7619 Group
Rev.1.01 2008.10
Notes regarding these materials
1. This document is provided for reference purposes only so that Renesas customers may select the appropriate
Renesas products for their use. Renesas neither makes warranties or representations with respect to the
accuracy or completeness of the information contained in this document nor grants any license to any
intellectual property rights or any other rights of Renesas or any third party with respect to the information in
this document.
2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising
out of the use of any information in this document, including, but not limited to, product data, diagrams, charts,
programs, algorithms, and application circuit examples.
3. You should not use the products or the technology described in this document for the purpose of military
applications such as the development of weapons of mass destruction or for the purpose of any other military
use. When exporting the products or technology described herein, you should follow the applicable export
control laws and regulations, and procedures required by such laws and regulations.
4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and
application circuit examples, is current as of the date this document is issued. Such information, however, is
subject to change without any prior notice. Before purchasing or using any Renesas products listed in this
document, please confirm the latest product information with a Renesas sales office. Also, please pay regular
and careful attention to additional and different information to be disclosed by Renesas such as that disclosed
through our website. (http://www.renesas.com )
5. Renesas has used reasonable care in compiling the information included in this document, but Renesas
assumes no liability whatsoever for any damages incurred as a result of errors or omissions in the information
included in this document.
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light of the total system before deciding about the applicability of such information to the intended application.
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(2) surgical implantations
(3) healthcare intervention (e.g., excision, administration of medication, etc.)
(4) any other purposes that pose a direct threat to human life
Renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who
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Technology Corp., its affiliated companies and their officers, directors, and employees against any and all
damages arising out of such applications.
9. You should use the products described herein within the range specified by Renesas, especially with respect
to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation
characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or
damages arising out of the use of Renesas products beyond such specified ranges.
10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific
characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use
conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and
injury or damage caused by fire in the event of the failure of a Renesas product, such as safety design for
hardware and software including but not limited to redundancy, fire control and malfunction prevention,
appropriate treatment for aging degradation or any other applicable measures. Among others, since the
evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or
system manufactured by you.
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approval from Renesas.
13. Please contact a Renesas sales office if you have any questions regarding the information contained in this
document, Renesas semiconductor products, or if you have any other inquiries.
1.8 Absolute Maximum Ratings...................................................................................................................................... 1-10
2.4 Serial Port Interface.................................................................................................................................................. 2-13
2.6 LAN Port Interface.................................................................................................................................................... 2-15
2.8 Power Supply Circuit................................................................................................................................................ 2-19
3.2 Switches and LEDs ..................................................................................................................................................3-15
3.2.2 Features of Switches and LEDs...................................................................................................................... 3-18
The M3A-HS19 is a CPU board designed to evaluate the feature and performance of the SH7619 Group of Renesas Technology
original MCU, as well as developing and evaluating the application software for the MCUs.
SH7619 data bus, address bus and on-chip peripheral pins are all connected to expansion connectors and appropriate connectors
to allow for the timing evaluation with peripherals using measurement instruments, and the development of the optional boards
according to its application. Furthermore, it can be connected with an RS-232C connector and a LAN connector, and a PC card
can be mounted on the board.
Renesas Technology E10A-USB on-chip emulator can also be connected to the M3A-HS19.
1.2 Configuration
Figure 1.2.1 shows an example of system configuration using the M3A-HS19.
The M3A-HS19 CPU board includes the SH7619, the 32-bit RISC MCU operates with a maximum frequency of 125 MHz.
The SH7619 is equipped with an Ethernet controller that includes an IEEE802.3u compliant Media Access Controller and
a Physical Layer Transceiver. Moreover, the SH7619 has both a 16-KB U memory (RAM) and a 16-KB instruction/data
unified cache memory. These on-chip modules enable the SH7619 to be used in a wide range of applications from data
processing to control equipments.
The M3A-HS19 can be operated at a maximum frequency of 125 MHz (external bus: 62.5 MHz, max) using a 15.625 MHz
input clock. The dedicated clock of 25.000 MHz input from CK_PHY pin is used as an on-chip PHY clock.
Figure 2.2.1 shows the SH7619 pin assignments.
The M3A-HS19 includes the SH7619 on-chip U memory, an external flash memory, external SDRAM and EEPROM.
Details are described below (Except the PC card).
2.3.1 SH7619 U Memory and Cache Memory
The SH7619 has a 16-KB (RAM) U memory module (address: H’E55FC000~H’E55FFFFF) and a 16-KB
instruction/data-unified cache memory.
The M3A-HS19 comes standard with a flash memory listed in Table 2.3.1 to store a user program.
The flash memory is an external bus 16-bit mode fixed and operates at 3.3 V single. The write-protection of flash memory
can be enabled or disabled by DIP switches (SW4-4).
Figure 2.3.1 shows the Flash Memory Block Diagram. Table 2.3.2 lists setting examples of the bus state
controller(write/read) when the SH7619 bus clock operates at 62.5 MHz (clock mode 1), and Figure 2.3.2 shows read and
write access timing example.
Table 2.3.1 Flash Memory Specifications
Part Number Bus Size Capacity Access Time
S29GL032A90TFIR4 16-bit mode 4 MB (16 bits x 2 Mwords x 1) 90 ns
SH7619 (U1)
D15-D0
A21-A1
RD#
WE0#
CS0#
3.3 V
21
16
3.3 V
3.3 V
3.3 V
Reset Signal
NC
3.3 V
DIP Switch
(SW4-4)
S29GL032A90TFIR4 (U2)
(2 Mwords x 16 bits)
A20-A0
DQ15-DQ0
BYTE#
OE#
WE#
CE#
RESET#
RY/BY#
WP#
Rev.1.01
REJ10J1351-0101
Oct 28, .2008 2-4
Figure 2.3.1 Flash Memory Block Diagram
Features and Specifications
A
2
Table 2.3.2 Setting Example of Bus State Controller (Flash Memory Write and Read)
User Area Applicable Device Settings for Bus State Controller
CS0 S29GL032A90TFIR4 CS0 Space Bus Control Register: CS0BCR
Figure 2.3.2 Flash Memory Read and Write Access Timing Example
tAD1tAD1
tCSD1
tRSDtRSD
tDF(CE)
tRDS1tDHtDStDH
tRDH1
tDF(OE)
Rev.1.01
REJ10J1351-0101
Oct 28, .2008 2-5
Features and Specifications
2
2.3.3 External Synchronous DRAM (SDRAM)
The M3A-HS19 is provided with a 16-MB synchronous DRAM (SDRAM) as an external main memory. T he SDRAM is
controlled by the SH7619 on-chip bus state controller. The SDRAM is accessed in 16-bit bus.
Table 2.3.3 lists SDRAM specifications used on the M3A-HS19, and Figure 2.3.3 shows its block diagram.
Table 2.3.3 SDRAM Specifications
Items Description
Part Number EDS1216AATA-75E
Configuration 16 MB (16-bit bus width) x 1
Capacity 16 MB
Access Time 5.4 ns
CAS Latency 2 (at 62.5 MHz bus clock)
Refresh Interval 4,096 refresh cycles in every 64 ms
Row Address A1 1- A0
Column Address A8 - A0
Number of Banks 4-banks controlled by BA0, BA1
2.3.3 External Synchronous DRAM
3.3V
EDS1216AATA-75(U3)
(
SH7619(U1)
A14-13BA1-0
A12-1
CS3#
CKIO
CKE
RD/WR#
RAS#
CAS#
DQMLU
DQMLL
D15-0
x 16
2
11
16
2 M x 16 bits x 4-bank)
A11-0
CS#
CLK
CKE
WE#
RAS#
CAS#
DQMU
DQML
DQ15-DQ0
Figure 2.3.3 External SDRAM Block Diagram
Rev.1.01
Oct 28, .2008 2-6
REJ10J1351-0101
Features and Specifications
2
A power-on sequence is required to use a SDRAM. Power-on sequence is to initialize the pin function controller (PFC),
set registers in the bus state controller and write data in the SDRAM mode register.
Table 2.3.4 lists the access address when writing in the SDRAM mode register on the CS3 space.
• CAS latency: 2 cycles
To write data in the SDRAM mode register as shown in Table 2.3.4, write the arbitrary data in words to the address of
H'F8FD 5440 (the data in this case is ignored). Following commands are sequentially issued to the SDRAM by the word
writing.
1.All banks precharge command (PALL)
Idle cycles (Tpw), of which number is specified by bits WTRP1 and WTRP0 in CS3WCR, are inserted between the PALL
and the first REF commands.
2. Auto-refreshing command (REF) for eight times
Idle cycles (Trc), of which number is specified by bits WTRP1 and WTRP0 in CS3WCR are inserted after issuing REF
command