Renesas M16C/62 Application Note
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PPLICATION NOTE
M16C/62 Group
A-D Converter OP-AMP Gain Adjustment Connection Mode
1. Abstract
This application note describes the operation of gain adjustment by using operational amplifier for A-D converter.
2. Introduction
This application note is applied to the M16C/62 group Microcomputers.
This program can be also operated under the condition of M16C family products with the same SFR (Special Function
Register) as M16C/62 Group products. Because some functions may be modified of the M16C family products, see the user’s
manual. When using the functions shown in this application note, evaluate them carefully for an operation.
REJ05B0442-0100Z/Rev.1.00
March 2004
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M16C/62 Group
A-D Converter OP-AMP Gain Adjustment Connection Mode
3. Detailed description
This example describes the operation of gain adjustment by using external operational amplifier for M16C/62 group
microcomputers.
3.1 Example of wiring
Figure 1 illustrates the operation of gain adjustment by using external operational amplifier.
380k
330k
270k
220k
170k
150k
120k
100k
7
+5V
VCC
VCC
VREF
N7
N6
N5
N4
N3
N2
N1
N0
NEX0
NEX1
VSS
VSS
M16C/62 group
100k
BA4558
100k
6
+
5
Input
100k
+12V
2
8
-
+
3
1
4
-12V
Figure1. Example of wiring
Note
(1)In this example, using 2nd inverting amplified circuit, feedback to in-phase.
The result shows a difference from this sample when use non-inverting amplified circuit.
(2)In this example, values input to AN0 to AN7 are amplified as below, due to the ratio of the value of resistance.
AN0: 100k/100k=1 (1 time amplified)
AN1: 120k/100k=1.2 (1.2 times amplified)
AN2: 150k/100k=1.5 (1.5 time amplified)
AN3: 170k/100k=1.7 (1.7 times amplified)
AN4: 220k/100k=2.2 (2.2 times amplified)
AN5: 270k/100k=2.7 (2.7 times amplified)
AN6: 330k/100k=3.3 (3.3 times amplified)
AN7: 380k/100k=3.8 (3.8 times amplified)
REJ05B0442-0100Z/Rev.1.00
March 2004
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M16C/62 Group
A-D Converter OP-AMP Gain Adjustment Connection Mode
3.2 How to set up
This section shows the setting procedures when A-D conversion is carried out, for the output of the gain adjustment, by using
external operational amplifier. Examples of A-D conversion with sample & hold function for one-shot mode and 10-bit mode are
described.
(1) Setting ADCON2 register (A-D control register 2)
Setting A-D conversion method and frequency select bit
1
b0 b7
0
SMP: A-D conv ersi o n met hod sel e ct bit
"0": Without sample & hold
"1": With sample & hold
DGSEL1-0: A-D input group select bit (Note 1)
CKS2: Frequency selected bit 2 (Note 1,2)
Note 1: Only applied to M16C/62P group. For other group please set to "00".
Note 2: Select the frequency of φAD for M16C/62P group according to the following combination.
CKS2 CKS1 CKS0
0 0 0 Divided-by-4 of fAD
0 0 1 Divided-by-2 of fAD
0 1 0
0 1 1
1 0 0 Divided-by-12 of fAD
1 0 1 Divided-by-6 of fAD
1 1 0
1 1 1
fAD
Divided-by-3 of fAD
"00": Select port P10 group
"01": Don’t set it
"10": Select port P0 group
"11": Select port P2 group
"0": fAD, fAD divided by 2 or fAD divided by 4 is selected
"1": fAD divided by 3, fAD divided by 6 or fAD divided by 12
is selected
φAD
(2) Setting ADCON0 register (A-D control register 0)
Analog input pin select bit, A-D operation mode, frequency select bit
b0 b7
0 0 0 0
CH2 to 0: Analog input pin select bit
Set input pin for A-D conversion
MD1 to 0: A-D operation mode select bit 0
Set to "00" (one-shot mode)
TRG: Trigger select bit
Set to "0" (Software trigger)
DST: A-D conversion start flag
CKS0: Frequency select bit 0 (Note 3)
Note 3: Refer to "3.2 (1) Note 2" for details the setting example for M16C/62P group.
Set to "0" (A-D conversion disabled)
"0": fAD divided by 4 is selected
"1": fAD divided by 2 is selected
REJ05B0442-0100Z/Rev.1.00
March 2004
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M16C/62 Group
A-D Converter OP-AMP Gain Adjustment Connection Mode
(3) Setting ADCON1 register (A-D control register 1)
Setting A-D operation mode select bit 1, 8/10-bit mode select bit, frequency select bit 1, external op- amp connection
mode bit.
b0b7
0 1 1 1 1
SCAN1 to 0: A-D sweep pin select bit
Invalid in one-shot mode
MD2: A-D operation mode select bit 2
BITS: 8/10 bit mode select bit
CKS1: Frequency select bit 1 (Note 1)
VCUT: VREF connection bit
OPA1 to OPA0: External op-amp connection mode bit
Note 1: Refer to "3.2 (1) Note 2" for details the setting example for M16C/62P group.
Set to "0"
Set to "1" (10-bit mode)
"0": fAD divided by 2 or fAD divided by 4 is selected
"1": fAD is selected
Set to "1" (VREF connected)
Set to "11" (External op-amp connection mode)
(4) ADIC register (A-D interrupt control register)
b0 b7
0 0 0 0 0
ILVL2 to 0: Interrupt priority level select bit
Select interrupt priority select level
IR : Interrupt request bit
No interrupt requested
(5) Waiting until external op-amp operation is stable
Waiting until external op-amp operation is stable. (Varied from the op-amp being used)
In the wiring example of 3.1, it takes 50µs until input value to ANEX1 pin becomes stable.
About 50µs
Input to ANEX1 pin
(6) A-D conversion start
A-D conversion start when setting ADST bit of ADCON0 register to "1".
REJ05B0442-0100Z/Rev.1.00
March 2004
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