
HD74LS279
Quadruple S-R Latches
Features
• Ordering Information
Part Name Package Type
HD74LS279P DILP-16 pin
HD74LS279FPEL SOP-16 pin (JEITA)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
REJ03D0474-0400
Rev.4.00
May 10, 2006
Package
Abbreviation
P —
FP EL (2,000 pcs/reel)
Taping Abbreviation
(Quantity)
1R
2
1
1S
3
1S
2
4
1Q
5
2R
6
2S
7
2Q
GND
8
(Top view)
161
15
14
13
12
11
10
V
CC
4S
4R
4Q
3S
2
1
3S
3R
9
3Q
Rev.4.00, May 10, 2006, page 1 of 4

HD74LS279
Function Table
Inputs Output
S** R Q
H H Q0
L H H
H L L
L L H*
Notes: 1. H; high level, L; low level
2. Q0; The level of Q before the indidicated input conditions were established.
3. *; This output level is psodo stable; that is it may not persist when S and R inputs return to their inactive
(high) level.
4. **; For latches with double S inputs; H; both S inputs high, L; one or b oth S inputs low.
Block Diagram (1/4)
R
S
1
S
2
Q
Absolute Maximum Ratings
Item Symbol Ratings Unit
Supply voltage VCC 7 V
Input voltage VIN 7 V
Power dissipation PT 400 mW
Storage temperature Tstg –65 to +150 °C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item Symbol Min Typ Max Unit
Supply voltage VCC 4.75 5.00 5.25 V
Output current
Operating temperature Topr –20 25 75 °C
IOH — — –400 µA
I
— — 8 mA
OL
Rev.4.00, May 10, 2006, page 2 of 4