RENESAS LS 221 Datasheet

Page 1
HD74LS221
Dual Monostable Multivibrators
REJ03D0458–0300
Rev.3.00
Jul.15.2005
Typical triggering and clearing sequence are illustrated as a part of the switching characteristics waveforms. Pulse width stability is achieved through internal compensation and is virtually independent of V
In most applications, pulse stability will only be limited by the accuracy of external timing components. Jitter-free operation is maintained over the full temperature and V to 10 µF) and more than one decade of timing resistance (2 kΩ to 100 k).
noise of typically 1.5 V is also provided by internal latching circuitry. Once
CC
and temperature.
CC
range for more than six decades of timing capacitance (10 pF
CC
Throughout these ranges, pulse width is defined by the relationship: t
w (out)
Features
Ordering Information
Part Name Package Type
HD74LS221P DILP-16 pin
HD74LS221RPEL SOP-16 pin (JEDEC) Note: Please consult the sales office for the above package availability.
Package Code (Previous Code)
PRDP0016AE-B (DP-16FV)
PRSP0016DG-A (FP-16DNV)
= Cext Rext • 1n 2.
Package Abbreviation
P —
RP EL (2,500 pcs/reel)
Taping Abbreviation (Quantity)
Rev.3.00, Jul.15.2005, page 1 of 8
Page 2
HD74LS221
Q
Pin Arrangement
1A
2
1B
1Q
2Q
3
4
5
6
7
8
1CLR
2 Cext
2 Rext/Cext
GND
Function Table
Inputs Outputs
Clear A B Q Q
L X X L H X H X L H
X X L L H H L H H L H
Notes: H; high level, L; low level, X; irrelevant. ; Transition from high to low level. ; Transition from low to high level.
; one high-level pulse. ; one low-level pulse.
CLR
Q Q
Q Q
CLR
(Top view)
161
15
14
13
12
11
10
9
V
CC
1 Rext/Cext
1 Cext
1Q
2Q
2CLR
2B
2A
Block Diagram (1/2)
A
B
Clear
Rev.3.00, Jul.15.2005, page 2 of 8
Q
Q
Clear
Q
Page 3
HD74LS221
Absolute Maximum Ratings
Item Symbol Ratings Unit
V
Supply voltage Input voltage Power dissipation Storage temperature
CC
V
IN
P
T
Tstg
7 V 7 V
400 mW
–65 to +150 °C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item Symbol Min Typ Max Unit
V
Supply voltage Output current Operating temperature
Rate of rise or fall of input pulse
Input pulse width
Schmitt input, B 1 V/s Logic Input, A A or B
Clear Setup time External timing resistance R External timing capacitance C
Duty cycle
RT = 2 k50
= 100 k
R
T
CC
IOH I
OL
T
opr
dV/dt
t
w (in)
t
w (clear)
t
su
1.4 — 100 k
ext
0 — 1000 µF
ext
4.75 5.00 5.25 V — — –400 µA — — 8 mA
–20 25 75 °C
1 — — V/µs 40 — — 40 — — 15 — — ns
— — 90
ns
Electrical Characteristics
(Ta = –20 to +75 °C)
Item Symbol min. typ.* max. Unit Condition
Threshold voltage
A
B
Output voltage
I
A — –0.4
B, Clear
I
Short-circuit output current
Supply current ICC Input clamp voltage VIK — — –1.5 V VCC = 4.75 V, IIN = –18 mA
Note: * VCC = 5 V, Ta = 25°C
+
V
— 1.0 2.0 V VCC = 4.75 V
T
V
0.8 1.0 — V VCC = 4.75 V
T
+
V
— 1.0 2.0 V VCC = 4.75 V
T
0.8 0.9 — V VCC = 4.75 V
V
T
VOH 2.7 — — V VCC = 4.75 V, IOH = –400 µA V
OL
— — 20 µA VCC = 5.25 V, VI = 2.7 V
IH
I
IL
— — 0.1 mA VCC = 5.25 V, VI = 7 V
I
–20 — –100 mA VCC = 5.25 V
I
OS
— — 0.4 IOL = 4 mA — — 0.5
— — –0.8
— 4.7 11 Ouiescent — 19 27
V
mA VCC = 5.25 V, VI = 0.4 V Input current
mA
= 8 mA
I
OL
Triggered
V
= 4.75 V
CC
VCC = 5.25 V
Rev.3.00, Jul.15.2005, page 3 of 8
Page 4
HD74LS221
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item Symbol Inputs Outputs min. typ. max. Unit Condition
A Q — 45 70 B Q — 35 55 A Q — 50 80 B Q — 40 65
ns
ns
70 120 150
20 47 70
ns
600 670 750
6 6.7 7.5 ms
C
= 80 pF,
ext
= 2 k
R
ext
C
= 80 pF,
ext
= 2 k
R
ext
C
= 0 pF,
ext
= 2 k
R
ext
C
= 100 pF,
ext
= 10 k
R
ext
C
= 1 µF,
ext
= 10 k
R
ext
Propagation delay time
Output pulse width
t
PLH
t
PHL
t
Clear Q — 35 55 ns
PHL
t
Clear Q — 44 65 ns
PLH
t
A or B Q or Q
w (out)
Caution in use
C
= 15 pF,
L
= 2 k
R
L
In order to prevent any malfunctions due to noise, connect a high frequency performance capacitor between Vcc and GND, and keep the wiring between the External components and Cext, Rext/Cext pins as short as possible.
Testing Method
Test Circuit
V
CC
Cext
B
+–
Cext
Rext
Rext /Cext
CLR
Load circuit 1
R
L
Q
C
L
Q
Same as Load Circuit 1.
A Input
Z
out
P.G.
= 50
A
B Input
P.G.
Z
out
= 50
CLR Input
P.G.
out
= 50
Z
Notes: 1. CL includes probe and jig capacitance.
2. All diodes are 1S2074(H).
Rev.3.00, Jul.15.2005, page 4 of 8
Page 5
HD74LS221
Waveforms 1
Trigger from B, then clear (A input is low).
t
B Input
CLR
Q
Q
Note: Input pulse: t
TLH
90%
10% 10%
TLH
1.3V
15 ns, t
t
w (in)
60ns
t
PLH
1.3V
t
PHL
1.3V 1.3V
6 ns, PRR = 1 MHz
THL
90%
1.3V
t
THL
1.3V
t
PHL
t
PLH
1.3V
3V
0V
3V
0V
3V
0V
V
V
OH
OL
Waveforms 2
Trigger from A, then clear (B input is high).
t
THL
t
w (in)
A
CLR
Q
Q
Note: Input pulse: t
90%
1.3V 1.3V 10% 10%
60ns
t
PLH
1.3V 1.3V
1.3V 1.3V
t
PHL
15 ns, t
TLH
6 ns, PRR = 1 MHz
THL
t
TLH
90%
1.3V
t
t
PHL
PLH
3V
0V
3V
0V
V
V
V
V
OH
OL
OH
OL
Rev.3.00, Jul.15.2005, page 5 of 8
Page 6
HD74LS221
Waveforms 3
Trigger from B, then clear (A input is low).
t
TLH
B Input
10%
90%
1.3V
60ns
CLR
Q
Note: Input pulse: t
15 ns, t
TLH
6 ns, PRR = 1 MHz
THL
Waveforms 4
1.3V
90%
10%
t
THL
3V
0V
3V
0V
V
V
OH
OL
Trigger from A (B and clear input are high).
t
THL
90%
A
10% 10%
Q
Q
Note: Input pulse: t
15 ns, t
TLH
1.3V
1.3V 1.3V
6 ns, PRR = 1 MHz
THL
t
TLH
90%
t
w (out)
w (out)
t
1.3V
3V
0V
3V
0V
V
V
OH
OL
Rev.3.00, Jul.15.2005, page 6 of 8
Page 7
HD74LS221
Waveforms 5
Clear overriding B, then trigger from B.
t
TLH
B Input
50ns
CLR
90%
1.3V 1.3V 1.3V
10%
90%
t
THL
10%
0ns
3V
0V
t
su
1.3V1.3V
3V
0V
Triggered
Q
Not Triggered
Note: Input pulse: t
15 ns, t
TLH
Waveforms 6
Positive transition of Clear.
B Input
CLR
Q
Note: Input pulse: t
15 ns, t
TLH
6 ns, PRR = 1 MHz
THL
t
TLH
90%
10% 10%
1.3V 1.3V
50ns
90%
50ns
1.3V1.3V
6 ns, PRR = 1 MHz
THL
t
THL
1.3V 1.3V
t
w (out)
V
V
3V
0V
3V
0V
V
V
OH
OL
OH
OL
Rev.3.00, Jul.15.2005, page 7 of 8
Page 8
HD74LS221
Package Dimensions
RENESAS CodeJEITA Package Code Previous Code PRDP0016AE-BP-DIP16-6.3x19.2-2.54
16 9
MASS[Typ.]
DP-16FV
D
1.05g
E
1 8
0.89
Z
P-SOP16-3.95x9.9-1.27 PRSP0016DG-A
b
3
A
1
A
L
b
e c
RENESAS CodeJEITA Package Code Previous Code
*1
D
p
FP-16DNV
916
MASS[Typ.]
0.15g
θ
e
1
( Ni/Pd/Au plating )
F
Reference
Symbol
e
1
D
E
A
A
1
b
p
b
3
c
θ
e
Z
L
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
Dimension in Millimeters
0.51
0.40 0.48
0.19 0.25 0.31
°
0
2.29 2.54 2.79
2.54
7.62
19.2
1.30
MaxNomMin
20.32
6.3
5.06
0.56
1.12
7.4
15
°
E
H
Index mark
1
Zb
e
*3
p
xM
E
*2
8
A
y
Rev.3.00, Jul.15.2005, page 8 of 8
b
p
c
Dimension in Millimeters
Reference
Terminal cross section
( Ni/Pd/Au plating )
L
1
1
A
L
Detail F
Symbol
D
E
A
2
A
1
A
b
p
b
1
c
c
1
0
°
θ
H
5.80 6.20
E
e
θ
x
y
Z
L
L
1
9.90
3.95
0.400.34
6.10
1.27
1.08
MaxNomMin
10.30
0.250.140.10
1.75
0.46
0.250.200.15
8
0.25
0.15
0.635
1.270.600.40
°
Page 9
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