The ISL55185XEVAL1 board can be used to evaluate the new
ISL5585 3.3volt SLIC. This platform supports the evaluation of
the performance of the ISL5585 at 3.3 volts with a 5 volt
CODEC. The lab data presented in this application note had
the following supplies voltages: Vcc (ISL5585) = 3.3V,
Vcc (CODEC) = 5V, VBH = -100v and Vbl = -24v.
The ISL5585XEVAL1 evaluation board provides a complete
evaluation system for the ISL5585 family of ringing SLICs.
Included on the evaluation board is a single +5V CODEC for
line circuit evaluations and on board logic for stand alone
operation. The evaluation boards have been designed to
support back to back operation, providing further insight to
the complete signal path and solution.
The transient behavior of the ISL5585 in response to mode
changes has been improved. The benefit to the application
is reduction or more likely elimination of DET
off hook events occur.
Voltage ratings for external components have been selected
based on 100V device operation, therefore compatibility to
lower voltage versions is guaranteed.
glitches when
AN1038
Rev 0.00
Sep 2002
Getting Started
Your evaluation kit should contain application note AN1038
and the following hardware.
1. One
2. One ISL5585X device sample, already in board.
3. One PLCC extraction tool.
4. One cable assembly with multi colored conductors.
5. One cable assembly with solid white conductors.
The evaluation board should have the same appearance as
the silk screen shown in Figure 1.
ISL5585XEVAL1evaluation board.
Applying Power to the Evaluation Board
Here are a few safeguards with power sequencing until you
are accustomed to using the high voltages required by the
devices.
1. Limit the current on all power supplies to 100mA.
2. Turn on the power supplies after the power cables are
attached to the evaluation boards.
AN1038 Rev 0.00Page 1 of 14
Sep 2002
ISL5585
APP CKT
CODEC
APP CKT
CLOCK GENERATION & MUX
JP1
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JP10
JP11
JP12
J1
J2
J3
J4
J5J6
J9
J10
J13
J14
J7J8
J11
J12
J15
S1 S2 S3S4 S5 S6
FIGURE 2. EVALUATION BOARD FUNCTIONAL DIAGRAM
Evaluation Board Functional Description
Evaluation Board Jumper Definitions
JUMPERDESCRIPTION
JP1Connects SW- directly to the device Ring terminal of device. Used in conjunction with external load D
JP2Connects SW+ through test load to the Tip terminal of device. Used in conjunction with external load D
JP3Not used. Leave open.
JP4Connects the receive output of the CODEC (U6) to the device receive input -IN. Path is AC coupled with C
JP5Position1, CODEC: Connects the CODEC receive output to the device ringing input. Path is AC coupled by C
Position 2, EXT: Connects the VRS connector J9 to the device ringing input. Path is AC coupled by C
Position 3 TRAP: Connects the VRS connector J9 thru RC network to the device ringing input. Path is AC coupled.
JP6Connects the device transmit output VTX to the CODEC amplifier for transhybrid balance. Path is AC coupled by C
JP7Connects the receive output of CODEC to transhybrid amplifier, AC coupled by C
JP8Inserting jumper sets the CODEC to A-law coding. Open sets the CODEC to -law coding.
JP9Inserting jumper powers down the CODEC. Open provides normal CODEC operation.
JP10Position 1: Sets the CODEC master clock to 2.048MHz.
Position 2: Sets the CODEC master clock to 512kHz
Position 3: Sets the CODEC master clock to 256kHz.
JP11Enables the on board logic multiplexer. Should be installed for single board or back to back evaluations. Remove when driving
BNCs J10 thru J13.
JP12Inserting jumper selects on board clock and frame sync generator. Insert to configure board as master for back to back
evaluations or for single board evaluations. Remove to configure board as slave for back to back evaluations.
. Normally inserted for proper operation.
1
and RTA.
TA
and RTA.
TA
.
RS
.
IN
RS
.
.
TX
AN1038 Rev 0.00Page 2 of 14
Sep 2002
Test Points
Each connector interface to the evaluation board has a test
point. All test points are DC coupled and should be guarded
against ground shorts. High impedance test inputs, such as
oscilloscopes or DVMs, should be used to monitor these
points. Unused BNC connections also provide convenient test
point access.
Toggle Switches
The six toggle switches, S1 thru S6, interface directly to the
ISL5585 device. Positioning any switch towards the top of the
board is a logic “1”. Positioning any switch towards the bottom
of the board is a logic “0”. All switches are labeled with the
control signal names.
The switch E0 selects the switch hook (E0 = 1) or the ground
key detector (E0 = 0) to appear at DET
device overrides E0 and sends the ring trip detector to DET
The switched labeled SWC
turns on the uncommitted switch
when set to a logic low. The battery select signal BSEL, selects
the high battery when set to logic high. The operating modes
for the ISL5585 device are provided in Table 1.
. During ringing, the
.
OPERATING MODEF2F1F0
Low Power Standby000
Forward Active001
Unused010
Reverse Active011
Ringing100
Forward Loop Back (Note)101
Tip Open110
Power Denial111
NOTE: The ISL5585 device should always operate from low battery
voltage when using the Forward Loop Back mode.
Refer to the device electrical data sheet for detailed
descriptions regarding each operating mode according to the
device under evaluation.
Evaluation Board Connector Descriptions
CONNECTORDESCRIPTION
TABLE 1. ISL5585 OPERATING MODES
J1RJ11 type phone connector.
J2Ring terminal of board.
J3Tip terminal of board.
J4Grounding lug connected to board ground plane.
J51: V
J6Identical pinout as J5. Either connector provides daisy chain connection to second board for back to back evaluation.
J7Transmit analog output from ISL5585 device, VTX. This path is AC coupled by C
J8Receive analog input to ISL5585 device, VREC. This path is AC coupled by C
J9Ringing input to ISL5585 device, VRS. This path is AC coupled by C
J10Serial transmit data output of CODEC U6.
J11Serial receive data input to CODEC U6.
J12Common frame sync input for receive and transmit digital data.
J13Common clock for CODEC data transfer and conversion.
. Positive 5V supply to CODEC U6, clock generator U5 and logic devices U2 thru U4 (red wire).
CC
2: V
. High negative battery supply to the ISL5585 device (orange wire).
BH
3: V
. Low negative battery supply to the ISL5585 device (yellow wire).
BL
4: +5V. Positive 5V supply to the ISL5585 device and LEDs (green wire).
J1420 pin, 100 mil spacing header with all digital PCM data interfaces to CODEC U6.
J1520 pin, 100 mil spacing header with all digital interfaces to ISL5585 device.
AN1038 Rev 0.00Page 3 of 14
Sep 2002
ISL5585
APP CKT
CODEC
APP CKT
CLOCK GENERATION & MUX
JP1
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JP10
JP11
JP12
J1
J2
J3
J4
J5J6
J9
J10
J14
J7J8
J11
J12
J15
S1 S2 S3S4 S5 S6
FIGURE 3. STAND ALONE CONNECTORS AND JUMPERS
5
FIGURE 4. TEST LOAD SWITCHING
RING
TIP
R
TA
D
TA
SW+
SW-
SWC
JP1
JP2
Stand Alone Configuration
Description
The standalone configuration supports any measurement of
the ISL5585 device. With all the jumper locations open, the
device is totally isolated from all other active circuitry on the
evaluation board. All other circuitry is powered, but does not
interfere with proper SLIC operation.
Power Supply Connections
Power should be applied to the evaluation board using the
primary power cable. Either J5 or J6 may be used. Prior to
applying power, the voltage setting of each supply should be
verified. The power supplies should be turned off while mating
the primary power cable to the evaluation board.
Jumper Settings
All jumper positions should be open for the stand alone
configuration.
Measurement Capability
Nearly all AC and DC parameters of the device can be
measured using this configuration. The device has been
socketed to allow easy measurements of more than a single
device. An extraction tool has been included with the evaluation
kit and should be used to remove the device from the socket.
The typical device measurements are listed below.
Status LEDs
The status LEDs DET and ALM are active for the stand alone
configuration. DET
should only light when a DC current path
exists from Tip to Ring or during forward loop back. ALM
should only light during forward loop back operation. Normal
device evaluations should not cause the ALM
indicator to light.
Uncommitted Switch Jumpers
When the jumpers JP1 and JP2 are installed, the uncommitted
switch is connected across Tip and Ring. The test load of D
and R
the uncommitted switch is turned on. The DC load will result in
DET
below.
will connect across the Tip and Ring terminals when
TA
transitioning to a logic low. The circuit diagram is shown
TA
1. Power supply current per operating mode.
2. Tip and Ring DC voltages per operating mode.
3. On hook AC gains G
4. Off hook AC gains G
5. Other AC parameters such as longitudinal balance.
AN1038 Rev 0.00Page 4 of 14
Sep 2002
, G24 and G44.
42
, G24 and G44.
42
Socket Removal
The surface mount socket for the ISL5585 device has the
same solder foot print as the PLCC package. Therefore, the
socket may be removed for more extensive characterization.
G
4-2
=
V
2W
V
IN
------------ = 2
R
S
R
IN
----------
Z
L
ZLZO+ + 2
RP
----------------------------------------2
Z
L
ZLZL+
--------------------
R
S
R
IN
----------==
G
24
Z
O
ZO2RPZ
L
++
---------------------------------------
–=
G
44G42
G
24
R
S
R
IN
----------
–
Z
O
ZL2RPZ
O
++
---------------------------------------
==
Stand Alone Configuration Typical Measurements
Supply Currents (milli amps) - On Hook
OPERATING MODEF2, F1, F0E0SWCBSEL
ICC
(Vcc= 3.3v)
IBH
(Vbh= -100v)
(Vbl = -24v)
Low Power Standby0, 0, 0x112.90.60.3
Forward Active0, 0, 1x103.701.2
Unused0, 1, 0n/an/an/an/an/an/a
Reverse Active0, 1, 1x103.701.2
Ringing1, 0, 0x115.61.50.7
Forward Loop Back1, 0, 1x1011.9020
Tip Open1, 1, 0x112.90.60.3
Power Denial1, 1, 1x1x3.300.2
Tip and Ring Voltages (Volts) - On Hook
OPERATING MODEF2, F1, F0E0SWCBSELTIPRING
Low Power Standby0, 0, 0x11-0.7-52
Forward Active0, 0, 1x10-3.9-17
Unused0, 1, 0n/an/an/an/an/a
Reverse Active0, 1, 1x10-17-3.9
Ringing1, 0, 0x11-50-50
IBL
Forward Loop Back1, 0, 1x10-3.9-17
Tip Open1, 1, 0x11Float-52
Power Denial1, 1, 1x1xFloatFloat
AC Gains (dB), Off Hook, 600 Termination - Forward and Reverse Active Only
OPERATING MODEF2, F1, F0E0SWCBSELG
42
Forward Active0, 0, 1x100.0-7.3-7.3
Reverse Active0, 1, 1x100.0-7.3-7.3
AC Gain EquationsG
42
G
24
G
44
G
24
G
44
AN1038 Rev 0.00Page 5 of 14
Sep 2002
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