Renesas HD74LV2GT04A User Manual

HD74LV2GT04A

Triple Inverters / CMOS Logic Level Shifter

REJ03D0139–0200Z

(Previous ADE-205-664A (Z))

Rev.2.00

Oct.14.2003

Description

The HD74LV2GT04A has triple inverters in an 8 pin package. The input protection circuitry on this device
allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator from

3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while
operating at the high-voltage power supply. Low voltage and high-speed operation is suitable for the
battery powered products (e.g., notebook computers), and the low power consumption extends the battery
life.

Features

• The basic gate function is lined up as Renesas uni logic series.

• Supplied on emboss taping for high-speed automatic mounting.

• TTL compatible input level.

Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C

• Logic-level translate function

3.0 V CMOS logic → 5.0 V CMOS logic (@V

1.8 V or 2.5 V CMOS logic → 3.3 V CMOS logic (@V

• All inputs V

All outputs V

• Output current ±6 mA (@V

• All the logical input has hysteresis voltage for the slow transition.

• Ordering Information

(Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

IH

(Max.) = 5.5 V (@VCC = 0 V)

O

= 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)

CC

= 5.0 V)

CC

= 3.3 V)

CC

Part Name Package Type Package Code Package

Abbreviation

HD74LV2GT04AUSE SSOP-8 pin TTP-8DBV US E (3,000 pcs/reel)

Rev.2.00, Oct.14.2003, page 1 of 7

Taping Abbreviation
(Quantity)

HD74LV2GT04A

Outline and Article Indication

• HD74LV2GT04A

Index band

Lot No.

Y M W

T 0 4

SSOP-8

Marking

Y : Year code
(the last digit of year)
M : Month code
W : Week code

Function Table

Input A Output Y

HL
LH
H : High level

L : Low level

Rev.2.00, Oct.14.2003, page 2 of 7

HD74LV2GT04A

Pin Arrangement

1A

3Y

2A

GND

1

2

3

4

8V

CC

71Y

63A

52Y

(Top view)

Absolute Maximum Ratings

Item Symbol Ratings Unit Test Conditions

Supply voltage range V
Input voltage range
Output voltage range

*1

*1, 2

Input clamp current I
Output clamp current I
Continuous output current I
Continuous current through

or GND

V

CC

Maximum power dissipation
at Ta = 25°C (in still air)

*3

CC

V

I

V

O

IK

OK

O

I

or I

CC

GND

P

T

Storage temperature Tstg –65 to 150 °C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and

furthermore no two of which may be realized at the same time.

1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.

2. This value is limited to 5.5 V maximum.

3. The maximum package power dissipation was calculated using a junction temperature of 150°C.

–0.5 to 7.0 V
–0.5 to 7.0 V
–0.5 to VCC + 0.5 V Output : H or L
–0.5 to 7.0 VCC : OFF
–20 mA VI < 0
±50 mA VO < 0 or VO > V
±25 mA VO = 0 to V

CC

±50 mA

200 mW

CC

Rev.2.00, Oct.14.2003, page 3 of 7