RDA 5807FP User Manual
Figure1-1. RDA5807FP Top V i ew
RDA5807FP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GPIO2
GPIO3
GND
ROUT
LOUT
RCLK
VDD
GND
GPIO1
GND
RF GND
FMIN
GND
GND
SCLK
SDA
RDA5807FP
SINGLE-CHIP BROADCAST FM RADIO TUNER Rev.1.2–April.2012
1 General Description
The RDA5807FP series is the newest generation
single-chip broadcast FM stereo radio tuner with fully
integrated synthesizer, IF selectivity, RDS/RBDS and
MPX decoder. The tuner uses the CMOS process,
support multi-interface and require the least external
component. The package sizes is SOP16. It is
completely adjustment-free. All these make it very
suitable for portable devices.
The RDA5807FP series has a powerful low-IF digital
audio processor, this make it have optimum sound
quality with varying reception conditions.
The RDA5807FP series support frequency range is from 50MHz to 115MHz.
1.1 Features
CMOS single-chip fully-int egrated FM tune r
Low power consum ption
Total current consumption lower than 20mA at 3.0V
power supply when under norm al situati on
Support worl dwide fr equency band
50 -108 MHz
Support flex ible cha nnel spac ing mode
100KHz, 200KHz , 50KHz and 25K Hz
Support RDS/RBDS
Digital low-IF tuner
Image-reject dow n-converter
High perf ormanc e A/D c onverter
IF select ivity pe rformed intern ally
Fully integr ated dig ital fre quency sy nthesiz er
Fully integ rated on-ch ip RF and IF VCO
Fully integ rated on-ch ip loop filter
Autonomous s earch t uning
Support 32.768KHz crystal oscillator
Digital auto gain control (AGC)
Copyright © RDA Microelectronics Inc. 2006. All rights are reserved.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Digital adaptive noise cancellation
Mono/stereo switch
Soft mute
High cut
Programmabl e de-emphas is (50/7 5 µs)
Receive signa l stre ngth indic ator ( RSSI) and SNR
Bass boost
Vol ume contr ol and mute
2
I
S digital output interf ace
Line-level anal og output voltage
32.768 KHz 12M,24M,13M,26M,19.2M,38.4MHz
Refe rence cl ock
Only support 2-w ire bus interfac e
Directly support 32Ω resistance loading
Integrated LD O regul ator
2.7 to 3.3 V operati on voltage
SOP16 package.
RDA Microelectronics, Inc. RDA5807NP FM Tuner V1.2
1.2 Applications
Cellular han dsets
MP3, MP4 play ers
Portable ra dios
PDAs, Notebook
The information contained herein is the exclusive property of RDA an d shall no t be di stributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 2 of 23
RDA Microelectronics, Inc. RDA5807NP FM Tuner V1.2
2 Table of Contents
1 General Description .................................................................................................................................... 1
1.1 Features ......................................................................................................................................... 1
1.2
Applications
2 Table of Contents ......................................................................................................................................... 3
3 Functional Description ................................................................................................................................ 4
3.1 FM Receiver .................................................................................................................................. 4
3.2 Synthesizer .................................................................................................................................... 4
3.3 Power Supply ................................................................................................................................ 4
3.4 RESET and Control Interface select ............................................................................................. 4
3.5 Control Interface ........................................................................................................................... 5
3.6 I
2
S Audio Data Interface ............................................................................................................... 5
3.7 GPIO Outputs ................................................................................................................................ 5
4 Electrical Characteristics ........................................................................................................................... 6
5 Receiver Characteristics ............................................................................................................................. 7
6 Serial Interface ............................................................................................................................................ 8
6.1 I
2
C Interface Timing ...................................................................................................................... 8
7 Register Definition ...................................................................................................................................... 9
8 Pins Description ......................................................................................................................................... 15
9 Application Diagram ................................................................................................................................. 17
9.1 RDA5807FP Common Application : ........................................................................................... 17
9.1.1 Bill of Materials: ......................................................................................................................... 17
10 Physical Dimension ................................................................................................................................... 18
11
PCB Land Pattern： ................................................................................................................................. 19
12 Change List ................................................................................................................................................ 22
Contact Information ......................................................................................................................................... 23
.................................................................................................................................... 2
The information contained herein is the exclusive property of RDA an d shall no t be di stributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 3 of 23
RDA Microelectronics, Inc. RDA5807NP FM Tuner V1.2
I
ADC
L
DAC
R
DAC
Q
ADC
+
-
Audio
DSP
Core
digital filter
MPX decoder
stereo/mono
audio
VCO
Synthesizer
GPIO
Interface
Bus
RSSI
SDIO
SCLK
MCU
GPIO
RDA5807FP
LOUT
ROUT
FMIN
RCLK
2.7-3.3V
32.768 KHz
VDD
LDO
Limiter
LNA
I
PGA
Q
PGA
RDS
/RBDS
3 Functional Description
Figure 3-1. RDA5807FP FM Tuner Block Diagram
3.1 FM Receiver
30 KHz.
The receiver uses a digital low-IF architecture that
3.2 Synthesizer
avoids the difficulties associated with direct
conversion while delivering lower solution cost
and reduces complexity, and integrates a low
noise amplifier (LNA) supporting the FM
broadcast band (50 to 115MHz), a multi-phase
image-reject mixer array, a programmable gain
The frequency synthesizer generates the local
oscillator signal whic h divide to multi-phase, then
be used to downconvert the RF input to a
constant low intermediate frequency (IF). The
synthesizer reference clock is 32.768 KHz.
control (PGA), a high resolution analog-to-digital
converters (ADCs), an audio DSP and a highfidelity digital-to-analog converters (DACs).
The synthesizer frequency is defined by bits
CHAN[9:0] with the range from 50MHz to
115MHz.
The limiter prevents overloading and limits the
amount of intermodulation products created by
strong adjacent channels.
The multi-phase mixer array down converts the
LNA output differential RF signal to low-IF, it also
has image-reject function and harmonic tones
3.3 Power Supply
rejection.
The RDA5807FP integrated one LDO which
The PGA amplifies the mixer output IF s ignal and
then digitized with ADCs.
The DSP core finishes t he channel se lection, FM
demodulation, stereo MPX decoder and output
audio signal. The MPX decoder can autonom ous
switch from stereo to mono to limit the output
noise.
The DACs convert digital audio signal to analog
and change the volum e at same tim e. The DACs
has low-pass feature and -3dB frequency is about
The information contained herein is the exclusive property of RDA an d shall no t be di stributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 4 of 23
supplies power to the chip. The external supply
voltage range is 2.7-3.3 V.
3.4 RESET and Control Interface select
The RDA5807FP is RESET itself When VDD is
Power up. And also support soft reset by trigger
02H BIT1 from 0 to 1. T he RDA5807FP only
support I
2
C control interface bus mode.
RDA Microelectronics, Inc. RDA5807NP FM Tuner V1.2
3.5 Control Interface
2
The RDA5807FP only supports I
C control
interface.
2
The I
Specification 2.1. It includes two pins: SCLK and
SDIO. A I
C interface is compliant to I2C Bus
2
C interf ace transfer begins with START
condition, a comm and byte and data bytes, each
byte has a follo wed AC K ( or N ACK) bit, a nd en ds
with STOP condition. The command byte includes
a 7-bit chip address (0010000b) and a R/W bit.
The ACK (or NACK) is always sent out by receiver.
When in write transfer, data bytes is written out
from MCU, and when in read transf er, data bytes
is read out from RDA5807FP. There is no visible
register address in I
2
C interface transfers. The I
2
C
interface has a f ixed s tart r egis ter address (0x02h
for write transfer and 0x0Ah for read transfer), and
an internal incremental address counter. If register
address meets the end of register file, 0x3Ah,
register address will wrap back to 0x00h. For write
transfer, MCU programs registers from register
0x02h high byte, then register 0x02h low byte,
then register 0x03h high b yte, til l the las t register.
RDA5807FP always gives out ACK after every
byte, and MCU gives out STOP condition when
register programming is finished. For read transfer,
after command byte from MCU, RDA5807FP
sends out register 0x0Ah high byte, then register
0x0Ah low byte, then reg ister 0x0Bh high byte, till
receives NACK from MCU. MCU gives out ACK
for data bytes besides last data byte. MCU gi ves
out NACK for last data byte, and then
RDA5807FP will return the bus to MCU, and MCU
will give out STOP condition.
2
3.6 I
S Audio Data Interface
The RDA5807FP supports I
Bus) audio interface. The interface is fully
compliant w ith I
2
S bus specification. When setting
I2SEN bit high, RDA5807FP will output SCK, WS,
SD signals from GPIO3, GPIO1, GPIO2 as I
2
S (Inter_IC Sound
2
S
master and transmitter, the sample rate is
48Kbps，44.1kbps,32kbps….. RDA5807FP also
support as I
2
S slaver mode and transmitter, the
sample rate is less than 100kbps.
3.7 GPIO Outputs
The RDA5807FP has three GPIOs. The function
of GPIOs could programmed with bits GPIO1[1:0],
GPIO2[1:0], GPIO3[1:0] and I2SEN.
If I2SEN is set to low, GPIO pins could be
programmed to output low or high or high-Z, or be
programmed to output interrupt and stereo
indicator with bits GPIO1[1:0], GPIO2[1:0],
GPIO3[1:0]. GPIO2 could be programmed to
output a low interru pt (interrupt will be gener ated
only with interrupt enable bit STCIEN is set to high)
when seek/tune proces s com pletes. GPIO3 could
be programmed to output stereo indicator bit ST.
Constant low, high or high-Z functionality is
available regardless of the state of VDD sup plies
or the ENABLE bit.
SCK
WS
LEFT CHANNEL
1 SCK
SD
MSB
LSB MSB
1 SCK
RIGHT CHANNEL
LSB
Figure 3-2 I2S Digital A udio Format
The information contained herein is the exclusive property of RDA an d shall no t be di stributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 5 of 23
RDA Microelectronics, Inc. RDA5807NP FM Tuner V1.2
4 Electrical Characteristics
Table 4-1 DC Electrical Specification (Recommended O peration Conditions):
SYMBOL DESCRIPTION MIN TYP MAX UNIT
VDD
T
amb
V
IL
V
IH
V
TH
Table 4-2 DC Electrical Specification (Absolut e Maximum Ratings) :
SYMBOL DESCRIPTION MIN TYP MAX UNIT
T
amb
I
IN
V
IN
V
lna
Notes:
1. For Pin: SCLK, SDIO
Supply Voltage 2.7 3.0 3.3 V
Ambient Temperature
CMOS Low Level Input Voltage
CMOS High Level Input Voltage
CMOS Threshold Voltage
Ambient Temperature
Input Current
Input Voltage
(1)
(1)
VDD+0.3 V
LNA FM Input Level
-20 27 +75 ℃
0 0.3*VDD V
0.7*VDD VDD V
0.5*VDD V
-40 +90 °C
-10
+10 mA
-0.3
+10 dBm
Table 4-3 Power Consumption Specification
(VDD = 3.0V, TA = 25℃, unless otherwise specified)
SYMBOL DESCRIPTION CONDITION TYP UNIT
I
VDD
I
VDD
I
PD
Supply Current
Supply Current
Powerdown Current
Notes:
1. For strong input signal condition
2. For weak input signal condition
(1)
(2)
ENABLE=1
ENABLE=1
20 mA
21 mA
ENABLE=0 25
µA
The information contained herein is the exclusive property of RDA an d shall no t be di stributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 6 of 23
RDA Microelectronics, Inc. RDA5807NP FM Tuner V1.2
Input Common
5 Receiver Characteristics
Table 5-1 Receiv er Characteristics
(VDD = 3 V, TA = 25 °C, unless otherwise specified)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
General specifications
F
in
V Sensitivity
rf
IP3
in
α
am
S
200
S
400
FM Input Frequency Range
1,2,3
Input IP3
AM Suppression
4
80 - -
1,2
Adjacent Channel Selectivity
400KHz Selectivity
Audio L/R Output Voltage
V
; V
AFR
(Pins LOUT and ROUT)
AFL
Maximum Signal to Noise
S/N
α
SCS
Stereo Channel Separation
Ratio
1,2,3,5
Audio Output Loading
R
L
Resistance
Audio Total Harmonic
THD
Distortion
1,3,6
Audio Output L/R
α
AOI
R
BW
mute
audio
Imbalance
Mute Attenuation Ratio
Audio Response
1,6
1
1
Pins FMIN, LOUT, ROUT
Pins FMIN
V
com_rfin
Mode Voltage
Audio Output Common Mode
V
com
Notes:1. F
=65 to 115MHz; F
in
2. ∆f=22.5KHz; 3. B
5. P
=60dBUV; 6. ∆f=75KHz,fpilot=10% 7. Measured at V
RF
8. At LOUT and ROUT pins 9. Adjustable
Voltage
=1KHz; de-emphasis=75µs; MONO=1; L=R unless noted otherwise;
mod
AF
8
= 300Hz to 15KHz, RBW <=10Hz; 4. |f2-f1|>1MHz, f0=2xf1-f2, AGC disable, F
Adjust BAND Register 50 115 MHz
50MHz - 1.4 1.8
65MHz - 1.2 1.5
88MHz - 1.2 1.5
S/N=26dB
98MHz - 1.3 1.5
108MHz - 1.3 1.5
115MHz - 1.3 1.8
AGCD=1
m=0.3
60 - - dB
±200KHz 50 70 - dB
±400KHz 60 85 - dB
1,2
Volume [3:0] =1111 - 360 - mV
2
6
Stereo 53
Mono 55
57 55 -
35 - - dB
Single-ended 32 - - Ω
Volume[3:0]
=1111
R
load
R
load
Volume[3:0]=0000
1KHz=0dB
±3dB point
Low Freq High Freq - 14 -
- =1KΩ
0.15 0.2
- =32Ω 0.2 -
- - 0.05 dB
60 - - dB
9
100 -
0
1.0 1.05 1.1 V
=76 to 108MHz;
= 1 m V, f
EMF
RF
in
= 65 to 108MHz
µV EMF
dBµV
dB
%
Hz
V
The information contained herein is the exclusive property of RDA an d shall no t be di stributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 7 of 23