Raytheon RMPA61800 Datasheet

RMPA61800

Dual Channel 6-18 GHz 2 Watt Power

Description

Features

Absolute

Maximum

Ratings

(Single Channel)

Amplifier MMIC

The Raytheon RMPA61800 is a fully monolithic dual channel power amplifier operating over the 6.0 to 18.0 GHz
frequency band. The amplifier uses a .25 micron Pseudomorphic High Electron Mobility Transistor (PHEMT)
process to maximize efficiency and output power. The chip configuration incorporates two stages of reactively
combined amplifiers at the output preceded by an input amplifier stage. Two identical amplifier channels are
provided to achieve a typical total combined (using an off-chip combiner) output power of 33 dBm at 3 dB gain
compression. A single channel provides typically, 18 dB small signal gain and 31 dBm output power at 1 dB gain
compression.

 Two Identical Channels
 21.0 dB Typical Small Signal Gain, Single Channel
 2.0:1 Typical Input SWR, 2.5:1 Typical Output SWR, Single Channel
 31 dBm Output Power at 1 dB Gain Compression, Single Channel
 32 dBm Output Power at 3 dB Gain Compression, Single Channel
 34 dBm Output Power at 1 dB Gain Compression, Dual Channel
 22% Typical Power Added Efficiency at 1 dB Gain Compression
 Chip size: 6.55 mm x 5.15 mm x 0.1 mm

Parameter Symbol Value Unit

Positive Drain DC Voltage Vd 8.5 V
Negative DC Voltage Vg -2 V
Simultaneous (Vd-Vg) Vdg +10.5 V

RF CW Input Power (50 Ω source) Pin 27 dBm

Drain Current Id 1.2 A
Storage Temperature Tstg -55 to +125 °C
Operating Base Plate Temp Tc -40 to +85 °C
Thermal Resistance

(Channel to Backside) Rjc 12 °C/W

PRELIMINARY INFORMATION

(Photo TBS)

Performance

Characteristics

50

Vd=+8V, Quiescent

Current (Idq=600 mA)

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(at 25°C)

Ω system,

Parameter Min Typ Max Unit

Frequency Range 6.0 18.0 GHz
Small Signal Gain 15 21 dB
P1dB Compression 28 31 dBm
P3dB Compression 30 32 dBm
PAE at 1 dB Gain Comp. 12 22 %

Note: Quiescent Bias VD = +8V, ID = 600mA/channel, TC = +25°C.

Characteristic performance data and specifications are subject to change without notice.

Revised January 25, 2002

Page 1

Parameter Min Typ Max Unit

Input Return Loss 9.5 dB
Output Return Loss 7.4 dB
Gate Voltage (Vg)
Gain vs. Temp. 0~85°C -0.025 dB/°C

1

-0.4 V

Raytheon RF Components

362 Lowell Street

Andover, MA 01810

RMPA61800

Dual Channel 6-18 GHz 2 Watt Power

Application

Information

Figure 1

Functional Block

Diagram

Amplifier MMIC

CAUTION: THIS IS AN ESD SENSITIVE DEVICE

Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal
conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat,
plated with gold over nickel and should be capable of withstanding 325°C for 15 minutes.

Die attachment for power devices should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen
environment for PHEMT devices. Note that the backside of the chip is gold plated and is used as RF and DC
Ground.

These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination
of bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including
the use of wrist-grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to
prevent static discharges through the device.

Recommended wire bonding uses 3 mils wide and 0.5 mil thick gold ribbon with lengths as short as practical
allowing for appropriate stress relief. The RF input and output bonds should be typically 0.012” long
corresponding to a typical 2 mil gap between the chip and the substrate material.

CHANNEL 1

VG

RF IN 1

VG

CHANNEL 2

VG

RF IN 2

VG

RF OUT 1

RF OUT 2

PRELIMINARY INFORMATION

VD

VD

VD

Figure 2

Chip Layout and

Bond Pad Locations

(Chip size=6.55mm

x 2.67mm x 100µm.

Back of Chip is DC

Ground)

VD

Characteristic performance data and specifications are subject to change without notice.

www.raytheonrf.com

Revised January 25, 2002

Page 2

Raytheon RF Components

362 Lowell Street

Andover, MA 01810

RMPA61800

Dual Channel 6-18 GHz 2 Watt Power

Application

Note

Amplifier MMIC

Scope:

This application note briefly describes the procedure for evaluating the Raytheon RMPA61800, high efficiency

0.25 µm PHEMT Dual Channel Amplifier. The chip configuration incorporates two stages of reactively combined
amplifiers at the output preceded by an input amplifier stage.

Carrier Assembly:

The attached drawing shows a recommended off chip bias scheme for the RMPA61800. The MMIC is mounted on
a Cu shim or ridge, which in turn blazed to Cu-Mo-Cu, or Cu-W, or Mo carrier with alumina 50-ohm microstrip lines
for in/out RF connections and off-chip DC bias components. The drawing shows the placement of components and
bond wire connections. The following should be noted:

(1) 1 mil gold bond wires are used on the carrier

assembly.

(2) Use 3-1 mil gold wires about 25 mils in length for

optimum RF performance.

(3) Vg: Gate Voltage (negative) input terminal for

amplifier stages. For best results, the gate supply
should have a source resistance less than 100
ohms.

(4) Vd: Drain Voltage (positive) input terminal for

amplifier stages.

(5) Vg and Vd on both sides of the MMIC must be

biased to insure proper operation.

(6) Bias decoupling capacitors of 0.01 uF (multilayer)

and 100 pF (single layer) are used on the carrier.

(7) Close placement of external components is

essential to stability.

(8) The test fixture may require a pair of 25 µF

capacitor on the drain and gate(optional) bias
terminals to prevent oscillations caused by the test
fixture connections.

(9) For Laboratory testing, use good power supplies.

Set current limits on supplies to RF drive-up
current level. Keep supply wire/leads as short as
possible and if required use additional bypass
capacitors at the fixture terminals.

PRELIMINARY INFORMATION

Figure 3

Recommended

Application Schematic

Circuit Diagram

(single channel

represented)

Bias application is

identical for each

channel.

Bond Wire Ls

RF IN

MMIC Chip

Ground
(Back of Chip)

Drain Supply (Vd= +8 V)*

10,000pF

100pF

L

L

L

100pF

Gate Supply (Vg)*

L

10,000pF

RF OUT

Bond Wire Ls

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*Vg and Vd on both sides of the MMIC must be biased to insure proper operation.

Characteristic performance data and specifications are subject to change without notice.

Revised January 25, 2002

Page 3

Raytheon RF Components

362 Lowell Street

Andover, MA 01810