Rainbow Electronics RA01 User Manual

RA01

RA01 Universal ISM

Version: 1.0 Date: 10/8/2008

PIN ASSIGNMENT

Band OOK Receiver

DESCRIPTION

HopeRF’s RA01 is a single chip, low power,
multi-channel OOK receiver designed for use in
applications requiring FCC or ETSI conformance for
unlicensed use in the 433, 868 and 915 MHz bands.
Used in conjunction with HopeRF’s transmitters, the
RA01 is a flexible, low cost, and highly integrated
solution that does not require production alignments.
All required RF functions are integrated. Only an
external crystal and few capacitors are needed for
operation.

The RA01 has a completely integrated PLL for easy
RF design, and its rapid settling time allows for fast
frequency hopping, bypassing multipath fading, and
interference to achieve robust wireless links. The
PLL’s high resolution allows the usage of multiple
channels in any of the bands. The baseband
bandwidth (BW) is programmable to accommodate
various deviation, data rate, and crystal tolerance
requirements. The receiver employs the low-IF
approach; therefore, no external components (except
crystal and filtering capacitors) are needed in a typical
application. The RA01 is a complete analog RF and
baseband receiver, including a multi-band PLL
synthesizer with an LNA, down converter mixers,
baseband filters and amplifiers, and demodulator.

The chip dramatically reduces the load on the
microcontroller with integrated digital data processing:
data filtering, clock recovery, data pattern recognition
and integrated FIFO. To minimize the system cost, the
chip can provide a clock signal for the microcontroller,
avoiding the need for two crystals.

BLOCK DIAGRAM

RFP
RFN

XTAL

LNA

CRYSTAL
OSC

CONTROL/STATUS
REGISTER BANK

nSEL SCK SDI SDO MODE nIRQ CLK nRES

CHANNEL
FILTER

PLL
SYNTHESIZER

DIGITAL
CONTROLER

LOW BAT
DETECT

RX DATA
FIFO

GAIN
CONTROL

RSSI

WAKE UP
TIMER

DETECTOR
DATA SLICER

CLOCK
RECOVERY

POWER ON
RESET

RSSI

DATA

DCLK

RA01

Stand alone mode

RA01

FEATURES

• Fully integrated (low BOM, easy design-in)

• No alignment required in production

• Fast settling, programmable, high-resolution PLL

• Fast frequency hopping capability

• Programmable bit rate (up to 40 kbps)

• Direct differential antenna input

• Programmable baseband bandwidth (85 to 340 kHz)

• Analog and digital RSSI outputs

• Data filtering and clock recovery

• RX pattern recognition

• SPI compatible serial control interface

• Readable registers

• Clock and reset signals for microcontroller

• 64 bit RX data FIFO

• Standard 10 MHz crystal reference

• Accurate Wake-up timer

• Low battery detector

• 2.2 to 3.8 V supply voltage

• Low power consumption

• Low standby current (typ. 0.2 μA)

TYPICAL APPLICATIONS

• Remote control

• Home security and alarm

• Wireless keyboard/mouse and other PC peripherals

• Toy control

• Remote keyless entry

• Tire pressure monitoring

• Telemetry

• Personal/patient data logging

• Remote automatic meter reading

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RA01

DETAILED DESCRIPTION

General

The RA01 OOK receiver is a counterpart to the HopeRF
transmitter (e.g. RF02). It covers the unlicensed frequency
bands at 434, 868 and 915 MHz. The device facilitates
compliance with FCC and ETSI requirements.

The programmable PLL synthesizer determines the
operating frequency while preserving accuracy based on
the on-chip crystal controlled reference oscillator. The
PLL’s high resolution allows for the use of multiple
channels in any of the bands.

The receiver employs the low-IF approach with internal
demodulation, allowing the use of a minimal number of
external components in a typical application. The RA01
consists of a fully integrated multi-band PLL synthesizer,
an LNA with switchable gain, down converter mixers,
baseband filters and amplifiers, and an demodulator
followed by a data filter.

LNA

The LNA has 250 Ohm input impedance, which works well
with the recommended antennas. (See Application Notes
available from http://www.hoperf.com.)

If the RF input of the chip is connected to 50 Ohm devices,
an external matching circuit is required to provide the
correct matching and to minimize the noise figure of the
receiver.

The LNA gain (and linearity) can be selected (0, –32 dB)
relative to the highest gain) according to RF signal
strength. This is useful in an environment with strong
interferers.

Baseband Filters

The receiver bandwidth is selectable by programming the
bandwidth (BW) of the baseband filters. This allows
setting up the receiver according to the characteristics of
the signal to be received.

An appropriate bandwidth can be selected to
accommodate various OOK deviation, data rate, and
crystal tolerance requirements. The filter structure is a 7th
order Butterworth low-pass with 40 dB suppression at
2*BW frequency. Offset cancellation is accomplished by
using a high-pass filter with a 90 kHz cut-off frequency.
Filter bandwidth is measured between the 6dB attenuation
points.

Typical Baseband Filter Characteristics

Data Filtering and Clock Recovery

The output data filtering can be completed by an
external capacitor to the final application.

Analog operation: The filter is an RC type low-pass
filter and a Schmitt-trigger (St). The resistor (10k) and
the St is integrated on the chip. An (external) capacitor
can be chosen according to the
actual bit-rate.

Data Validity Blocks / Demodulator

RSSI
A digital RSSI output is provided to monitor the input
signal level. It goes to an comparator, if the received
signal strength exceeds a given preprogrammed level
an internal -32dB attenuator is activated in the LNA.
The RSSI settling time depends on the filter capacitor
used.

Typical Analog RSSI Voltage vs. RF Input Power

Crystal Oscillator and
Microcontroller Clock Output

The chip has a single-pin crystal oscillator circuit,
which provides a 10 MHz reference signal for the PLL.
To reduce external parts and simplify design, the
crystal load capacitor is internal and programmable.
Guidelines for selecting the appropriate crystal can
be found later in this datasheet. The receiver can
supply the clock signal for the microcontroller, so
accurate timing is possible without the need for a
second crystal. In normal operation it is divided from
the reference 10 MHz. During sleep mode a low
frequency (typical 32 kHz) output clock signal can be
switched on.

When the microcontroller turns the crystal oscillator off
by clearing the appropriate bit using the

Setting Command,

number (default is 128) of further clock pulses (“clock
tail”) for the microcontroller to let it go to idle or sleep
mode.

Version: 1.0 Date: 10/8/2008

Configuration

the chip provides a programmable

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RA01

Low Battery Voltage Detector

The low battery detector circuit monitors periodically (typ.
8 ms) the supply voltage and generates an interrupt if it
falls below a programmable threshold level.

Wake-Up Timer

The wake-up timer has very low current consumption (4
μA max) and can be programmed from 1 ms to several
hours.

It calibrates itself to the crystal oscillator at every startup
and then at every 30 seconds with an accuracy of ±0.5%.
When the crystal oscillator is switched off, the calibration
circuit switches it back on only long enough for a quick
calibration (a few milliseconds) to facilitate accurate
wake-up timing. The periodic auto-calibration feature can
be turned off.

Event Handling

In order to minimize current consumption, the receiver
supports the sleep mode. Active mode can be initiated by
setting the ex or en bits (in the Configuration Setting or
Receiver Setting Command).

RA01 generates an interrupt signal on several events
(wake-up timer timeout, low supply voltage detection,
on-chip FIFO filled up). This signal can be used to wake
up the microcontroller, effectively reducing the period the
microcontroller has to be active. The cause of the interrupt
can be read out from the receiver by the microcontroller
through the SDO pin.

Interface and Controller

An SPI compatible serial interface lets the user select the
frequency band, center frequency of the synthesizer, and
the bandwidth of the baseband signal path. Division ratio
for the microcontroller clock, wake-up timer period, and
low supply voltage detector threshold are also
programmable. Any of these auxiliary functions can be
disabled when not needed. All parameters are set to
default after power-on; the programmed values are
retained during sleep mode. The interface supports the
read-out of a status register, providing detailed
information about the status of the receiver and the
received data. It is also possible to store the received data
bits into the 64 bit RX FIFO register and read them out in a
buffered mode. FIFO mode can be enabled through the
SPI compatible interface by setting the fe bit to 1 in the
Output and FIFO Mode Command. During FIFO read the
crystal oscillator must be ON.

Version: 1.0 Date: 10/8/2008

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RA01

PIN DEFINITIONS

A=analog, D=digital, S=supply, I=input, O=output, IO=input / output

Controller Mode

RA01

Version: 1.0 Date: 10/8/2008

Pin Name Type Function

1 SDI DI Serial data input

2 SCK DI Serial clock input

3 nSEL DI Select input (active low)

4 SDO DO

5 nIRQ DO

DATA DO

nFFS DI

6

DFILC AIO

DCLK DO

7

FFIT DO

8 CLK DO

9 XTAL AIO

10 nRES DO

11 VSS S

12 RFN AI

13 RFP AI

14 VDD S

15 FILC AIO

16 MODE DI

SPI
interface

Serial data output (tri-state if SPI bus is not selected, internal
bus-hold cell)

Interrupt request output (active low)

Demodulated data output

FIFO direct select input, with internal pull-up.
Conditions:

ef

= high in

sf = low

Note: 6 Value of the internal pull up resistor is 120 kOhm.

Data Filter Capacitor connection
Conditions:

ef

= low in

sf =

Note: If this bit is set the internal clock recovery and the FIFO is not usable.

Recovered data clock output for bit sampling

FIFO interrupt output
High when the number of the bits in the RX FIFO has reached the preprogrammed limit.
Conditions:

ef

= high in

sf =

Microcontroller clock output (optional)

Reference crystal connection

Power-on reset output (active low, optional)

Supply ground reference

Differential RF (antenna) input

Differential RF (antenna) input

Positive supply voltage

Filter capacitor connection (See

Mode select input. High=microcontroller mode

Output and FIFO mode Command.

in the

Data Filter Command

Output and FIFO mode Command.

high in the

low in the

Data Filter Command

Output and FIFO mode Command.

Data Filter Command

.

.

.

Demodulator Setting Command

for details)

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RA01

Typical Application

Typical application with FIFO usage

Version: 1.0 Date: 10/8/2008

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RA01

Standalone Mode

RA01

Version: 1.0 Date: 10/8/2008

Pin Name Type Function

1 FR0 DI

2 FR1 DI

3 FR2 DI

4 OP0 DO

5 OP1 DO
6 DATA DO

7 DFILC AIO
8 CLK DO

9 XTAL AIO

10 DUTY DI

11 VSS S

12 RFN AI

13 RFP AI

14 VDD S

15 FILC AIO

16 MODE DI

Receiving frequency setting inputs

Operation mode select:
00: Shutdown, 01:433MHz band, 10: 868MHz band, 11: Reserved

Demodulated data output

Data filter capacitor connection (See
Microcontroller clock output (optional)

Reference crystal connection

Low duty cycle rx mode

Supply ground reference

Differential RF (antenna) input

Differential RF (antenna) input

Positive supply voltage

Filter capacitor connection (See

Mode select input. Low=stand alone mode

Data Filter Command

Demodulator Setting Command

for details)

for details)

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