The MAXQ7667 smart system-on-a-chip (SoC) provides a
time-of-flight ultrasonic distance-measuring solution. The
device is optimized for applications involving large distance measurement with weak input signals or multiple
target identification. The MAXQ7667 features high signalto-noise ratio achieved by combining flexible electronics
with the intelligence necessary to optimize each function
as environmental and target conditions change.
An integrated burst signal generator and echo reception
components process ultrasonic signals between 25kHz
and 100kHz. Echo reception components include a programmable gain low-noise amplifier (LNA), a 16-bit
sigma-delta ADC to digitize the received echo signals,
and digital signal processing (DSP). DSP limits noise
with a bandpass filter, and creates an echo envelope
through demodulation and lowpass filtering. Input
referred noise is a low 0.7µV
RMS
. A programmable
phase-locked loop (PLL) frequency synthesizer supplies
the reference frequency for the burst generator and the
clock for the echo receiver’s digital filter. An embedded
16-bit MAXQ20 microcontroller (µC) controls all the preceding functions.
The µC optimizes the burst frequency and reception
frequency for each transmission at any temperature.
The MAXQ7667 achieves smart sensing by monitoring
the echo signals and then actively changing the transmitted and received parameters to obtain optimum
results. Digital filtering and burst synthesis do not
require CPU intervention. This leaves all the CPU power
available for echo optimization, communication, diagnostics, and additional signal processing.
The MAXQ7667 operates with three different power
supply voltages: +5V, +3.3V, and +2.5V. Two internal
linear regulators allow operation from a single +5V supply when three external power supplies are not available. Alternatively, the MAXQ7667 can control an
external pass transistor to allow operation from a single
supply voltage of +8V to +65V or more, depending on
the external component tolerance. The device is available in a 48-pin LQFP package and is specified to
operate from -40°C to +125°C.
Sampling Rate
Internal Bandgap Voltage Reference for the
ADCs (Also Accepts External Voltage Reference)
o Timer/Digital I/O Peripherals
o High-Performance, Low-Power, 16-Bit RISC Core
o Program and Data Memory
o Crystal/Clock Module
o 16 x 16 Hardware Multiplier with 48-Bit
Accumulator, Single Clock Cycle
o Power-Management Module
o JTAG Interface
o Universal Asynchronous Receiver-Transmitter
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DVDDIO, GATE5, REG3P3, REG2P5 to
DGND ................................................................-0.3V to +6.0V
AVDD to AGND .....................................................-0.3V to +4.0V
DVDD to DGND .....................................................-0.3V to +3.0V
DVDDIO to DVDD..................................................-0.3V to +6.0V
AVDD to DVDD......................................................-0.3V to +4.0V
AGND to DGND.....................................................-0.3V to +0.3V
Digital Inputs/Outputs to DGND..........-0.3V to (V
DVDDIO
+ 0.3V)
Analog Inputs/Outputs to AGND ............-0.3V to (V
AVDD
+ 0.3V)
XIN, XOUT to DGND ..............................-0.3V to (V
DVDD
+ 0.3V)
Maximum Current into Any Pin............................................50mA
Note 1: Noise measured at bandpass filter output with ECHO+ and ECHO- shorted divided by the gain with f
BPF
= 50kHz.
Note 2: Gain adjust resolution typically ranges between 6.25% and 12.5%.
Note 3: LIN 2.0 specifies a maximim data rate of 20kbps. Higher data rates could be possible with compatible devices and suitable
line conditions.
ELECTRICAL CHARACTERISTICS (continued)
(V
DVDDIO
= +5V, V
AVDD
= +3.3V; V
DVDD
= +2.5V, system clock (f
SYSCLK
) = 16MHz, burst frequency (f
BURST
) = bandpass frequency
(f
BPF
) = 50kHz, C
REFBG
= C
REF
= 1µF in parallel with 0.01µF, f
ADCCLK
= 2MHz (SAR data rate = 125ksps), TA= T
MIN
to T
MAX
, unless
otherwise specified. Typical values are at T
A
= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SPI INTERFACE TIMING (Figures 11 and 12)
SPI Master Operating
Frequency
SPI Slave Operating
Frequency
SCLK Output Pulse-Width
High/Low
MOSI Output Hold Time
After SCLK Sample Edge
MOSI Output Valid to Sample
Edge
MISO Input Valid to SCLK
Sample Edge
MISO Input Hold Time After
SCLK Sample Edge
SCLK Inactive to MOSI
Inactive
SCLK Input Pulse-Width
High/Low
SS Active to First Shift Edget
MOSI Input Setup Time to
SCLK Sample Edge
MOSI Input Hold Time After
SCLK Sample Edge
MISO Output Valid After
SCLK Shift Edge Transition
7, 18, 43 DGND Digital Ground. Connect all DGND nodes together. Connect to AGND at a si ngle point.
8, 17, 44 DVDDIO
9 P0.0/URX
10 P0.1/UTX
11 P0.2/TXEN
12
13 P0.4/T0B
14 P0.5/T1
15 P0.6/T2
16 P0.7/T2B
20 XIN
P0.3/T0/
ADCCTL
Port 1 Data 3/JTAG Serial Clock Input. P1.3 i s a general-purpose digital I/O. TCK is the JTAG
serial test clock input. Refer to the MAXQ7667 User’s Guide Sections 5 and 11.
Port 1 Data 4/SPI Serial Data Output. P1.4 is a general-purpose digital I/O. MOSI is the master
output, sla ve input for the SPI interface. Refer to the MAXQ7667 User’s Guide Sections 5 and 9.
Port 1 Data 5/SPI Serial Data Input. P1.5 is a general-purpose digital I/O. MISO is the ma ster input,
slave output for the SPI interface. Refer to the MAXQ7667 User’s Guide Sections 5 and 9.
Port 1 Data 6/SPI Serial Clock Output. P1.6 is a general-purpose digital I/O. SCLK is the serial
clock for the SPI interface. SCLK is an input when operating as a s lave and an output when
operating as a master. Refer to the MAXQ7667 User’s Guide Sections 5 and 9.
Port 1 Data 7/Schedule Timer Sync Input/SPI Slave Select. P1.7 is a general-purpose digital I/O.
A rising edge on the SYNC input resets the schedule timer. In SPI slave mode, SS is the SPI
slave-select input. In SPI master mode, use SS or a GPIO to manually select an external slave.
Refer to the MAXQ7667 User’s Guide Sections 5, 7, and 9.
Digital Supply Voltage. Connect DVDD directly to a +2.5V external source or to REG2P5 output for
single supply operation. B ypass DVDD to DGND with a 0.1µF capacitor as clo se a s possible to
the device. Connect all DVDD nodes together.
Digital I/O Supply Voltage. DVDDIO powers al l digital I/Os except for XIN and XOUT. Bypass
DVDDIO to DGND with a 0.1µF capacitor as close as possible to the device. Connect all DVDDIO
nodes together.
Port 0 Data 0/UART Rece ive Data Input. P0.0 is a general-purpose digital I/O. URX is a UART or
LIN data receive input. Refer to the MAXQ7667 User ’s Guide Sections 5 and 8.
Port 0 Data 1/UART Transm it Data Output. P0.1 i s a general-purpose digital I/O. UTX is a UART or
LIN data transmit output. Refer to the MAXQ7667 User’s Guide Sections 5 and 8.
Port 0 Data 2/UART Transm it Output. P0.2 is a general-purpose digital I/O. TXEN asserts low when
the UART is transmitting. Use TXEN to enable an e xternal LIN/UART transcei ver. Refer to the
MAXQ7667 U ser’ s Guide Sections 5 and 8.
Port 0 Data 3/Timer 0 I/O/ADC Control Input. P0.3 is a general-purpose digital I/O. T0 is the
primary Type 2 timer/counter 0 output or input. ADCCTL is a sampling/conversion trigger input for
the SAR ADC. Refer to the MAXQ7667 User ’s Guide Sections 5, 6, and 14.
Port 0 Data 4/Timer 0B I/O/Comparator Output. P0.4 is a general-purpose d igital I/O. T0B is the
secondary Type 2 timer/counter 0 output or input. Refer to the MAXQ7667 User’s Guide Sections
5 and 6.
Port 0 Data 5/Timer 1 I/O. P0.5 is a general-purpose digital I/O. T1 is the primary Type 2
timer/counter 1 output or input. Refer to the MAXQ7667 User’s Guide Sections 5 and 6.
Port 0 Data 6/Timer 2 I/O. P0.6 is a general-purpose digital I/O. T2 is the primary Type 2
timer/counter 2 output or input. Refer to the MAXQ7667 User’s Guide Sections 5 and 6.
Port 0 Data 7/Timer 2B I/O. P0.7 is a general-purpose digital I/O. T2B is the secondary Type 2
timer/counter 2 output or input. Refer to the MAXQ7667 User’s Guide Sections 5 and 6.
Crystal Oscillator Input. Connect an external crystal or resonator between XIN and XOUT. When
using an external clock source drive XIN with 2.5V level clock while leaving XOUT unconnected.
Connect XIN to DGND when an external clock source i s not used.
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