Rainbow Electronics MAXQ3120 User Manual

General Description

The MAXQ3120 microcontroller is a high-performance, 16-bit microcontroller that incorporates dual, true-differential, 16-bit sigma-delta analog-to-digital converters (ADCs), a liquid-crystal display (LCD) interface that can drive up to 112 segments, and a real-time clock (RTC) module with a dedicated battery-backup supply. The MAXQ3120 is uniquely suited for the single-phase electricity metering market, but can be used in any application that requires high-performance operation. The device can operate at a maximum of 8MHz (DV

= 3.3V). The MAXQ3120 has 16kWords of flash memory, 256 words of RAM, three 16-bit timers, and two universal synchronous/asynchronous receiver/transmitters (USARTs). The microcontroller core and I/O are powered by a single

3.3V supply, and an additional battery supply keeps the RTC running during power outages.

Features

♦ High-Performance, Low-Power, 16-Bit RISC Core

DC to 8MHz Operation, Approaching 1MIPS

per MHz

3.3V Core and I/O 33 Instructions, Most Single-Cycle Three Independent Data Pointers Accelerate

Data Movement with Automatic Increment/

Decrement 16-Level Hardware Stack 16-Bit Instruction Word, 16-Bit Data Bus 16 x 16-Bit, General-Purpose Working Registers Optimized for C-Compiler (High-Speed/Density

Code)

♦ Program and Data Memory

16kWords Flash Memory 1,000,000 Flash Write/Erase Cycles 256 Words of Internal Data RAM JTAG Bootloader for Programming

♦ Dual, 16-Bit Sigma-Delta ADCs

Differential Analog Input Channels Programmable Gain of 1x or 16x Integrated Sinc

Filters

Digital Phase Compensation and Trimmable

Bandgap Reference

♦ Peripheral Features

Up to 32 General-Purpose I/O Pins 112-Segment LCD Driver

Up to 4 COM and 28 Segments

Static, 1/2, and 1/3 LCD Bias Supported

No External Resistors Required Two Serial USARTs, One with Infrared PWM

Support One-Cycle, 16 x 16 Hardware Multiply/

Accumulate with 40-Bit Accumulator Three 16-Bit Programmable Timers/Counters,

One with Infrared PWM Support 8-Bit, Subsecond, System Timer/Alarm Battery-Backed, 32-Bit RTC with

Time-of-Day Alarm and Digital Trim Programmable Watchdog Timer

♦ Flexible Programming Interface

Bootloader Simplifies Programming In-System Programming Through JTAG Supports In-Application Programming of Flash

Memory

♦ Power Consumption

< 28mA at 8MHz, 3.3V Flash Operation 320µA Standby Current in Sleep Mode Low-Power Divide-by-256 Mode

MAXQ3120

High-Precision ADC

Mixed-Signal Microcontroller

______________________________________________ Maxim Integrated Products 1

Rev 1; 8/05

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Selector Guide, Typical Operating Circuit, and Pin Configuration appear at end of data sheet.

Note: Some revisions of this device may incorporate deviations

from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, go to: www.maxim-ic.com/errata

MAXQ is a trademark of Maxim Integrated Products, Inc.

+Denotes a Pb-free/RoHS-compliant device.

Ordering Information

PART TEMP RANGE

PIN-PACKAGE

MAXQ3120-FFN -40°C to +85°C 80 MQFP

-40°C to +85°C 80 MQFP

Single-Phase Electricity Metering

Battery-Powered and Portable Devices

Electrochemical and Optical Sensors

Industrial Control

Data-Acquisition Systems and Data Loggers

Home Appliances

Consumer Electronics

Thermostats/Humidity Sensors

Security Sensors

Gas and Chemical Sensors

HVAC

Smart Transmitters

Applications

MAXQ3120-FFN+

MAXQ3120

High-Precision ADC Mixed-Signal Microcontroller

2 _____________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(DVDD, AVDD= V

RST

to 3.6V, V

REF

= 1.25V (external), f

HFXIN

= 8MHz, TA= -40°C to +85°C, unless otherwise noted.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Voltage Range on DVDDRelative to DGND ..........-0.3V to +4.0V

Voltage Range on AV

Relative to AGND...........-0.3V to +4.0V

Voltage Range on AGND Relative to DGND .........-0.3V to +0.3V

Voltage Range on AV

Relative to DVDD............-0.3V to +0.3V

Voltage Range on Any Pin Relative to DGND

Except AN0+, AN0-, AN1+, AN1-.........-0.3V to (DV

+ 0.5V)

Voltage Range on AN0+, AN0-, AN1+,

AN1- Relative to AGND ......................................-4.0V to +4.0V

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Soldering Temperature .......................................See IPC/JEDEC

J-STD-020 Specification

PARAMETER

CONDITIONS

UNITS

Digital Supply Voltage DV

3.3 3.6 V

Digital Supply Ramp Rate

Can be controlled by placing a 1µF or higher capacitor between DV

and

ground

-16

V/ms

Digital Power-Fail Reset V

RST

2.8 2.9

DD1

/1 mode 21 28

DD2

/2 mode 11

DD3

/4 mode 5.7

DD4

/8 mode 3.1

Active Current (Note 2)

DD5

PMM mode 1.0

Stop-Mode Current (DV

plus AVDD)

STOP

µA

Battery Supply Voltage V

BAT

1.8 3.8 V

Battery Current I

BAT

RTCE = 1, DVDD = 0V, V

BAT

= 3.6V 5.1 10 µA

Input High Voltage V

0.7 x

Input Low Voltage V

0.3 x V

Input Hysteresis (Schmitt) V

IHYS

0.6 V

IOH = +1.5mA DVDD - 0.4

Output High Voltage (All Ports)

IOH = +2.5mA DVDD - 0.5

IOL = 3mA sink current 0.4

Output Low Voltage (All Ports, RESET)

IOL = 3.65mA sink current 0.5

Input Low Current (All Ports) I

VIL = 0.4V; weak pullup enabled -50 µA

RESET Pullup Resistance R

RST

kΩ

Input Leakage (All Ports) I

Weak pullup disabled -1 +1 µA

SYMBOL

MIN TYP MAX

RST

+16

3.03

320 760

100 200

-0.3

+ 0.3

MAXQ3120

High-Precision ADC

Mixed-Signal Microcontroller

_____________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(DVDD, AVDD= V

RST

to 3.6V, V

REF

= 1.25V (external), f

HFXIN

= 8MHz, TA= -40°C to +85°C, unless otherwise noted.) (Note 1)

PARAMETER

CONDITIONS

UNITS

Analog Supply Voltage AV

AVDD = DV

2.8 3.3 3.6 V

Active Analog Supply Current I

AVDD

Normal operation

3.5 mA

Power-Down Analog Supply Current

APD2:0 = 111b

µA

ANALOG-TO-DIGITAL CONVERTER DC ACCURACY

ADC Resolution

No missing codes, with software lowpass filter (see Appendix A)

16 bits

Offset Error Gain = 1

Gain Error Gain = 1

Gain-Error Drift

ppm

Gain-Error Match

DC Power-Supply Rejection PSRR

80 dB

ANALOG-TO-DIGITAL CONVERTER DYNAMIC SPECIFICATIONS

DVDD = 3.3V, AVDD = 3.3V, AN0 = 25mV,

48 57

With software lowpass filter, cutoff at 21st harmonic (see Appendix A)

Signal-to-Noise Ratio SNR

With software lowpass filter, cutoff at 7th harmonic (see Appendix A)

Total Harmonic Distortion THD

= 3.3V, AVDD = 3.3V, AN0 = 25mV,

(up to 21st harmonic)

-79 -55 dB

ANALOG-TO-DIGITAL CONVERTER INPUTS

Input-Voltage Range AN0+, AN0-; AN1+, AN1- to AGND -1 +1 V

Gain = 1 1

Input Sampling Capacitance (Note 3)

Channel 0

Gain = 16 16

Input Sampling Rate f

(Note 4)

MHz

Sample Output Rate

HFXIN

sample

/ sec

Gain = 1

Input Impedance to AGND (Note 5)

Gain = 16 46

kΩ

Gain = 1

Differential Input Impedance (Note 6)

Gain = 16 93

kΩ

Input Bandwidth (-3dB) 5.5 kHz

Reference Input Voltage V

REF

1.2

1.3 V

Reference Input Sampling Capacitance

2pF

Reference Input Sampling Rate f

MHz

SYMBOL

AN0+, AN0- = AGND; AVDD = 3.0V to 3.6V

peak-to-peak sine wave at 65Hz, gain = 16

MIN TYP MAX

2.65

250 635

±5.0

±10

±0.5

1.33

384

750

1500

1.25

1.33

MAXQ3120

High-Precision ADC Mixed-Signal Microcontroller

4 _____________________________________________________________________

Note 1: Specifications to -40°C are guaranteed by design and not production tested. All typical values are guaranteed by design

characterization and are not production tested.

Note 2: Tested with T

= +25°C, DVDD= 3.3V, and all peripherals inactive except for port pins.

Note 3: These numbers are guaranteed by design and are not tested. Note 4: Can be calculated as (f

HFXIN

/ 6).

Note 5: Can be calculated as 6 / (f

HFXIN

x CIN).

Note 6: Can be calculated as 12 / (f

HFXIN

x CIN).

Note 7: Assumes that no external components are connected to V

LCD

, V

LCD1

, V

LCD2

, or V

ADJ

ELECTRICAL CHARACTERISTICS (continued)

(DVDD, AVDD= V

RST

to 3.6V, V

REF

= 1.25V (external), f

HFXIN

= 8MHz, TA= -40°C to +85°C, unless otherwise noted.) (Note 1)

PARAMETER

CONDITIONS

UNITS

INTERNAL REFERENCE

Reference Output Voltage

Reference-Output Temperature Coefficient

With V

REF

bandgap trimming

(ATRM[4:0] = 01111b)

ppm/°C

Load Regulation I

REF

= ±2µA, CL = 12pF

µV/µA

LCD INTERFACE

LCD Reference Voltage V

LCD

LCD Bias Voltage 1 V

LCD1

Guaranteed by design

ADJ

+ 2/3

LCD

- V

ADJ

)

LCD Bias Voltage 2 V

LCD2

Guaranteed by design

ADJ

+ 1/3

LCD

- V

ADJ

)

LCD Adjustment Voltage (Note 7)

ADJ

Guaranteed by design 0

0.4 x V

LCD Bias Resistor R

LCD

20 kΩ

LCD Adjust Resistor R

LADJ

LRA4:LRA0 = 0 40 kΩ

Segment is driven at V

LCD

; V

LCD

= 3V,

SEGxx

= -3µA, guaranteed by design

LCD

Segment is driven at V

LCD1

; V

LCD1

= 2V,

SEGxx

= -3µA, guaranteed by design

LCD1

Segment is driven at V

LCD2

; V

LCD2

= 1V,

SEGxx

= -3µA, guaranteed by design

LCD2

LCD Segment Voltage V

SEGxx

Segment is driven at V

ADJ

; V

ADJ

= 0V,

SEGxx

= +3µA, guaranteed by design

0.1 V

CLOCK SOURCE

External Crystal Frequency f

HFXIN

MHz

REAL-TIME CLOCK

RTC Input Frequency f

32KIN

32kHz watch crystal

kHz

JTAG/FLASH PROGRAMMING

JTAG Clock Rate f

TCK

Mass erase

Flash Erase Time

Page erase

Flash Programming Time 17 µs

Write/Erase Cycles 1,000,000

Cycles

Data Retention 20

Years

SYMBOL

MIN TYP MAX

1.25

±120

±35

±50 ±500

0.02

ADJ

32.768

sysclk / 8

904

313

LCD

LCD1

LCD2

MAXQ3120

High-Precision ADC

Mixed-Signal Microcontroller

_____________________________________________________________________ 5

DIGITAL SUPPLY CURRENT

vs. CLOCK FREQUENCY

MAXQ3120 toc01

HFXIN

(MHz)

DD1

(mA)

76543

VDD

= +3.6V

TA = +85°C

TA = -40°C, +25°C

PORT PIN HIGH OUTPUT VOLTAGE

vs. SOURCE CURRENT

MAXQ3120 toc02

IOH (mA)

(V)

8642

1.9

2.0

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

1.8 010

VDD

= 2.8V

TA = +85°C

TA = +25°C

TA = -40°C

PORT PIN LOW-OUTPUT VOLTAGE

vs. SINK CURRENT

MAXQ3120 toc03

IOL (mA)

(V)

8642

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

010

VDD

= 2.8V

TA = +85°C

TA = +25°C

TA = -40°C

REFERENCE VOLTAGE OUTPUT

vs. LOAD CURRENT

MAXQ3120 toc04

REF

(µA)

REF

(V)

500-50

1.25

1.26

1.27

1.28

1.29

1.24

-100 100

VDD

= 3.3V

TA = +25°C

TA = +85°C

TA = -40°C

SIGNAL-TO-NOISE RATIO

vs. INPUT FREQUENCY

MAXQ3120 toc05

INPUT FREQUENCY (kHz)

SNR (dB)

987654321

010

REF

= +1.25V

VDD

= 3.3V

TA = +25°C, +85°C

Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

MAXQ3120

High-Precision ADC Mixed-Signal Microcontroller

6 _____________________________________________________________________

Pin Description

PIN NAME FUNCTION

22, 38,

60, 74

Digital Supply Voltage (+3.3V)

19, 37, 43,

59, 75

DGND Digital Ground

44 AV

Analog Supply Voltage

52 AGND Analog Ground

12 V

LCD

LCD Bias-Control Voltage. Highest LCD drive voltage used in all bias modes. This pin must be connected to an external supply when using the LCD display controller.

13 V

LCD1

LCD Bias, Voltage 1. Next highest LCD drive voltage, used in 1/2 and 1/3 LCD bias modes. An internal resistor-divider sets the voltage at this pin. External resistors and capacitors can be used to change LCD voltage or drive capability at this pin. This pin must be shunted externally to V

LCD2

when using 1/2

bias mode.

14 V

LCD2

LCD Bias, Voltage 2. Third highest LCD drive voltage, used in 1/3 LCD bias mode only. An internal resistor-divider sets the voltage at this pin. External resistors and capacitors can be used to change LCD voltage or drive capability at this pin. This pin must be shunted externally to V

LCD1

when using

1/2 bias mode.

15 V

ADJ

LCD Adjustment Voltage. Lowest LCD drive voltage, used in all bias modes. Connect to DGND through an external resistor to provide external control of the LCD contrast. Leave disconnected for internal contrast adjustment.

63 RESET

Digital, Active-Low, Reset Input/Output. The CPU is held in reset when this is low and begins executing from the reset vector when released. The pin includes a pullup current source and should be driven by an open-drain, external source capable of sinking in excess of 2mA. This pin is driven low as an output when an internal reset condition occurs.

20 HFXIN

High-Frequency Crystal Input. Connect an external crystal between HFXIN and HFXOUT to generate the high-frequency system clock. HFXIN and HFXOUT contain integral 16pF load capacitors, so no external capacitor is required.

21 HFXOUT

High-Frequency Crystal Output. Connect an external crystal between HFXIN and HFXOUT to generate the high-frequency system clock. HFXIN and HFXOUT contain integral 16pF load capacitors, so no external capacitor is required.

53 V

BAT

Digital Battery-Backup Supply. This supply provides an optional battery backup for the RTC when DV

power is removed. If this supply is not provided, all functions of the device operate as normal,

but the RTC is cleared upon power-on reset (POR).

61 32KIN

32kHz Crystal Input. Connect an external, 32kHz watch crystal between 32KIN and 32KOUT to generate the 32kHz system clock. This clock is required for the RTC to operate.

62 32KOUT

32kHz Crystal Output. Connect an external, 32kHz watch crystal between 32KIN and 32KOUT to generate the 32kHz system clock. This clock is required for the RTC to operate.

51 V

REF

Voltage Reference Input/Output. Bias voltage (+1.25V) for the ADCs. An external reference voltage can be connected to this pin when extremely high accuracy is required.

45 AN0- Negative Input for Sigma-Delta ADC Channel 0

46 AN0+ Positive Input for Sigma-Delta ADC Channel 0

47 AN1- Negative Input for Sigma-Delta ADC Channel 1

48 AN1+ Positive Input for Sigma-Delta ADC Channel 1

MAXQ3120

High-Precision ADC

Mixed-Signal Microcontroller

_____________________________________________________________________ 7

Pin Description (continued)

PIN NAME FUNCTION

General-Purpose, Digital, I/O, Type-D Port; External Edge-Selectable Interrupt. These port pins

function as bidirectional I/O pins only. All port pins default to input mode with weak pullups enabled after a reset. Port pins P0.3, P0.4, and P0.5 can be configured as external interrupt inputs. All alternate functions must be enabled from software.

PIN PORT ALTERNATE FUNCTIONS

64 P0.0 RTC Square-Wave Output —

65 P0.1 Serial Port 0 Receive —

66 P0.2 Serial Port 0 Transmit —

67 P0.3 Timer 0 Gate Input INT0

68 P0.4 Timer 0 Input INT1

69 P0.5 Timer 1 Input/Output INT2

70 P0.6 Timer 2 Input/Output A (T2P) —

64–71

TXD0,

T2A, T2B/

71 P0.7

—

G e n e r a l - Pu r p o s e , 8 - B i t , D i g i t a l , I/ O , T y p e - C Po r t ; LC D Se g m e n t - D r iv e r Ou t p u t . These p or t p i ns functi on as b oth b i d i r ecti onal I/O p i ns and LC D seg m ent- d r i ve outp uts. Al l p or t p i ns d efaul t to i np ut m od e w i th w eak p ul l up s enab l ed after a r eset. S etti ng the LC D enab l e ( P C Fx) b i t for a g r oup of four p or t p i ns enab l es the LC D functi on and d i sab l es the g ener al - p ur p ose I/O functi on on al l p i ns i n that g r oup .

PIN PORT LCD SEGMENT LCD ENABLE

76 P1.0 SEG19

77 P1.1 SEG18

78 P1.2 SEG17

79 P1.3 SEG16

PCF1

80 P1.4 SEG15

1 P1.5 SEG14

2 P1.6 SEG13

76–80, 1,

2, 3

SEG19–

SEG12

3 P1.7 SEG12

PCF0

PIN PORT LCD SEGMENT LCD ENABLE

28 P2.0 SEG20

29 P2.1 SEG21

30 P2.2 SEG22

31 P2.3 SEG23

PCF2

32 P2.4 SEG24

33 P2.5 SEG25

34 P2.6 SEG26

28–34, 39

P2.0–P2.7/

SEG20–

SEG27

39 P2.7 SEG27

PCF3

P0.0–P0.7/

SQW, RXD0,

INT0–INT2/

T0G, T0, T1

P1.0–P1.7/

Timer 2 Input/Output B (T2PB)

MAXQ3120

High-Precision ADC Mixed-Signal Microcontroller

8 _____________________________________________________________________

Pin Description (continued)

PIN NAME FUNCTION

General-Purpose, 8-Bit, Digital, I/O, Type-C Port. These port pins function as bidirectional I/O pins

only. All port pins default to input mode with weak pullups enabled after a reset. JTAG functions are enabled by default following reset; all other alternate functions must be enabled from software.

PIN PORT ALTERNATE FUNCTION

40 P3.0 TDO–JTAG Data Out

41 P3.1 TDI–JTAG Data In

42 P3.2 TMS–JTAG Mode Select

54 P3.3 TCK–JTAG Clock

55 P3.4 —

56 P3.5 —

57 P3.6 Serial Port 1 Transmit

40, 41, 42,

54–58

TDO, TDI,

58 P3.7 Serial Port 1 Receive

23 SEG0 LCD Segment 0 Driver. Dedicated LCD drive output.

18 SEG1 LCD Segment 1 Driver. Dedicated LCD drive output.

17 SEG2 LCD Segment 2 Driver. Dedicated LCD drive output.

16 SEG3 LCD Segment 3 Driver. Dedicated LCD drive output.

11 SEG4 LCD Segment 4 Driver. Dedicated LCD drive output.

10 SEG5 LCD Segment 5 Driver. Dedicated LCD drive output.

9 SEG6 LCD Segment 6 Driver. Dedicated LCD drive output.

8 SEG7 LCD Segment 7 Driver. Dedicated LCD drive output.

7 SEG8 LCD Segment 8 Driver. Dedicated LCD drive output.

6 SEG9 LCD Segment 9 Driver. Dedicated LCD drive output.

5 SEG10 LCD Segment 10 Driver. Dedicated LCD drive output.

4 SEG11 LCD Segment 11 Driver. Dedicated LCD drive output.

27 COM0 LCD Common 0 Driver. Dedicated LCD common-voltage output.

26 COM1 LCD Common 1 Driver. Dedicated LCD common-voltage output.

25 COM2 LCD Common 2 Driver. Dedicated LCD common-voltage output.

24 COM3 LCD Common 3 Driver. Dedicated LCD common-voltage output.

35, 36, 49,

50, 72, 73

N.C. No Connection

P3.0–P3.7/

TMS, TCK,

TXDI, RXDI

MAXQ3120

High-Precision ADC

Mixed-Signal Microcontroller

_____________________________________________________________________ 9

Functional Diagram

DGND

ADJ

SEG[11:0]

COM[3:0]

LCD2

LCD

DRIVER

14 x 8

LCD

DISPLAY

RAM

32kHz CLOCK

256 x 16

SRAM

16k x 16

(32kB)

FLASH

FILE

SERIAL

USART 0

PORT PIN

PAD

DRIVERS

INFRARED CONTROL

INTERRUPT

CONTROLLER

WATCHDOG

TIMER

TIMER 0

T0INT

T1INT

T2INT

TIMER 1

TIMER 2

RXD0

TXD0

RXD1

TXD1

SERIAL

USART 1

DP[0]

DP[1]

BP[Offs]

16 x 16 HW

MULTIPLY

LCD1

LCD

ADC

ANALOG

FRONT

END

CHANNEL 0

MODULATOR

CHANNEL 1

MODULATOR

CHANNEL 0

OUTPUT

CHANNEL 1

OUTPUT

FRONT

CHANNEL 0

SINC

FILTER

CHANNEL

0 AND 1

PHASE DELAY

CHANNEL 1

SINC

FILTER

AN0+

AN0-

AN1+

AN1-

AGND

DGND

SEG[27:12]

P0.3/INT0/T0G

EXTINT

U0INT

U1INT

P3.2/TMS

P3.1/TDI

P3.0/TDO

P3.3/TCK

DGND

RESET

HFXIN

HFXOUT

32K

OSC

CLK

DIV

WD DIV

JTAG

BOOTLOAD

AND

DEBUG

INTERFACE

16-BIT

RISC CPU

CORE

TIMER CLOCKS

REAL-TIME CLOCK, ALARMS

(BATTERY BACKED)

32KOUT

32KIN

BAT

WDC

TIME OF DAY,

INTERVAL

WDC

REF

MAXQ3120

P0.4/INT1/T0

T0G

T2B

P0.5/INT2/T1

P0.6/T2A

P0.7/T2B

P0.0/SQW

P0.1/RXD0

P0.2/TXD0

P3.7/RXD1

P3.6/TXD1

P3.4

P3.5

P1[7:0] SEG[12:19]

P2[7:0] SEG[27:20]

MAXQ3120

High-Precision ADC Mixed-Signal Microcontroller

10 ____________________________________________________________________

Detailed Description

The following is an introduction to the primary features of the microcontroller. More detailed descriptions of the device features can be found in the data sheets, errata sheets, and user’s guides described later in the Additional Documentation section.

MAXQ Core Architecture

The MAXQ3120 is a low-cost, high-performance, CMOS, 16-bit RISC microcontroller with flash memory and an integrated 112-segment LCD controller. It is structured on a highly advanced, accumulator-based, 16-bit RISC architecture. Fetch and execution operations are completed in one cycle without pipelining, because the instruction contains both the op code and data. The result is a streamlined 8 million instructionsper-second (MIPS) microcontroller.

The highly efficient core is supported by a 16-level hardware stack, enabling fast subroutine calling and task switching. Data can be quickly and efficiently manipulated with three internal data pointers. Multiple data pointers allow more than one function to access data memory without having to save and restore data pointers each time. The data pointers can automatically increment or decrement following an operation, eliminating the need for software intervention. As a result, the application speed is greatly increased.

Instruction Set

The instruction set is composed of fixed-length, 16-bit instructions that operate on registers and memory locations. The instruction set is highly orthogonal, allowing arithmetic and logical operations to use any register along with the accumulator. System registers control functionality common to all MAXQ microcontrollers, while peripheral registers control peripherals and functions specific to the MAXQ3120. All registers are subdivided into register modules. The family architecture is modular, so that new devices and modules can reuse code developed for existing products.

The architecture is transport-triggered. This means that writes or reads from certain register locations can also cause side effects to occur. These side effects form the basis for the higher-level op codes defined by the assembler, such as ADDC, OR, JUMP, etc. The op codes are actually implemented as MOVE instructions between certain system register locations, while the assembler handles the encoding, which need not be a concern to the programmer.

The 16-bit instruction word is designed for efficient execution. Bit 15 indicates the format for the source field of

the instruction. Bits 0 to 7 of the instruction represent the source for the transfer. Depending on the value of the format field, this can either be an 8-bit immediate value or a source register. If this field represents a register, the lower four bits contain the module specifier and the upper four bits contain the register index in that module.

Bits 8 to 14 represent the destination for the transfer. This value always represents a destination register, with the lower four bits containing the module specifier and the upper three bits containing the register subindex within that module.

The following types of instructions require the use of the prefix register, PFX, to supply additional data.

• Loading a 16-bit immediate value (with a nonzero high byte) into any register

• Branching to a 16-bit absolute destination address (LJMP or LCALL)

• Selecting one of the upper 8 registers in a system register module as a destination

• Selecting one of the upper 16 registers in a peripheral register module as a source

• Selecting one of the upper 24 registers in a peripheral register module as a destination

For any of these instruction types, the prefix register is used to supply the additional immediate value bits, source bits, and destination bits as needed. This prefix register write is inserted automatically by the assembler and requires only one additional execution cycle for any or all of these conditions.

Memory Organization

The device incorporates several memory areas:

• 2kWords utility ROM

• 16kWords of flash memory for program storage

• 256 words of SRAM for storage of temporary variables

• 16-level, 16-bit-wide stack memory for storage of program return addresses and general-purpose use

The memory is arranged by default in a Harvard architecture, with separate address spaces for program and data memory. The configuration of program and data space depends on the current execution location.

• When executing code from flash memory, the SRAM and utility ROM are accessible in data space.

• When executing code from SRAM, the flash memory and utility ROM are accessible in data space.

• When executing code from the utility ROM, the flash memory and SRAM are accessible in data space.

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